Group : dv_base_reg_pkg::dv_base_shadowed_field_cov::shadow_field_errs_cg
dashboard | hierarchy | modlist | groups | tests | asserts


Group Instance : clkmgr_reg_block.io_div2_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_div2_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_div4_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_div4_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.main_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.main_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.usb_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.usb_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15108 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 39 1 T58 4 T60 1 T61 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15108 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 30 1 T58 3 T61 1 T64 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15109 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 37 1 T60 1 T67 1 T65 4


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15109 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 35 1 T60 1 T65 4 T64 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15241 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 44 1 T57 3 T58 2 T61 3


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15241 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 36 1 T57 2 T58 2 T61 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15297 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 27 1 T57 1 T60 1 T61 3


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15297 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 26 1 T57 1 T58 1 T60 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15228 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 40 1 T59 1 T56 1 T58 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 15228 1 T5 28 T4 16 T6 8



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 37 1 T59 2 T56 1 T58 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%