Group : dv_base_reg_pkg::dv_base_shadowed_field_cov::shadow_field_errs_cg
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Group Instance : clkmgr_reg_block.io_div2_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_div2_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_div4_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_div4_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.main_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.main_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.usb_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.usb_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14471 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 30 1 T71 3 T73 1 T77 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14471 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 29 1 T71 3 T73 2 T74 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14292 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 41 1 T72 1 T73 1 T74 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14292 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 39 1 T72 2 T77 1 T74 3


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14300 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 30 1 T71 2 T73 1 T75 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14300 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 25 1 T71 1 T73 1 T76 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14295 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 46 1 T71 4 T72 1 T73 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14295 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 41 1 T71 2 T72 1 T73 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14327 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 37 1 T73 1 T75 1 T76 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 14327 1 T1 8 T2 24 T3 6



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 40 1 T71 1 T72 1 T73 4

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