| T795 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/40.clkmgr_stress_all_with_rand_reset.1345292353 |
|
|
Aug 23 06:17:27 AM UTC 24 |
Aug 23 06:18:04 AM UTC 24 |
2438342072 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_lc_ctrl_intersig_mubi.2260863004 |
|
|
Aug 23 06:18:03 AM UTC 24 |
Aug 23 06:18:05 AM UTC 24 |
23653659 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/46.clkmgr_frequency_timeout.2267986081 |
|
|
Aug 23 06:17:54 AM UTC 24 |
Aug 23 06:18:05 AM UTC 24 |
1333160537 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_lc_clk_byp_req_intersig_mubi.3654314096 |
|
|
Aug 23 06:18:03 AM UTC 24 |
Aug 23 06:18:05 AM UTC 24 |
40964303 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/41.clkmgr_stress_all_with_rand_reset.3124889360 |
|
|
Aug 23 06:17:32 AM UTC 24 |
Aug 23 06:18:05 AM UTC 24 |
5382564588 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_clk_handshake_intersig_mubi.632854007 |
|
|
Aug 23 06:18:03 AM UTC 24 |
Aug 23 06:18:05 AM UTC 24 |
194910384 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency.3417348162 |
|
|
Aug 23 06:18:01 AM UTC 24 |
Aug 23 06:18:06 AM UTC 24 |
558148378 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency_timeout.1889486134 |
|
|
Aug 23 06:18:01 AM UTC 24 |
Aug 23 06:18:06 AM UTC 24 |
748098839 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all.3472151345 |
|
|
Aug 23 06:17:54 AM UTC 24 |
Aug 23 06:18:08 AM UTC 24 |
2541929605 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/45.clkmgr_frequency.2113713348 |
|
|
Aug 23 06:17:49 AM UTC 24 |
Aug 23 06:18:09 AM UTC 24 |
2476243046 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_div_intersig_mubi.4253480252 |
|
|
Aug 23 06:18:09 AM UTC 24 |
Aug 23 06:18:11 AM UTC 24 |
60500528 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_smoke.4117488429 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:11 AM UTC 24 |
18661051 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_alert_test.788119481 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:11 AM UTC 24 |
32017460 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_extclk.1962635378 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:11 AM UTC 24 |
20051175 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_clk_status.2208116545 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:12 AM UTC 24 |
41679136 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_trans.3928547696 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:12 AM UTC 24 |
16246793 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_peri.3453005439 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:12 AM UTC 24 |
45401473 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_clk_handshake_intersig_mubi.1009756679 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:12 AM UTC 24 |
25602503 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_ctrl_intersig_mubi.1059202951 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:12 AM UTC 24 |
27704673 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_div_intersig_mubi.656062616 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:12 AM UTC 24 |
24257767 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_idle_intersig_mubi.3474826715 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:12 AM UTC 24 |
87305872 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_clk_byp_req_intersig_mubi.3988423678 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:13 AM UTC 24 |
396005390 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_regwen.713700140 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:13 AM UTC 24 |
522248393 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_regwen.4044405496 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:15 AM UTC 24 |
964116719 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency.3663826646 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:16 AM UTC 24 |
810150568 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_alert_test.560531015 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:17 AM UTC 24 |
35673675 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_smoke.3094555850 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:17 AM UTC 24 |
66279000 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_status.67863878 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:18 AM UTC 24 |
43840713 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_peri.1062025994 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:18 AM UTC 24 |
44811952 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_extclk.4016123526 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:18 AM UTC 24 |
112965468 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_ctrl_intersig_mubi.440044245 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:18 AM UTC 24 |
35647616 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_clk_byp_req_intersig_mubi.637909881 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:18 AM UTC 24 |
42373671 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_handshake_intersig_mubi.864944153 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:18 AM UTC 24 |
23518884 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_trans.2708588843 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:18 AM UTC 24 |
113188938 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_div_intersig_mubi.3757833711 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:18 AM UTC 24 |
75330781 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_idle_intersig_mubi.333183843 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:18 AM UTC 24 |
153323841 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_regwen.2762311534 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:20 AM UTC 24 |
690007906 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/38.clkmgr_stress_all_with_rand_reset.3759919490 |
|
|
Aug 23 06:17:13 AM UTC 24 |
Aug 23 06:18:20 AM UTC 24 |
7788270726 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency_timeout.1727501812 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:22 AM UTC 24 |
1238622128 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency.3132369431 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:22 AM UTC 24 |
681084123 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_alert_test.3230070560 |
|
|
Aug 23 06:18:21 AM UTC 24 |
Aug 23 06:18:23 AM UTC 24 |
22893724 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/29.clkmgr_stress_all_with_rand_reset.1542017743 |
|
|
Aug 23 06:16:23 AM UTC 24 |
Aug 23 06:18:24 AM UTC 24 |
37894791977 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all_with_rand_reset.2962659348 |
|
|
Aug 23 06:17:54 AM UTC 24 |
Aug 23 06:18:26 AM UTC 24 |
2189463043 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency_timeout.1975325852 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:26 AM UTC 24 |
2174655724 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all.2661842003 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:26 AM UTC 24 |
1183044812 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all_with_rand_reset.2482659362 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:28 AM UTC 24 |
863288233 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all_with_rand_reset.532489755 |
|
|
Aug 23 06:18:01 AM UTC 24 |
Aug 23 06:18:35 AM UTC 24 |
1950762068 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all.3285513499 |
|
|
Aug 23 06:18:16 AM UTC 24 |
Aug 23 06:18:35 AM UTC 24 |
4396062154 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/35.clkmgr_stress_all_with_rand_reset.3063927756 |
|
|
Aug 23 06:16:54 AM UTC 24 |
Aug 23 06:18:39 AM UTC 24 |
10296816208 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all.3790019783 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:43 AM UTC 24 |
8435591054 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all_with_rand_reset.1417062097 |
|
|
Aug 23 06:17:41 AM UTC 24 |
Aug 23 06:18:47 AM UTC 24 |
11407327128 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all_with_rand_reset.2102715487 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:18:49 AM UTC 24 |
2901572398 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/42.clkmgr_stress_all_with_rand_reset.204762472 |
|
|
Aug 23 06:17:36 AM UTC 24 |
Aug 23 06:18:55 AM UTC 24 |
13367068604 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all_with_rand_reset.332676282 |
|
|
Aug 23 06:18:10 AM UTC 24 |
Aug 23 06:19:00 AM UTC 24 |
3181465554 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/default/44.clkmgr_stress_all_with_rand_reset.1273712238 |
|
|
Aug 23 06:17:49 AM UTC 24 |
Aug 23 06:19:10 AM UTC 24 |
12990764945 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.2603099404 |
|
|
Aug 23 06:02:46 AM UTC 24 |
Aug 23 06:02:49 AM UTC 24 |
128863681 ps |
| T74 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.892416010 |
|
|
Aug 23 06:02:46 AM UTC 24 |
Aug 23 06:02:51 AM UTC 24 |
785970827 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_intr_test.968592457 |
|
|
Aug 23 06:02:50 AM UTC 24 |
Aug 23 06:02:51 AM UTC 24 |
56717716 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_errors.1533683506 |
|
|
Aug 23 06:02:49 AM UTC 24 |
Aug 23 06:02:52 AM UTC 24 |
319646897 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.2521624510 |
|
|
Aug 23 06:02:51 AM UTC 24 |
Aug 23 06:02:53 AM UTC 24 |
27576224 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_intg_err.3515095712 |
|
|
Aug 23 06:02:50 AM UTC 24 |
Aug 23 06:02:53 AM UTC 24 |
219758078 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_rw.1637387726 |
|
|
Aug 23 06:02:52 AM UTC 24 |
Aug 23 06:02:54 AM UTC 24 |
60597356 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3188944043 |
|
|
Aug 23 06:02:52 AM UTC 24 |
Aug 23 06:02:54 AM UTC 24 |
50394075 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.2275648145 |
|
|
Aug 23 06:02:53 AM UTC 24 |
Aug 23 06:02:55 AM UTC 24 |
86264871 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.3144325465 |
|
|
Aug 23 06:02:53 AM UTC 24 |
Aug 23 06:02:55 AM UTC 24 |
96215643 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.1147260456 |
|
|
Aug 23 06:02:54 AM UTC 24 |
Aug 23 06:02:56 AM UTC 24 |
84212615 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_intr_test.2286154663 |
|
|
Aug 23 06:02:55 AM UTC 24 |
Aug 23 06:02:57 AM UTC 24 |
29897011 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_errors.3515362113 |
|
|
Aug 23 06:02:54 AM UTC 24 |
Aug 23 06:02:57 AM UTC 24 |
261512416 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1791014232 |
|
|
Aug 23 06:02:54 AM UTC 24 |
Aug 23 06:02:57 AM UTC 24 |
147672266 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.3780647355 |
|
|
Aug 23 06:02:56 AM UTC 24 |
Aug 23 06:02:58 AM UTC 24 |
32933148 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_rw.2326949915 |
|
|
Aug 23 06:02:56 AM UTC 24 |
Aug 23 06:02:58 AM UTC 24 |
171955405 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_intg_err.3038712107 |
|
|
Aug 23 06:02:55 AM UTC 24 |
Aug 23 06:02:58 AM UTC 24 |
98908224 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_aliasing.158019650 |
|
|
Aug 23 06:02:57 AM UTC 24 |
Aug 23 06:02:59 AM UTC 24 |
56927332 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.1164402921 |
|
|
Aug 23 06:02:58 AM UTC 24 |
Aug 23 06:03:00 AM UTC 24 |
46806272 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.2100181437 |
|
|
Aug 23 06:02:58 AM UTC 24 |
Aug 23 06:03:00 AM UTC 24 |
23963055 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_intr_test.3361431550 |
|
|
Aug 23 06:02:59 AM UTC 24 |
Aug 23 06:03:01 AM UTC 24 |
36066980 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.454776375 |
|
|
Aug 23 06:02:58 AM UTC 24 |
Aug 23 06:03:01 AM UTC 24 |
183464923 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_errors.2556214765 |
|
|
Aug 23 06:02:59 AM UTC 24 |
Aug 23 06:03:02 AM UTC 24 |
117170576 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.3780934956 |
|
|
Aug 23 06:02:57 AM UTC 24 |
Aug 23 06:03:02 AM UTC 24 |
571761625 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.3825124011 |
|
|
Aug 23 06:03:01 AM UTC 24 |
Aug 23 06:03:02 AM UTC 24 |
61690109 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_rw.3388489305 |
|
|
Aug 23 06:03:01 AM UTC 24 |
Aug 23 06:03:02 AM UTC 24 |
98787178 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.1021918727 |
|
|
Aug 23 06:03:02 AM UTC 24 |
Aug 23 06:03:04 AM UTC 24 |
44252371 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.2635534209 |
|
|
Aug 23 06:02:59 AM UTC 24 |
Aug 23 06:03:04 AM UTC 24 |
500400278 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_aliasing.1838587147 |
|
|
Aug 23 06:03:02 AM UTC 24 |
Aug 23 06:03:04 AM UTC 24 |
73164318 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.3591328963 |
|
|
Aug 23 06:03:03 AM UTC 24 |
Aug 23 06:03:05 AM UTC 24 |
77826358 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_intg_err.627472110 |
|
|
Aug 23 06:02:59 AM UTC 24 |
Aug 23 06:03:05 AM UTC 24 |
1049145603 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.4189376827 |
|
|
Aug 23 06:02:52 AM UTC 24 |
Aug 23 06:03:05 AM UTC 24 |
2971223305 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.1619914113 |
|
|
Aug 23 06:03:03 AM UTC 24 |
Aug 23 06:03:05 AM UTC 24 |
76744111 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.307042204 |
|
|
Aug 23 06:03:03 AM UTC 24 |
Aug 23 06:03:05 AM UTC 24 |
89041573 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_errors.3812214131 |
|
|
Aug 23 06:03:03 AM UTC 24 |
Aug 23 06:03:06 AM UTC 24 |
37048906 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_intg_err.3997941659 |
|
|
Aug 23 06:03:04 AM UTC 24 |
Aug 23 06:03:06 AM UTC 24 |
72590581 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_intr_test.1344354799 |
|
|
Aug 23 06:03:05 AM UTC 24 |
Aug 23 06:03:07 AM UTC 24 |
49365405 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.731923033 |
|
|
Aug 23 06:03:05 AM UTC 24 |
Aug 23 06:03:07 AM UTC 24 |
51939322 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_rw.637286216 |
|
|
Aug 23 06:03:05 AM UTC 24 |
Aug 23 06:03:07 AM UTC 24 |
49985615 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.857380798 |
|
|
Aug 23 06:03:05 AM UTC 24 |
Aug 23 06:03:07 AM UTC 24 |
20825902 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_aliasing.1688365505 |
|
|
Aug 23 06:03:05 AM UTC 24 |
Aug 23 06:03:07 AM UTC 24 |
57834216 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.1890246480 |
|
|
Aug 23 06:03:05 AM UTC 24 |
Aug 23 06:03:07 AM UTC 24 |
99224792 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.384296568 |
|
|
Aug 23 06:03:02 AM UTC 24 |
Aug 23 06:03:08 AM UTC 24 |
401573013 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.1892059044 |
|
|
Aug 23 06:03:06 AM UTC 24 |
Aug 23 06:03:08 AM UTC 24 |
74367249 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.725608661 |
|
|
Aug 23 06:03:06 AM UTC 24 |
Aug 23 06:03:09 AM UTC 24 |
94058550 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_intr_test.2852290387 |
|
|
Aug 23 06:03:07 AM UTC 24 |
Aug 23 06:03:09 AM UTC 24 |
32890018 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_rw.1297466303 |
|
|
Aug 23 06:03:07 AM UTC 24 |
Aug 23 06:03:10 AM UTC 24 |
24099545 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.874187932 |
|
|
Aug 23 06:03:07 AM UTC 24 |
Aug 23 06:03:10 AM UTC 24 |
53489466 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_intg_err.30619925 |
|
|
Aug 23 06:03:07 AM UTC 24 |
Aug 23 06:03:10 AM UTC 24 |
133306103 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_aliasing.1367859506 |
|
|
Aug 23 06:03:09 AM UTC 24 |
Aug 23 06:03:10 AM UTC 24 |
29400525 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_errors.867533757 |
|
|
Aug 23 06:03:07 AM UTC 24 |
Aug 23 06:03:11 AM UTC 24 |
204321551 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.1385257962 |
|
|
Aug 23 06:03:10 AM UTC 24 |
Aug 23 06:03:12 AM UTC 24 |
43234848 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.4118216032 |
|
|
Aug 23 06:03:10 AM UTC 24 |
Aug 23 06:03:12 AM UTC 24 |
143900267 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.580896161 |
|
|
Aug 23 06:03:10 AM UTC 24 |
Aug 23 06:03:12 AM UTC 24 |
101919875 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_intr_test.1464608065 |
|
|
Aug 23 06:03:11 AM UTC 24 |
Aug 23 06:03:12 AM UTC 24 |
18617460 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_rw.1416275606 |
|
|
Aug 23 06:03:11 AM UTC 24 |
Aug 23 06:03:12 AM UTC 24 |
34261605 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_intg_err.2756652031 |
|
|
Aug 23 06:03:11 AM UTC 24 |
Aug 23 06:03:13 AM UTC 24 |
189286688 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.1128131101 |
|
|
Aug 23 06:03:10 AM UTC 24 |
Aug 23 06:03:13 AM UTC 24 |
293849114 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.3255611299 |
|
|
Aug 23 06:03:12 AM UTC 24 |
Aug 23 06:03:15 AM UTC 24 |
327354335 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_errors.3664388052 |
|
|
Aug 23 06:03:11 AM UTC 24 |
Aug 23 06:03:15 AM UTC 24 |
272370979 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.3040841311 |
|
|
Aug 23 06:03:05 AM UTC 24 |
Aug 23 06:03:15 AM UTC 24 |
1363306664 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_intr_test.2902873663 |
|
|
Aug 23 06:03:13 AM UTC 24 |
Aug 23 06:03:15 AM UTC 24 |
16470335 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.2013544843 |
|
|
Aug 23 06:03:13 AM UTC 24 |
Aug 23 06:03:15 AM UTC 24 |
82093696 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2084101512 |
|
|
Aug 23 06:03:08 AM UTC 24 |
Aug 23 06:03:15 AM UTC 24 |
399621911 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.3808089389 |
|
|
Aug 23 06:03:13 AM UTC 24 |
Aug 23 06:03:16 AM UTC 24 |
59053893 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_rw.2632207733 |
|
|
Aug 23 06:03:14 AM UTC 24 |
Aug 23 06:03:16 AM UTC 24 |
38642945 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.1258821112 |
|
|
Aug 23 06:03:13 AM UTC 24 |
Aug 23 06:03:16 AM UTC 24 |
211998256 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_errors.751024944 |
|
|
Aug 23 06:03:13 AM UTC 24 |
Aug 23 06:03:16 AM UTC 24 |
64975657 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.1283909716 |
|
|
Aug 23 06:03:14 AM UTC 24 |
Aug 23 06:03:16 AM UTC 24 |
89301792 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_intg_err.622273547 |
|
|
Aug 23 06:03:13 AM UTC 24 |
Aug 23 06:03:17 AM UTC 24 |
204161430 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.4054577191 |
|
|
Aug 23 06:03:14 AM UTC 24 |
Aug 23 06:03:17 AM UTC 24 |
210712451 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.2657291762 |
|
|
Aug 23 06:03:15 AM UTC 24 |
Aug 23 06:03:17 AM UTC 24 |
52637834 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_errors.4178661073 |
|
|
Aug 23 06:03:15 AM UTC 24 |
Aug 23 06:03:18 AM UTC 24 |
53564835 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_intg_err.1322406647 |
|
|
Aug 23 06:03:15 AM UTC 24 |
Aug 23 06:03:18 AM UTC 24 |
51562362 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_intr_test.2348766901 |
|
|
Aug 23 06:03:17 AM UTC 24 |
Aug 23 06:03:18 AM UTC 24 |
13244487 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_rw.1992559582 |
|
|
Aug 23 06:03:17 AM UTC 24 |
Aug 23 06:03:18 AM UTC 24 |
49001521 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.480618285 |
|
|
Aug 23 06:03:17 AM UTC 24 |
Aug 23 06:03:18 AM UTC 24 |
61707924 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.1960322454 |
|
|
Aug 23 06:03:17 AM UTC 24 |
Aug 23 06:03:19 AM UTC 24 |
94666660 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_errors.675759430 |
|
|
Aug 23 06:03:17 AM UTC 24 |
Aug 23 06:03:19 AM UTC 24 |
68999685 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_intr_test.844574705 |
|
|
Aug 23 06:03:18 AM UTC 24 |
Aug 23 06:03:19 AM UTC 24 |
31038064 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.1470414462 |
|
|
Aug 23 06:03:17 AM UTC 24 |
Aug 23 06:03:20 AM UTC 24 |
253754068 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.851221322 |
|
|
Aug 23 06:03:15 AM UTC 24 |
Aug 23 06:03:20 AM UTC 24 |
482449541 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.2743627875 |
|
|
Aug 23 06:03:17 AM UTC 24 |
Aug 23 06:03:20 AM UTC 24 |
234223953 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_rw.3372370637 |
|
|
Aug 23 06:03:18 AM UTC 24 |
Aug 23 06:03:20 AM UTC 24 |
222714698 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.2395354628 |
|
|
Aug 23 06:03:18 AM UTC 24 |
Aug 23 06:03:20 AM UTC 24 |
162456343 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_intr_test.4004296333 |
|
|
Aug 23 06:03:19 AM UTC 24 |
Aug 23 06:03:21 AM UTC 24 |
13189314 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.2913123663 |
|
|
Aug 23 06:03:19 AM UTC 24 |
Aug 23 06:03:21 AM UTC 24 |
30221377 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_intg_err.206883530 |
|
|
Aug 23 06:03:18 AM UTC 24 |
Aug 23 06:03:21 AM UTC 24 |
241412664 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.7831100 |
|
|
Aug 23 06:03:19 AM UTC 24 |
Aug 23 06:03:21 AM UTC 24 |
58113899 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_errors.2262428141 |
|
|
Aug 23 06:03:19 AM UTC 24 |
Aug 23 06:03:22 AM UTC 24 |
96789455 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_intg_err.2702125514 |
|
|
Aug 23 06:03:19 AM UTC 24 |
Aug 23 06:03:22 AM UTC 24 |
94256670 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_rw.3808455118 |
|
|
Aug 23 06:03:20 AM UTC 24 |
Aug 23 06:03:22 AM UTC 24 |
15085178 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.3535400289 |
|
|
Aug 23 06:03:20 AM UTC 24 |
Aug 23 06:03:22 AM UTC 24 |
22624986 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.3498043297 |
|
|
Aug 23 06:03:19 AM UTC 24 |
Aug 23 06:03:22 AM UTC 24 |
272260108 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.1649261852 |
|
|
Aug 23 06:03:20 AM UTC 24 |
Aug 23 06:03:22 AM UTC 24 |
89586076 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_intr_test.240715761 |
|
|
Aug 23 06:03:21 AM UTC 24 |
Aug 23 06:03:23 AM UTC 24 |
11791244 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_rw.2043088153 |
|
|
Aug 23 06:03:21 AM UTC 24 |
Aug 23 06:03:23 AM UTC 24 |
13774040 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_errors.1320279640 |
|
|
Aug 23 06:03:20 AM UTC 24 |
Aug 23 06:03:23 AM UTC 24 |
39352916 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.3083670005 |
|
|
Aug 23 06:03:21 AM UTC 24 |
Aug 23 06:03:23 AM UTC 24 |
30877433 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.1445897913 |
|
|
Aug 23 06:03:21 AM UTC 24 |
Aug 23 06:03:23 AM UTC 24 |
35106063 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.604929363 |
|
|
Aug 23 06:03:20 AM UTC 24 |
Aug 23 06:03:24 AM UTC 24 |
245004088 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_errors.113325442 |
|
|
Aug 23 06:03:32 AM UTC 24 |
Aug 23 06:03:36 AM UTC 24 |
114894843 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.1945869650 |
|
|
Aug 23 06:03:20 AM UTC 24 |
Aug 23 06:03:24 AM UTC 24 |
599417726 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_intg_err.2343543044 |
|
|
Aug 23 06:03:21 AM UTC 24 |
Aug 23 06:03:24 AM UTC 24 |
234567200 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_intr_test.1193775680 |
|
|
Aug 23 06:03:23 AM UTC 24 |
Aug 23 06:03:24 AM UTC 24 |
16535981 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_rw.1124037251 |
|
|
Aug 23 06:03:23 AM UTC 24 |
Aug 23 06:03:24 AM UTC 24 |
37966377 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.3492973976 |
|
|
Aug 23 06:03:23 AM UTC 24 |
Aug 23 06:03:25 AM UTC 24 |
73455034 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.590310486 |
|
|
Aug 23 06:03:23 AM UTC 24 |
Aug 23 06:03:25 AM UTC 24 |
109094734 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.3963799143 |
|
|
Aug 23 06:03:24 AM UTC 24 |
Aug 23 06:03:26 AM UTC 24 |
46932454 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_errors.1482488026 |
|
|
Aug 23 06:03:23 AM UTC 24 |
Aug 23 06:03:26 AM UTC 24 |
90305555 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_intg_err.3873206629 |
|
|
Aug 23 06:03:23 AM UTC 24 |
Aug 23 06:03:26 AM UTC 24 |
109242206 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.2034628967 |
|
|
Aug 23 06:03:23 AM UTC 24 |
Aug 23 06:03:26 AM UTC 24 |
269363166 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_errors.1662450445 |
|
|
Aug 23 06:03:24 AM UTC 24 |
Aug 23 06:03:26 AM UTC 24 |
55093759 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_intg_err.2314960115 |
|
|
Aug 23 06:03:24 AM UTC 24 |
Aug 23 06:03:27 AM UTC 24 |
116863505 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_intr_test.341066280 |
|
|
Aug 23 06:03:25 AM UTC 24 |
Aug 23 06:03:27 AM UTC 24 |
50630169 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.141020457 |
|
|
Aug 23 06:03:24 AM UTC 24 |
Aug 23 06:03:27 AM UTC 24 |
120345601 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_rw.3189499158 |
|
|
Aug 23 06:03:25 AM UTC 24 |
Aug 23 06:03:27 AM UTC 24 |
49332936 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2351457061 |
|
|
Aug 23 06:03:24 AM UTC 24 |
Aug 23 06:03:27 AM UTC 24 |
171463270 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.1028218632 |
|
|
Aug 23 06:03:25 AM UTC 24 |
Aug 23 06:03:27 AM UTC 24 |
99038859 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.2727377168 |
|
|
Aug 23 06:03:25 AM UTC 24 |
Aug 23 06:03:28 AM UTC 24 |
89508755 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_intr_test.363985986 |
|
|
Aug 23 06:03:26 AM UTC 24 |
Aug 23 06:03:28 AM UTC 24 |
39745402 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_rw.4097129050 |
|
|
Aug 23 06:03:26 AM UTC 24 |
Aug 23 06:03:28 AM UTC 24 |
46134928 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.2401947635 |
|
|
Aug 23 06:03:25 AM UTC 24 |
Aug 23 06:03:28 AM UTC 24 |
313288860 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.2890670346 |
|
|
Aug 23 06:03:27 AM UTC 24 |
Aug 23 06:03:29 AM UTC 24 |
33513533 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_intg_err.1001319655 |
|
|
Aug 23 06:03:26 AM UTC 24 |
Aug 23 06:03:29 AM UTC 24 |
105181732 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.3313455226 |
|
|
Aug 23 06:03:26 AM UTC 24 |
Aug 23 06:03:30 AM UTC 24 |
275103331 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.1443873361 |
|
|
Aug 23 06:03:27 AM UTC 24 |
Aug 23 06:03:30 AM UTC 24 |
54084859 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.209402218 |
|
|
Aug 23 06:03:27 AM UTC 24 |
Aug 23 06:03:30 AM UTC 24 |
66712500 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_rw.672078301 |
|
|
Aug 23 06:03:29 AM UTC 24 |
Aug 23 06:03:30 AM UTC 24 |
44640098 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_intr_test.3001726526 |
|
|
Aug 23 06:03:29 AM UTC 24 |
Aug 23 06:03:30 AM UTC 24 |
13860621 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_errors.45802739 |
|
|
Aug 23 06:03:26 AM UTC 24 |
Aug 23 06:03:31 AM UTC 24 |
789998741 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.1945318734 |
|
|
Aug 23 06:03:27 AM UTC 24 |
Aug 23 06:03:31 AM UTC 24 |
303213911 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_errors.592785881 |
|
|
Aug 23 06:03:28 AM UTC 24 |
Aug 23 06:03:31 AM UTC 24 |
62791532 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.841627349 |
|
|
Aug 23 06:03:29 AM UTC 24 |
Aug 23 06:03:31 AM UTC 24 |
79641933 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_intg_err.452503667 |
|
|
Aug 23 06:03:28 AM UTC 24 |
Aug 23 06:03:31 AM UTC 24 |
197717281 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.2151244399 |
|
|
Aug 23 06:03:29 AM UTC 24 |
Aug 23 06:03:31 AM UTC 24 |
40479268 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.3900772482 |
|
|
Aug 23 06:03:29 AM UTC 24 |
Aug 23 06:03:32 AM UTC 24 |
268493316 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_intg_err.1032340079 |
|
|
Aug 23 06:03:30 AM UTC 24 |
Aug 23 06:03:32 AM UTC 24 |
117245738 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.2042381986 |
|
|
Aug 23 06:03:29 AM UTC 24 |
Aug 23 06:03:33 AM UTC 24 |
160802083 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_intr_test.4110454568 |
|
|
Aug 23 06:03:31 AM UTC 24 |
Aug 23 06:03:33 AM UTC 24 |
31484430 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_rw.1098864453 |
|
|
Aug 23 06:03:31 AM UTC 24 |
Aug 23 06:03:33 AM UTC 24 |
21436717 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.1919620290 |
|
|
Aug 23 06:03:31 AM UTC 24 |
Aug 23 06:03:33 AM UTC 24 |
34802557 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.1172736328 |
|
|
Aug 23 06:03:31 AM UTC 24 |
Aug 23 06:03:33 AM UTC 24 |
97308675 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.743747164 |
|
|
Aug 23 06:03:31 AM UTC 24 |
Aug 23 06:03:34 AM UTC 24 |
59624506 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.2231392795 |
|
|
Aug 23 06:03:31 AM UTC 24 |
Aug 23 06:03:34 AM UTC 24 |
186251656 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_intr_test.2482844757 |
|
|
Aug 23 06:03:32 AM UTC 24 |
Aug 23 06:03:34 AM UTC 24 |
24386255 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_rw.879314896 |
|
|
Aug 23 06:03:32 AM UTC 24 |
Aug 23 06:03:34 AM UTC 24 |
55513881 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_errors.4003175394 |
|
|
Aug 23 06:03:30 AM UTC 24 |
Aug 23 06:03:34 AM UTC 24 |
404076929 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.3993241426 |
|
|
Aug 23 06:03:32 AM UTC 24 |
Aug 23 06:03:34 AM UTC 24 |
26533901 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.1545313237 |
|
|
Aug 23 06:03:32 AM UTC 24 |
Aug 23 06:03:35 AM UTC 24 |
74773303 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_intr_test.572355403 |
|
|
Aug 23 06:03:33 AM UTC 24 |
Aug 23 06:03:35 AM UTC 24 |
10594321 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_rw.301026598 |
|
|
Aug 23 06:03:33 AM UTC 24 |
Aug 23 06:03:35 AM UTC 24 |
25515680 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_intg_err.3074892227 |
|
|
Aug 23 06:03:32 AM UTC 24 |
Aug 23 06:03:35 AM UTC 24 |
250551967 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.1888417577 |
|
|
Aug 23 06:03:33 AM UTC 24 |
Aug 23 06:03:36 AM UTC 24 |
44586241 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_rw.766347549 |
|
|
Aug 23 06:03:36 AM UTC 24 |
Aug 23 06:03:38 AM UTC 24 |
144794224 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.4081611209 |
|
|
Aug 23 06:03:33 AM UTC 24 |
Aug 23 06:03:36 AM UTC 24 |
225286408 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_intg_err.1167039697 |
|
|
Aug 23 06:03:33 AM UTC 24 |
Aug 23 06:03:36 AM UTC 24 |
82238230 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.585896034 |
|
|
Aug 23 06:03:35 AM UTC 24 |
Aug 23 06:03:37 AM UTC 24 |
108942015 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.811966175 |
|
|
Aug 23 06:03:35 AM UTC 24 |
Aug 23 06:03:37 AM UTC 24 |
97011283 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_errors.4100216218 |
|
|
Aug 23 06:03:33 AM UTC 24 |
Aug 23 06:03:37 AM UTC 24 |
296045822 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.845177392 |
|
|
Aug 23 06:03:33 AM UTC 24 |
Aug 23 06:03:37 AM UTC 24 |
392586824 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.218787234 |
|
|
Aug 23 06:03:35 AM UTC 24 |
Aug 23 06:03:37 AM UTC 24 |
121201318 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_intr_test.320342890 |
|
|
Aug 23 06:03:36 AM UTC 24 |
Aug 23 06:03:38 AM UTC 24 |
86580431 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.517324626 |
|
|
Aug 23 06:03:36 AM UTC 24 |
Aug 23 06:03:38 AM UTC 24 |
93990582 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.3229083590 |
|
|
Aug 23 06:03:36 AM UTC 24 |
Aug 23 06:03:38 AM UTC 24 |
51021957 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.1470730125 |
|
|
Aug 23 06:03:36 AM UTC 24 |
Aug 23 06:03:38 AM UTC 24 |
72761247 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_intg_err.2974445646 |
|
|
Aug 23 06:03:36 AM UTC 24 |
Aug 23 06:03:38 AM UTC 24 |
75014300 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_intr_test.2737498116 |
|
|
Aug 23 06:03:37 AM UTC 24 |
Aug 23 06:03:39 AM UTC 24 |
12784853 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_errors.2154231947 |
|
|
Aug 23 06:03:36 AM UTC 24 |
Aug 23 06:03:39 AM UTC 24 |
119696175 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_rw.542513050 |
|
|
Aug 23 06:03:37 AM UTC 24 |
Aug 23 06:03:39 AM UTC 24 |
52265701 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.708181274 |
|
|
Aug 23 06:03:36 AM UTC 24 |
Aug 23 06:03:39 AM UTC 24 |
102638321 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_intg_err.4208936321 |
|
|
Aug 23 06:03:37 AM UTC 24 |
Aug 23 06:03:40 AM UTC 24 |
127693296 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/20.clkmgr_intr_test.1619036443 |
|
|
Aug 23 06:03:38 AM UTC 24 |
Aug 23 06:03:40 AM UTC 24 |
14805748 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/23.clkmgr_intr_test.955329788 |
|
|
Aug 23 06:03:38 AM UTC 24 |
Aug 23 06:03:40 AM UTC 24 |
18345936 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/21.clkmgr_intr_test.3254450637 |
|
|
Aug 23 06:03:38 AM UTC 24 |
Aug 23 06:03:40 AM UTC 24 |
27787347 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/24.clkmgr_intr_test.3816467507 |
|
|
Aug 23 06:03:38 AM UTC 24 |
Aug 23 06:03:40 AM UTC 24 |
14326237 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/22.clkmgr_intr_test.3358704562 |
|
|
Aug 23 06:03:38 AM UTC 24 |
Aug 23 06:03:40 AM UTC 24 |
83742047 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.3167241347 |
|
|
Aug 23 06:03:38 AM UTC 24 |
Aug 23 06:03:40 AM UTC 24 |
60093718 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.1084050092 |
|
|
Aug 23 06:03:38 AM UTC 24 |
Aug 23 06:03:40 AM UTC 24 |
210566944 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_errors.1301103254 |
|
|
Aug 23 06:03:37 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
110985954 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/25.clkmgr_intr_test.4006372883 |
|
|
Aug 23 06:03:39 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
13913045 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/27.clkmgr_intr_test.768135034 |
|
|
Aug 23 06:03:39 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
15629860 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/28.clkmgr_intr_test.3372900615 |
|
|
Aug 23 06:03:39 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
28488619 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/26.clkmgr_intr_test.3957302423 |
|
|
Aug 23 06:03:39 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
13355476 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/30.clkmgr_intr_test.3272528454 |
|
|
Aug 23 06:03:39 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
12906188 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/31.clkmgr_intr_test.3142684362 |
|
|
Aug 23 06:03:39 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
30564217 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/29.clkmgr_intr_test.1757459132 |
|
|
Aug 23 06:03:39 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
27351073 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/32.clkmgr_intr_test.845726024 |
|
|
Aug 23 06:03:40 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
33427091 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/33.clkmgr_intr_test.3184815597 |
|
|
Aug 23 06:03:40 AM UTC 24 |
Aug 23 06:03:41 AM UTC 24 |
12847134 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/34.clkmgr_intr_test.2413595675 |
|
|
Aug 23 06:03:41 AM UTC 24 |
Aug 23 06:03:42 AM UTC 24 |
12730923 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/35.clkmgr_intr_test.3640981903 |
|
|
Aug 23 06:03:41 AM UTC 24 |
Aug 23 06:03:42 AM UTC 24 |
20376885 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/38.clkmgr_intr_test.2326086166 |
|
|
Aug 23 06:03:41 AM UTC 24 |
Aug 23 06:03:42 AM UTC 24 |
15884421 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/36.clkmgr_intr_test.35681582 |
|
|
Aug 23 06:03:41 AM UTC 24 |
Aug 23 06:03:42 AM UTC 24 |
13280120 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/39.clkmgr_intr_test.471944084 |
|
|
Aug 23 06:03:41 AM UTC 24 |
Aug 23 06:03:42 AM UTC 24 |
13710154 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_08_22/clkmgr-sim-vcs/coverage/cover_reg_top/37.clkmgr_intr_test.2561450748 |
|
|
Aug 23 06:03:41 AM UTC 24 |
Aug 23 06:03:42 AM UTC 24 |
41637443 ps |