| T799 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/46.clkmgr_frequency_timeout.2921174733 |
|
|
Aug 28 08:00:22 PM UTC 24 |
Aug 28 08:00:27 PM UTC 24 |
627543829 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all.3810240723 |
|
|
Aug 28 08:00:18 PM UTC 24 |
Aug 28 08:00:27 PM UTC 24 |
1386750618 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/44.clkmgr_regwen.4060012456 |
|
|
Aug 28 08:00:19 PM UTC 24 |
Aug 28 08:00:27 PM UTC 24 |
1693125762 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/44.clkmgr_frequency.376157743 |
|
|
Aug 28 08:00:19 PM UTC 24 |
Aug 28 08:00:27 PM UTC 24 |
1044066403 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_peri.3532994708 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:27 PM UTC 24 |
21120428 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_trans.509789376 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
33220623 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_clk_byp_req_intersig_mubi.4162253241 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
17595891 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_idle_intersig_mubi.3537667891 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
30761694 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_clk_status.2786486564 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
25224964 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/46.clkmgr_frequency.3152212679 |
|
|
Aug 28 08:00:22 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
562836295 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_alert_test.4278355660 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
16682985 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_ctrl_intersig_mubi.2092365158 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
24658375 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_clk_handshake_intersig_mubi.3183350007 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
26143879 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_peri.45586228 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
13541936 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_smoke.3489301704 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
60830901 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_status.3207146881 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
18017077 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_div_intersig_mubi.1771224372 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:28 PM UTC 24 |
79383258 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/47.clkmgr_regwen.2417727921 |
|
|
Aug 28 08:00:23 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
860987607 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_trans.1797463177 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
53179412 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_extclk.2828084168 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
109499364 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/45.clkmgr_frequency_timeout.150231722 |
|
|
Aug 28 08:00:19 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
1600032351 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_ctrl_intersig_mubi.3008233548 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
66152364 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_alert_test.1576400921 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
18696766 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_regwen.1788093146 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
201214651 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_div_intersig_mubi.4116292016 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
22501920 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_regwen.3512665710 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
46685021 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_handshake_intersig_mubi.614691898 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
77131930 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_clk_byp_req_intersig_mubi.3344860229 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
88694636 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_idle_intersig_mubi.2256262106 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:29 PM UTC 24 |
184555845 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency_timeout.1929018873 |
|
|
Aug 28 08:00:23 PM UTC 24 |
Aug 28 08:00:30 PM UTC 24 |
1601494261 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/43.clkmgr_frequency_timeout.3133961093 |
|
|
Aug 28 08:00:18 PM UTC 24 |
Aug 28 08:00:31 PM UTC 24 |
1461375518 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/44.clkmgr_frequency_timeout.3879128266 |
|
|
Aug 28 08:00:19 PM UTC 24 |
Aug 28 08:00:31 PM UTC 24 |
2060160544 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/42.clkmgr_frequency.4005915771 |
|
|
Aug 28 08:00:16 PM UTC 24 |
Aug 28 08:00:34 PM UTC 24 |
1757453160 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency_timeout.2016649818 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:35 PM UTC 24 |
856252766 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency.2124516083 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:35 PM UTC 24 |
796728174 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency_timeout.1772880233 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:35 PM UTC 24 |
1107052729 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/42.clkmgr_frequency_timeout.510921622 |
|
|
Aug 28 08:00:16 PM UTC 24 |
Aug 28 08:00:35 PM UTC 24 |
1935203461 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/38.clkmgr_stress_all_with_rand_reset.1662387813 |
|
|
Aug 28 07:58:51 PM UTC 24 |
Aug 28 08:00:37 PM UTC 24 |
3869186006 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all.4174812921 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:39 PM UTC 24 |
1369989051 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency.1757431178 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
2359062346 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/45.clkmgr_frequency.2485417356 |
|
|
Aug 28 08:00:19 PM UTC 24 |
Aug 28 08:00:42 PM UTC 24 |
2477683485 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/41.clkmgr_stress_all.2284350047 |
|
|
Aug 28 08:00:16 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
8273635559 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all_with_rand_reset.3621939237 |
|
|
Aug 28 08:00:23 PM UTC 24 |
Aug 28 08:01:00 PM UTC 24 |
6622360434 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all_with_rand_reset.1776348430 |
|
|
Aug 28 08:00:22 PM UTC 24 |
Aug 28 08:01:05 PM UTC 24 |
5472954202 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all_with_rand_reset.1812877331 |
|
|
Aug 28 08:00:18 PM UTC 24 |
Aug 28 08:01:17 PM UTC 24 |
4460898496 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/39.clkmgr_stress_all_with_rand_reset.2101748923 |
|
|
Aug 28 07:58:55 PM UTC 24 |
Aug 28 08:01:21 PM UTC 24 |
17506006768 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all_with_rand_reset.1658426463 |
|
|
Aug 28 08:00:23 PM UTC 24 |
Aug 28 08:01:36 PM UTC 24 |
10422435612 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all.2000007751 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:01:44 PM UTC 24 |
8527262672 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all_with_rand_reset.1137435297 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:01:46 PM UTC 24 |
10128641449 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/40.clkmgr_stress_all_with_rand_reset.261322891 |
|
|
Aug 28 07:59:05 PM UTC 24 |
Aug 28 08:01:46 PM UTC 24 |
28121726908 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/44.clkmgr_stress_all_with_rand_reset.2459837736 |
|
|
Aug 28 08:00:19 PM UTC 24 |
Aug 28 08:01:54 PM UTC 24 |
13736289033 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all_with_rand_reset.2633586817 |
|
|
Aug 28 08:00:26 PM UTC 24 |
Aug 28 08:02:08 PM UTC 24 |
15768948868 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/41.clkmgr_stress_all_with_rand_reset.485570636 |
|
|
Aug 28 08:00:16 PM UTC 24 |
Aug 28 08:02:28 PM UTC 24 |
19245938422 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/default/36.clkmgr_stress_all_with_rand_reset.4013984114 |
|
|
Aug 28 07:58:44 PM UTC 24 |
Aug 28 08:02:48 PM UTC 24 |
66463337045 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.2593095449 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:30 PM UTC 24 |
66927057 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_intg_err.1352581870 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:30 PM UTC 24 |
68498209 ps |
| T65 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.3400823929 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:30 PM UTC 24 |
101448997 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_errors.2486287269 |
|
|
Aug 28 08:00:27 PM UTC 24 |
Aug 28 08:00:31 PM UTC 24 |
220773207 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_intr_test.67253418 |
|
|
Aug 28 08:00:29 PM UTC 24 |
Aug 28 08:00:31 PM UTC 24 |
14097452 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_rw.1677741371 |
|
|
Aug 28 08:00:29 PM UTC 24 |
Aug 28 08:00:31 PM UTC 24 |
14863730 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.445346224 |
|
|
Aug 28 08:00:29 PM UTC 24 |
Aug 28 08:00:31 PM UTC 24 |
74719022 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_intr_test.275544941 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
38173408 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3172524375 |
|
|
Aug 28 08:00:29 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
21776223 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_rw.4121072937 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
17293355 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_intr_test.89051100 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
33168643 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.3579375825 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
176920952 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.330598567 |
|
|
Aug 28 08:00:29 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
21135273 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.1421129387 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
18796031 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_rw.4021805897 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
167176462 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_intr_test.587269228 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
12159743 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_intr_test.3378990924 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
141044007 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.978316631 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
121430646 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.261025067 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:32 PM UTC 24 |
43276066 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_intg_err.1853295141 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
124713567 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_rw.4098741074 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
27040050 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.1773914100 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
63371097 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_errors.484111381 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
31639245 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.3703496631 |
|
|
Aug 28 08:00:29 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
245105180 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_aliasing.4179969476 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
37130702 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.3676216961 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
22499119 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_aliasing.2855845024 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
93694821 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_rw.744664926 |
|
|
Aug 28 08:00:31 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
62175348 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.2458322626 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
87555564 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1990946602 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
21463872 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.532424625 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
99041348 ps |
| T72 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.2275058526 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
90065169 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_errors.3008676863 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
140755364 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_intg_err.3309486065 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
130654725 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_intg_err.904087894 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
54485352 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.1889641431 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
133336365 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.960790921 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
356176702 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.2334932976 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:33 PM UTC 24 |
97225531 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_errors.2121872225 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:34 PM UTC 24 |
83879647 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.97266241 |
|
|
Aug 28 08:00:29 PM UTC 24 |
Aug 28 08:00:35 PM UTC 24 |
148853158 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_intr_test.262942168 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:35 PM UTC 24 |
14125921 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_rw.1305036967 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
16247650 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.4090215793 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
16502766 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.3342399261 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
61934061 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_intr_test.2002683511 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
21091196 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.330412917 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:39 PM UTC 24 |
655670987 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_rw.2450952639 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
17741896 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.4288070080 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
123792946 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_aliasing.2893160893 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
67950185 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.2968043440 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
64391078 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.3064640163 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
59194855 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_intr_test.3984858239 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
40997132 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_rw.266279751 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
60247742 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_rw.264716770 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
66205294 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.3002381773 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:36 PM UTC 24 |
79251114 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_aliasing.3086450960 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:37 PM UTC 24 |
70082504 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.2749088458 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:37 PM UTC 24 |
91060752 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.1789177016 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:37 PM UTC 24 |
51290183 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.1496276013 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:37 PM UTC 24 |
84834056 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.11737832 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:37 PM UTC 24 |
92904581 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.1219648033 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:37 PM UTC 24 |
287047683 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_intg_err.2561945976 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:37 PM UTC 24 |
228408030 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.673064960 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:37 PM UTC 24 |
394730114 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.2008052508 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:38 PM UTC 24 |
282142301 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_errors.1711972458 |
|
|
Aug 28 08:00:33 PM UTC 24 |
Aug 28 08:00:38 PM UTC 24 |
119518607 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.4275509862 |
|
|
Aug 28 08:00:30 PM UTC 24 |
Aug 28 08:00:38 PM UTC 24 |
263256685 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_errors.1081519576 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:38 PM UTC 24 |
91181304 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_intg_err.2129237232 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:39 PM UTC 24 |
248552114 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.2738210343 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:39 PM UTC 24 |
462420676 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_intr_test.2585571401 |
|
|
Aug 28 08:00:37 PM UTC 24 |
Aug 28 08:00:39 PM UTC 24 |
16619156 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.4146853075 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:39 PM UTC 24 |
354962685 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_rw.772358081 |
|
|
Aug 28 08:00:37 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
16818497 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.317818115 |
|
|
Aug 28 08:00:37 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
32561898 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_errors.37027270 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
25241919 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_intr_test.3547442212 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
13604561 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.3553158118 |
|
|
Aug 28 08:00:31 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
1688686228 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.2119897383 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
218020184 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.1964706313 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
42566518 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_intr_test.3082922422 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:40 PM UTC 24 |
27006609 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_intg_err.2182827292 |
|
|
Aug 28 08:00:37 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
123265027 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.43794648 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
105097951 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.408580278 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
94550036 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.1412206569 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
206477580 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.1512816131 |
|
|
Aug 28 08:00:37 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
133975784 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.4209738749 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
47021175 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.1820517378 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
97271903 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_errors.1455058274 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
30003732 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_errors.763539249 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
28121334 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.3419678239 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
72312942 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_intg_err.388722277 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
99143446 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_rw.1828612554 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
120417450 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.4185006002 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
119228835 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_intg_err.1597422413 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
57578392 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.345210272 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:41 PM UTC 24 |
132726997 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.3452607707 |
|
|
Aug 28 08:00:37 PM UTC 24 |
Aug 28 08:00:42 PM UTC 24 |
265256347 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.2912247739 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:42 PM UTC 24 |
70821707 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.2312891618 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:42 PM UTC 24 |
229902327 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.181730017 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:42 PM UTC 24 |
165518542 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.974600146 |
|
|
Aug 28 08:00:39 PM UTC 24 |
Aug 28 08:00:42 PM UTC 24 |
62247701 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.4008019014 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:42 PM UTC 24 |
143399942 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_intg_err.4026129453 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:43 PM UTC 24 |
516832707 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.2672133944 |
|
|
Aug 28 08:00:38 PM UTC 24 |
Aug 28 08:00:43 PM UTC 24 |
545328338 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_errors.641564240 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:43 PM UTC 24 |
1691373807 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_intr_test.194344128 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:46 PM UTC 24 |
25839223 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_errors.3866601406 |
|
|
Aug 28 08:00:37 PM UTC 24 |
Aug 28 08:00:46 PM UTC 24 |
1550084683 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_intr_test.3370749163 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:46 PM UTC 24 |
37272580 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_rw.4180596686 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:46 PM UTC 24 |
113016819 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.1758030200 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:46 PM UTC 24 |
72030627 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_intr_test.2876773551 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
12724123 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_rw.2164762972 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
21855388 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.3000518572 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
54534610 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_intg_err.1892556001 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:50 PM UTC 24 |
348976470 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_intr_test.3356701309 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
16362046 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_errors.991499522 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:50 PM UTC 24 |
240620447 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_rw.3884779476 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
39458012 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.256821119 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
178011049 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.767380249 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
23036715 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_intr_test.300180266 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
11902008 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.407482177 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
83428608 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_errors.2532336100 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
138037251 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.2587571046 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
67780031 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_rw.566127273 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
21781653 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.2498497171 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
50564080 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.678932541 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
58008413 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.3682983901 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
83172440 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_errors.115421647 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
255574151 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_intr_test.1369817196 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
12594726 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_rw.2239909020 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
98976886 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.2347792186 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:47 PM UTC 24 |
50721598 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_rw.2163062409 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
20539239 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.442348097 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
45226328 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.1224528477 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
34996987 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.837544547 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
174987371 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_intg_err.444861361 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
70230675 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_errors.2403199533 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
37950180 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.1041835310 |
|
|
Aug 28 08:00:46 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
32127390 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_intg_err.1853807219 |
|
|
Aug 28 08:00:34 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
3523562729 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.2765058042 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
88747167 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_intg_err.2342154973 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
477249019 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.984257181 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:48 PM UTC 24 |
314691473 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.4016536299 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
240712788 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.3308557561 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
86227441 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.1675840478 |
|
|
Aug 28 08:00:46 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
34659644 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.240119769 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
189973636 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_intg_err.3923514399 |
|
|
Aug 28 08:00:44 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
700124498 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_intg_err.2012551521 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
217054050 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_errors.3765881049 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
91283918 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.2036062114 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
159808071 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.947881531 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
413466606 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_intg_err.2500501552 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
158917658 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.2613106083 |
|
|
Aug 28 08:00:46 PM UTC 24 |
Aug 28 08:00:49 PM UTC 24 |
168009021 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.1764638313 |
|
|
Aug 28 08:00:46 PM UTC 24 |
Aug 28 08:00:50 PM UTC 24 |
597144567 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_errors.3510219762 |
|
|
Aug 28 08:00:45 PM UTC 24 |
Aug 28 08:00:50 PM UTC 24 |
132590724 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_intr_test.81432903 |
|
|
Aug 28 08:00:51 PM UTC 24 |
Aug 28 08:00:53 PM UTC 24 |
39045429 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_rw.888349050 |
|
|
Aug 28 08:00:51 PM UTC 24 |
Aug 28 08:00:53 PM UTC 24 |
27828886 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_intr_test.3926770077 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:53 PM UTC 24 |
17908606 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_intr_test.2226577274 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
15161762 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_rw.1281368854 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
26288255 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.1991007534 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
33908528 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_rw.824397862 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
15293230 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.1440670829 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
62203018 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/25.clkmgr_intr_test.167592713 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
17635379 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/22.clkmgr_intr_test.2854979078 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
22335203 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.2499764497 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
29168315 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/20.clkmgr_intr_test.1374086396 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
14221141 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/23.clkmgr_intr_test.2312781036 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
21652669 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/21.clkmgr_intr_test.1298581907 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
15645592 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/24.clkmgr_intr_test.3112962767 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
45048443 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/28.clkmgr_intr_test.1942458669 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
23653743 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/27.clkmgr_intr_test.2973246673 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
39939429 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.985422016 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
27515876 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_intg_err.2682606116 |
|
|
Aug 28 08:00:51 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
75254783 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/29.clkmgr_intr_test.2323433419 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
21282179 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.2946508571 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
145776517 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/30.clkmgr_intr_test.825094290 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
12525459 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/33.clkmgr_intr_test.2716567415 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
14612258 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/26.clkmgr_intr_test.1462133188 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:54 PM UTC 24 |
100378527 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/31.clkmgr_intr_test.2864589011 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
31908810 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/35.clkmgr_intr_test.3180747038 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
10980297 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/38.clkmgr_intr_test.3358840026 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
21157477 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/34.clkmgr_intr_test.769441781 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
31501753 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/36.clkmgr_intr_test.4116845033 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
17346791 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/32.clkmgr_intr_test.1889859451 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
67116292 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.845809225 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
110679279 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/37.clkmgr_intr_test.4022391440 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
36265797 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/42.clkmgr_intr_test.279183350 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
27800792 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/44.clkmgr_intr_test.3179234380 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
13786895 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/41.clkmgr_intr_test.2981131121 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
36955590 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/39.clkmgr_intr_test.3786348458 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
10998180 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_errors.3277704999 |
|
|
Aug 28 08:00:51 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
154513800 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.974878099 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
157726935 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/45.clkmgr_intr_test.3184257636 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
11736206 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.390097082 |
|
|
Aug 28 08:00:52 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
131875059 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/47.clkmgr_intr_test.1941231698 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
36897981 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/40.clkmgr_intr_test.3658500252 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
39728813 ps |
| T1001 |
/workspaces/repo/scratch/os_regression_2024_08_28/clkmgr-sim-vcs/coverage/cover_reg_top/46.clkmgr_intr_test.3738808730 |
|
|
Aug 28 08:00:53 PM UTC 24 |
Aug 28 08:00:55 PM UTC 24 |
46673174 ps |