| T798 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/35.clkmgr_stress_all.1638254314 |
|
|
Sep 01 06:21:54 AM UTC 24 |
Sep 01 06:22:50 AM UTC 24 |
6970543378 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_regwen.619232146 |
|
|
Sep 01 06:22:38 AM UTC 24 |
Sep 01 06:22:50 AM UTC 24 |
1291103106 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency.1354773132 |
|
|
Sep 01 06:22:36 AM UTC 24 |
Sep 01 06:22:51 AM UTC 24 |
1642546830 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/33.clkmgr_stress_all.1291962968 |
|
|
Sep 01 06:21:43 AM UTC 24 |
Sep 01 06:22:51 AM UTC 24 |
12824397532 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_peri.361695951 |
|
|
Sep 01 06:22:39 AM UTC 24 |
Sep 01 06:22:52 AM UTC 24 |
25698951 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_clk_status.908181799 |
|
|
Sep 01 06:22:39 AM UTC 24 |
Sep 01 06:22:52 AM UTC 24 |
19465970 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_idle_intersig_mubi.431625418 |
|
|
Sep 01 06:22:39 AM UTC 24 |
Sep 01 06:22:52 AM UTC 24 |
26172349 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_trans.3552606741 |
|
|
Sep 01 06:22:39 AM UTC 24 |
Sep 01 06:22:52 AM UTC 24 |
81871319 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_ctrl_intersig_mubi.3711610951 |
|
|
Sep 01 06:22:39 AM UTC 24 |
Sep 01 06:22:52 AM UTC 24 |
56282489 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_div_intersig_mubi.3529296719 |
|
|
Sep 01 06:22:39 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
39447664 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_clk_handshake_intersig_mubi.3547257709 |
|
|
Sep 01 06:22:39 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
44973127 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_clk_byp_req_intersig_mubi.3396790923 |
|
|
Sep 01 06:22:39 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
20532330 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_clk_status.1723208524 |
|
|
Sep 01 06:22:38 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
52112659 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_clk_handshake_intersig_mubi.3149911084 |
|
|
Sep 01 06:22:38 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
22417322 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_lc_ctrl_intersig_mubi.3778703847 |
|
|
Sep 01 06:22:38 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
71139053 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_lc_clk_byp_req_intersig_mubi.213438582 |
|
|
Sep 01 06:22:38 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
37963671 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_trans.4196938420 |
|
|
Sep 01 06:22:37 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
18939874 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_div_intersig_mubi.922555489 |
|
|
Sep 01 06:22:38 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
112654865 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_idle_intersig_mubi.54767945 |
|
|
Sep 01 06:22:38 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
53801518 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/32.clkmgr_stress_all.1262968489 |
|
|
Sep 01 06:21:38 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
9501517361 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/49.clkmgr_alert_test.3792091852 |
|
|
Sep 01 06:22:48 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
14150616 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/44.clkmgr_stress_all.2828314720 |
|
|
Sep 01 06:22:29 AM UTC 24 |
Sep 01 06:22:54 AM UTC 24 |
4659104006 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency.3693515052 |
|
|
Sep 01 06:22:43 AM UTC 24 |
Sep 01 06:22:55 AM UTC 24 |
918404250 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_regwen.1113226885 |
|
|
Sep 01 06:22:40 AM UTC 24 |
Sep 01 06:22:55 AM UTC 24 |
757047860 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all.2563642144 |
|
|
Sep 01 06:22:48 AM UTC 24 |
Sep 01 06:22:56 AM UTC 24 |
513022865 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency_timeout.1682032693 |
|
|
Sep 01 06:22:36 AM UTC 24 |
Sep 01 06:22:57 AM UTC 24 |
2178355649 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/46.clkmgr_frequency.767995887 |
|
|
Sep 01 06:22:34 AM UTC 24 |
Sep 01 06:22:58 AM UTC 24 |
2068903721 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/49.clkmgr_regwen.3919510456 |
|
|
Sep 01 06:22:47 AM UTC 24 |
Sep 01 06:22:58 AM UTC 24 |
1293508961 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/40.clkmgr_stress_all_with_rand_reset.3733305705 |
|
|
Sep 01 06:22:17 AM UTC 24 |
Sep 01 06:23:00 AM UTC 24 |
4674055094 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency_timeout.4055627483 |
|
|
Sep 01 06:22:43 AM UTC 24 |
Sep 01 06:23:01 AM UTC 24 |
1696662374 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all.457803348 |
|
|
Sep 01 06:22:35 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
6570504929 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/36.clkmgr_stress_all.293636299 |
|
|
Sep 01 06:21:58 AM UTC 24 |
Sep 01 06:23:08 AM UTC 24 |
8691104283 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all.3404817375 |
|
|
Sep 01 06:22:25 AM UTC 24 |
Sep 01 06:23:08 AM UTC 24 |
5570555729 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/42.clkmgr_stress_all.769148170 |
|
|
Sep 01 06:22:23 AM UTC 24 |
Sep 01 06:23:09 AM UTC 24 |
10641232969 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/33.clkmgr_stress_all_with_rand_reset.925722235 |
|
|
Sep 01 06:21:43 AM UTC 24 |
Sep 01 06:23:09 AM UTC 24 |
11905963707 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/42.clkmgr_stress_all_with_rand_reset.4149556878 |
|
|
Sep 01 06:22:23 AM UTC 24 |
Sep 01 06:23:13 AM UTC 24 |
2833094089 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all_with_rand_reset.4159695688 |
|
|
Sep 01 06:22:40 AM UTC 24 |
Sep 01 06:23:14 AM UTC 24 |
2603826243 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all.810645933 |
|
|
Sep 01 06:22:43 AM UTC 24 |
Sep 01 06:23:20 AM UTC 24 |
4407722628 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/37.clkmgr_stress_all_with_rand_reset.241506748 |
|
|
Sep 01 06:22:05 AM UTC 24 |
Sep 01 06:23:21 AM UTC 24 |
13287478519 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all_with_rand_reset.2389890276 |
|
|
Sep 01 06:22:35 AM UTC 24 |
Sep 01 06:23:22 AM UTC 24 |
8112477065 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all_with_rand_reset.4291693972 |
|
|
Sep 01 06:22:38 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
4349965764 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all_with_rand_reset.3281428999 |
|
|
Sep 01 06:22:32 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
5610053594 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all.2258904626 |
|
|
Sep 01 06:22:38 AM UTC 24 |
Sep 01 06:23:30 AM UTC 24 |
8515484779 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/41.clkmgr_stress_all_with_rand_reset.2987820990 |
|
|
Sep 01 06:22:19 AM UTC 24 |
Sep 01 06:23:41 AM UTC 24 |
13617871637 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/10.clkmgr_stress_all_with_rand_reset.2057902917 |
|
|
Sep 01 06:20:20 AM UTC 24 |
Sep 01 06:23:41 AM UTC 24 |
51549086932 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/31.clkmgr_stress_all_with_rand_reset.1558805771 |
|
|
Sep 01 06:21:34 AM UTC 24 |
Sep 01 06:23:42 AM UTC 24 |
20508526555 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all_with_rand_reset.1082830191 |
|
|
Sep 01 06:22:47 AM UTC 24 |
Sep 01 06:23:53 AM UTC 24 |
6862970326 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all_with_rand_reset.1144348744 |
|
|
Sep 01 06:22:25 AM UTC 24 |
Sep 01 06:24:16 AM UTC 24 |
19005294090 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/32.clkmgr_stress_all_with_rand_reset.2217590610 |
|
|
Sep 01 06:21:38 AM UTC 24 |
Sep 01 06:24:21 AM UTC 24 |
27369073235 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/default/23.clkmgr_stress_all_with_rand_reset.2481771807 |
|
|
Sep 01 06:21:04 AM UTC 24 |
Sep 01 06:26:15 AM UTC 24 |
73232827651 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.3617484100 |
|
|
Sep 01 06:22:50 AM UTC 24 |
Sep 01 06:22:52 AM UTC 24 |
92797426 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3986218082 |
|
|
Sep 01 06:22:50 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
29713854 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.2031029118 |
|
|
Sep 01 06:22:50 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
272242582 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_intr_test.2043788250 |
|
|
Sep 01 06:22:51 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
22728840 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_rw.842125285 |
|
|
Sep 01 06:22:51 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
31355942 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.1046022598 |
|
|
Sep 01 06:22:50 AM UTC 24 |
Sep 01 06:22:53 AM UTC 24 |
178008454 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.1382748166 |
|
|
Sep 01 06:22:51 AM UTC 24 |
Sep 01 06:22:54 AM UTC 24 |
15653010 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.4013500741 |
|
|
Sep 01 06:22:49 AM UTC 24 |
Sep 01 06:22:54 AM UTC 24 |
17719552 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_intr_test.2611352668 |
|
|
Sep 01 06:22:49 AM UTC 24 |
Sep 01 06:22:54 AM UTC 24 |
50310142 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_rw.3955382301 |
|
|
Sep 01 06:22:49 AM UTC 24 |
Sep 01 06:22:54 AM UTC 24 |
22663909 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_aliasing.3382574040 |
|
|
Sep 01 06:22:51 AM UTC 24 |
Sep 01 06:22:54 AM UTC 24 |
36279586 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_errors.363688287 |
|
|
Sep 01 06:22:51 AM UTC 24 |
Sep 01 06:22:54 AM UTC 24 |
33600614 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_intg_err.3601394 |
|
|
Sep 01 06:22:51 AM UTC 24 |
Sep 01 06:22:54 AM UTC 24 |
209374085 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_errors.2985451771 |
|
|
Sep 01 06:22:48 AM UTC 24 |
Sep 01 06:22:55 AM UTC 24 |
32581769 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.2110164657 |
|
|
Sep 01 06:22:48 AM UTC 24 |
Sep 01 06:22:55 AM UTC 24 |
107365425 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.969271362 |
|
|
Sep 01 06:22:50 AM UTC 24 |
Sep 01 06:22:55 AM UTC 24 |
296835159 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.3949355016 |
|
|
Sep 01 06:22:53 AM UTC 24 |
Sep 01 06:22:55 AM UTC 24 |
23264828 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.2601493972 |
|
|
Sep 01 06:22:53 AM UTC 24 |
Sep 01 06:22:55 AM UTC 24 |
60800426 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.807254211 |
|
|
Sep 01 06:22:48 AM UTC 24 |
Sep 01 06:22:56 AM UTC 24 |
430949711 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.1025956680 |
|
|
Sep 01 06:22:51 AM UTC 24 |
Sep 01 06:22:56 AM UTC 24 |
210444411 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_intg_err.3984518403 |
|
|
Sep 01 06:22:49 AM UTC 24 |
Sep 01 06:22:56 AM UTC 24 |
255276434 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_intr_test.1867148603 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:57 AM UTC 24 |
11476963 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.1427378821 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:57 AM UTC 24 |
20361775 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_intg_err.861977596 |
|
|
Sep 01 06:23:02 AM UTC 24 |
Sep 01 06:23:08 AM UTC 24 |
78681304 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_rw.1202644368 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:57 AM UTC 24 |
17379534 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.2260282966 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:57 AM UTC 24 |
124398244 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_intr_test.1346150377 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:57 AM UTC 24 |
50384306 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_aliasing.3494159717 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:57 AM UTC 24 |
77186230 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_errors.3227191087 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:58 AM UTC 24 |
29348507 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.25195925 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:58 AM UTC 24 |
113806855 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.84539369 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:58 AM UTC 24 |
123793783 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.3662798313 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:58 AM UTC 24 |
38829033 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.736198 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:58 AM UTC 24 |
98496644 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.4226627860 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:58 AM UTC 24 |
305002010 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_errors.2650051852 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:59 AM UTC 24 |
276457693 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_intg_err.3086312045 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:59 AM UTC 24 |
379721705 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.444754695 |
|
|
Sep 01 06:22:49 AM UTC 24 |
Sep 01 06:22:59 AM UTC 24 |
1114701231 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.3870018152 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:22:59 AM UTC 24 |
297848936 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_intg_err.1675383133 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:23:01 AM UTC 24 |
592702445 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.200975384 |
|
|
Sep 01 06:22:55 AM UTC 24 |
Sep 01 06:23:01 AM UTC 24 |
457462002 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_intr_test.1458133073 |
|
|
Sep 01 06:23:02 AM UTC 24 |
Sep 01 06:23:07 AM UTC 24 |
12346717 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_intr_test.831652573 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:02 AM UTC 24 |
11750002 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_rw.3379651005 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:02 AM UTC 24 |
53434132 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_rw.2638777392 |
|
|
Sep 01 06:23:02 AM UTC 24 |
Sep 01 06:23:07 AM UTC 24 |
38443441 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_intr_test.2305208739 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:02 AM UTC 24 |
20315591 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_rw.580110459 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:02 AM UTC 24 |
29926947 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.4153474491 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:02 AM UTC 24 |
36525603 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.4156989141 |
|
|
Sep 01 06:23:01 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
29400283 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_intr_test.58954769 |
|
|
Sep 01 06:22:58 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
18196874 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_rw.1510637567 |
|
|
Sep 01 06:23:05 AM UTC 24 |
Sep 01 06:23:17 AM UTC 24 |
46370323 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_intg_err.415340983 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
67159267 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_rw.877299184 |
|
|
Sep 01 06:22:58 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
74679654 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.1070000363 |
|
|
Sep 01 06:22:54 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
265281247 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.3463049387 |
|
|
Sep 01 06:22:58 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
60342156 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.1637015926 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
125582952 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_intg_err.2665016481 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
77211936 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.2826960728 |
|
|
Sep 01 06:23:01 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
149944720 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.1246585266 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
330892600 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.1873309917 |
|
|
Sep 01 06:22:58 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
60074652 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.569953287 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
138576433 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.3795838991 |
|
|
Sep 01 06:23:01 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
101567018 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.269933425 |
|
|
Sep 01 06:22:58 AM UTC 24 |
Sep 01 06:23:03 AM UTC 24 |
99501953 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_intg_err.1670327742 |
|
|
Sep 01 06:22:58 AM UTC 24 |
Sep 01 06:23:04 AM UTC 24 |
129246930 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.3104870484 |
|
|
Sep 01 06:22:58 AM UTC 24 |
Sep 01 06:23:04 AM UTC 24 |
251606510 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_errors.3408145025 |
|
|
Sep 01 06:22:59 AM UTC 24 |
Sep 01 06:23:04 AM UTC 24 |
165867986 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.1109342052 |
|
|
Sep 01 06:23:01 AM UTC 24 |
Sep 01 06:23:04 AM UTC 24 |
104225566 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_errors.224180381 |
|
|
Sep 01 06:22:58 AM UTC 24 |
Sep 01 06:23:04 AM UTC 24 |
91993031 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.2266870396 |
|
|
Sep 01 06:23:05 AM UTC 24 |
Sep 01 06:23:08 AM UTC 24 |
102741755 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_errors.2831682024 |
|
|
Sep 01 06:23:02 AM UTC 24 |
Sep 01 06:23:08 AM UTC 24 |
126265897 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.2670672837 |
|
|
Sep 01 06:23:05 AM UTC 24 |
Sep 01 06:23:08 AM UTC 24 |
286598518 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.1343921144 |
|
|
Sep 01 06:23:05 AM UTC 24 |
Sep 01 06:23:09 AM UTC 24 |
430187438 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_intr_test.213068428 |
|
|
Sep 01 06:23:09 AM UTC 24 |
Sep 01 06:23:12 AM UTC 24 |
121566415 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.3650128252 |
|
|
Sep 01 06:23:03 AM UTC 24 |
Sep 01 06:23:13 AM UTC 24 |
99922976 ps |
| T170 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.3035724804 |
|
|
Sep 01 06:23:09 AM UTC 24 |
Sep 01 06:23:13 AM UTC 24 |
66997325 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_errors.4022661634 |
|
|
Sep 01 06:23:09 AM UTC 24 |
Sep 01 06:23:13 AM UTC 24 |
44000919 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_intg_err.1223445102 |
|
|
Sep 01 06:23:09 AM UTC 24 |
Sep 01 06:23:14 AM UTC 24 |
99887916 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_intr_test.3696171602 |
|
|
Sep 01 06:23:14 AM UTC 24 |
Sep 01 06:23:17 AM UTC 24 |
68580319 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.1598385138 |
|
|
Sep 01 06:23:08 AM UTC 24 |
Sep 01 06:23:17 AM UTC 24 |
56703897 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_intr_test.2855404697 |
|
|
Sep 01 06:23:05 AM UTC 24 |
Sep 01 06:23:17 AM UTC 24 |
41132592 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.807594665 |
|
|
Sep 01 06:23:08 AM UTC 24 |
Sep 01 06:23:17 AM UTC 24 |
109165608 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_rw.434667212 |
|
|
Sep 01 06:23:16 AM UTC 24 |
Sep 01 06:23:17 AM UTC 24 |
24799274 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.4139167444 |
|
|
Sep 01 06:23:06 AM UTC 24 |
Sep 01 06:23:18 AM UTC 24 |
27380474 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.2969112186 |
|
|
Sep 01 06:23:05 AM UTC 24 |
Sep 01 06:23:18 AM UTC 24 |
110451063 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_rw.877534541 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:18 AM UTC 24 |
32073367 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.2095139813 |
|
|
Sep 01 06:23:16 AM UTC 24 |
Sep 01 06:23:18 AM UTC 24 |
129253971 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_errors.2026199100 |
|
|
Sep 01 06:23:14 AM UTC 24 |
Sep 01 06:23:18 AM UTC 24 |
33572931 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.1039948095 |
|
|
Sep 01 06:23:06 AM UTC 24 |
Sep 01 06:23:18 AM UTC 24 |
94120811 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.628283851 |
|
|
Sep 01 06:23:16 AM UTC 24 |
Sep 01 06:23:18 AM UTC 24 |
203074427 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.1509391206 |
|
|
Sep 01 06:23:06 AM UTC 24 |
Sep 01 06:23:19 AM UTC 24 |
144623951 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_intg_err.959782583 |
|
|
Sep 01 06:23:14 AM UTC 24 |
Sep 01 06:23:19 AM UTC 24 |
118635064 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_intg_err.2453395146 |
|
|
Sep 01 06:23:05 AM UTC 24 |
Sep 01 06:23:19 AM UTC 24 |
135902625 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.559729881 |
|
|
Sep 01 06:23:06 AM UTC 24 |
Sep 01 06:23:19 AM UTC 24 |
271430091 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_errors.1299260253 |
|
|
Sep 01 06:23:05 AM UTC 24 |
Sep 01 06:23:19 AM UTC 24 |
215306365 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.364351036 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:20 AM UTC 24 |
254103552 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_rw.960522608 |
|
|
Sep 01 06:23:09 AM UTC 24 |
Sep 01 06:23:22 AM UTC 24 |
24220526 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_intr_test.1120571668 |
|
|
Sep 01 06:23:03 AM UTC 24 |
Sep 01 06:23:22 AM UTC 24 |
14657318 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.3149947577 |
|
|
Sep 01 06:23:09 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
93621961 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_rw.1509745514 |
|
|
Sep 01 06:23:04 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
26504459 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_rw.1963911657 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
12043646 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_intr_test.3222514535 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
25768624 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_errors.988770192 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:28 AM UTC 24 |
441034790 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.578025491 |
|
|
Sep 01 06:23:04 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
36110142 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.560178396 |
|
|
Sep 01 06:23:03 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
113943485 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.2417674451 |
|
|
Sep 01 06:23:03 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
44884094 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.2369613288 |
|
|
Sep 01 06:23:09 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
84710339 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.3651147555 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
27585785 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_rw.3807033401 |
|
|
Sep 01 06:23:18 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
38313528 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_intr_test.1193610922 |
|
|
Sep 01 06:23:18 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
15406377 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.321099089 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
96082232 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_intg_err.4220225559 |
|
|
Sep 01 06:23:03 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
86158386 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.1521861636 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:23 AM UTC 24 |
84931329 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.430187068 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
121264578 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.578485128 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
159068812 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_errors.1649897940 |
|
|
Sep 01 06:23:18 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
29785813 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.1060484318 |
|
|
Sep 01 06:23:11 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
191287517 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.2044816207 |
|
|
Sep 01 06:23:03 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
284329630 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.1641241708 |
|
|
Sep 01 06:23:18 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
126351415 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_errors.3572880916 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
81285511 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.608927339 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
97294674 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.3458707150 |
|
|
Sep 01 06:23:18 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
207669932 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_rw.2614754318 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
17061846 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.3837292023 |
|
|
Sep 01 06:23:11 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
108633329 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_intg_err.3040525552 |
|
|
Sep 01 06:23:18 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
186580993 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_errors.1179682181 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:24 AM UTC 24 |
194527046 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_intr_test.1907503153 |
|
|
Sep 01 06:23:06 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
14003976 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_rw.1468761117 |
|
|
Sep 01 06:22:55 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
17353106 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.837586524 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
161062423 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_rw.2395923857 |
|
|
Sep 01 06:23:06 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
44427343 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_intr_test.1085295433 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
14141349 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.2557002690 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:28 AM UTC 24 |
20334954 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.386599065 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
18634357 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.1620242664 |
|
|
Sep 01 06:22:55 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
57419037 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.559669270 |
|
|
Sep 01 06:23:16 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
84145074 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_intg_err.1187312972 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
440996424 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_intg_err.903540269 |
|
|
Sep 01 06:23:21 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
778163871 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.814491197 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
36627196 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_intg_err.841115569 |
|
|
Sep 01 06:23:06 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
60540416 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.308977636 |
|
|
Sep 01 06:22:55 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
103746961 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_errors.1852749162 |
|
|
Sep 01 06:23:03 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
460133492 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.263228177 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:25 AM UTC 24 |
49004264 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_aliasing.1627663898 |
|
|
Sep 01 06:22:55 AM UTC 24 |
Sep 01 06:23:26 AM UTC 24 |
51831825 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.359219419 |
|
|
Sep 01 06:22:55 AM UTC 24 |
Sep 01 06:23:26 AM UTC 24 |
148288377 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_intg_err.3358286376 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:26 AM UTC 24 |
204122373 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.2429101390 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:26 AM UTC 24 |
316218998 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_aliasing.1582256497 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:26 AM UTC 24 |
316661822 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.1461025695 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
109744781 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_intr_test.585248774 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
35133011 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_errors.460856437 |
|
|
Sep 01 06:23:06 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
650212357 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_rw.910508442 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
68102523 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_intr_test.1873379398 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
22196066 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_rw.839034939 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
16877376 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_intr_test.1666124160 |
|
|
Sep 01 06:23:25 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
25993213 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_rw.3351296862 |
|
|
Sep 01 06:23:25 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
15323474 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.1666831230 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:27 AM UTC 24 |
70742692 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.4278035077 |
|
|
Sep 01 06:23:25 AM UTC 24 |
Sep 01 06:23:28 AM UTC 24 |
21481157 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.847073349 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:28 AM UTC 24 |
184707381 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.2570427532 |
|
|
Sep 01 06:23:25 AM UTC 24 |
Sep 01 06:23:28 AM UTC 24 |
79762085 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.3057311743 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:28 AM UTC 24 |
369014342 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.632620348 |
|
|
Sep 01 06:23:25 AM UTC 24 |
Sep 01 06:23:28 AM UTC 24 |
159041427 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_errors.4165177123 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:29 AM UTC 24 |
953849175 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.1595115480 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:29 AM UTC 24 |
387247592 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.236822214 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:29 AM UTC 24 |
110478512 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_intg_err.2246564305 |
|
|
Sep 01 06:23:25 AM UTC 24 |
Sep 01 06:23:29 AM UTC 24 |
123660082 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_intg_err.4204061256 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:29 AM UTC 24 |
124704508 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_errors.1238436196 |
|
|
Sep 01 06:23:25 AM UTC 24 |
Sep 01 06:23:30 AM UTC 24 |
182464280 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2292851403 |
|
|
Sep 01 06:22:56 AM UTC 24 |
Sep 01 06:23:30 AM UTC 24 |
933351980 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_errors.2833003845 |
|
|
Sep 01 06:23:24 AM UTC 24 |
Sep 01 06:23:30 AM UTC 24 |
474426811 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_intr_test.2927692990 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
24282539 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/20.clkmgr_intr_test.1035313631 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
21705328 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/25.clkmgr_intr_test.1096058420 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
13525383 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/22.clkmgr_intr_test.3303912661 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
12694858 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.1373790616 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
84175655 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/24.clkmgr_intr_test.2777658156 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
22759063 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/21.clkmgr_intr_test.4289236649 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
90691092 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.462452739 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
28271601 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/23.clkmgr_intr_test.2356708210 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
26551621 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/26.clkmgr_intr_test.335283364 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
18398865 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.1703329965 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:32 AM UTC 24 |
23079633 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.1968258501 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:33 AM UTC 24 |
171872465 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.3068537529 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:33 AM UTC 24 |
148152178 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_intg_err.1118884786 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:34 AM UTC 24 |
343045446 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_errors.3909545969 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:36 AM UTC 24 |
970177598 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/29.clkmgr_intr_test.1677361053 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:42 AM UTC 24 |
11374024 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/27.clkmgr_intr_test.2399541468 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:42 AM UTC 24 |
15378121 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/30.clkmgr_intr_test.2816536975 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:42 AM UTC 24 |
15155305 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/28.clkmgr_intr_test.3151023556 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:42 AM UTC 24 |
37887721 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/31.clkmgr_intr_test.1161617671 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:42 AM UTC 24 |
15428825 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/32.clkmgr_intr_test.2082522889 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:42 AM UTC 24 |
12738621 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/33.clkmgr_intr_test.850732879 |
|
|
Sep 01 06:23:30 AM UTC 24 |
Sep 01 06:23:42 AM UTC 24 |
13254054 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/34.clkmgr_intr_test.4129930296 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:52 AM UTC 24 |
23189188 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/41.clkmgr_intr_test.2824156998 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:52 AM UTC 24 |
19504361 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/39.clkmgr_intr_test.3698364852 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:52 AM UTC 24 |
11685722 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/36.clkmgr_intr_test.293904283 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:52 AM UTC 24 |
12290935 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/37.clkmgr_intr_test.3579871163 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:52 AM UTC 24 |
34020735 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/40.clkmgr_intr_test.1687091873 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:53 AM UTC 24 |
11705755 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/38.clkmgr_intr_test.3380095306 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:53 AM UTC 24 |
20525740 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/45.clkmgr_intr_test.4091952489 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:53 AM UTC 24 |
30074536 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/46.clkmgr_intr_test.168611932 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:53 AM UTC 24 |
29732063 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/43.clkmgr_intr_test.474319699 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:53 AM UTC 24 |
36858611 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_08_31/clkmgr-sim-vcs/coverage/cover_reg_top/35.clkmgr_intr_test.2798654029 |
|
|
Sep 01 06:23:31 AM UTC 24 |
Sep 01 06:23:53 AM UTC 24 |
49862823 ps |