| T803 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/47.clkmgr_alert_test.3145334273 |
|
|
Sep 04 02:03:04 AM UTC 24 |
Sep 04 02:03:06 AM UTC 24 |
35008463 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_extclk.1618128904 |
|
|
Sep 04 02:03:04 AM UTC 24 |
Sep 04 02:03:06 AM UTC 24 |
47083395 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency.1681969073 |
|
|
Sep 04 02:03:04 AM UTC 24 |
Sep 04 02:03:08 AM UTC 24 |
356730905 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_idle_intersig_mubi.585969709 |
|
|
Sep 04 02:03:06 AM UTC 24 |
Sep 04 02:03:08 AM UTC 24 |
18825317 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_ctrl_intersig_mubi.1880643222 |
|
|
Sep 04 02:03:06 AM UTC 24 |
Sep 04 02:03:08 AM UTC 24 |
28742263 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/42.clkmgr_stress_all_with_rand_reset.1013623819 |
|
|
Sep 04 02:02:44 AM UTC 24 |
Sep 04 02:03:08 AM UTC 24 |
1708308493 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_trans.1275637771 |
|
|
Sep 04 02:03:06 AM UTC 24 |
Sep 04 02:03:08 AM UTC 24 |
46133981 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_clk_handshake_intersig_mubi.3761897645 |
|
|
Sep 04 02:03:06 AM UTC 24 |
Sep 04 02:03:08 AM UTC 24 |
24049082 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_clk_byp_req_intersig_mubi.436296807 |
|
|
Sep 04 02:03:06 AM UTC 24 |
Sep 04 02:03:08 AM UTC 24 |
39523169 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_div_intersig_mubi.3038828469 |
|
|
Sep 04 02:03:06 AM UTC 24 |
Sep 04 02:03:08 AM UTC 24 |
44201700 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_clk_status.4055834090 |
|
|
Sep 04 02:03:06 AM UTC 24 |
Sep 04 02:03:08 AM UTC 24 |
123079203 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/24.clkmgr_stress_all_with_rand_reset.2835156033 |
|
|
Sep 04 02:01:10 AM UTC 24 |
Sep 04 02:03:09 AM UTC 24 |
13185907114 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_smoke.78504915 |
|
|
Sep 04 02:03:07 AM UTC 24 |
Sep 04 02:03:09 AM UTC 24 |
20897835 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_alert_test.3295275394 |
|
|
Sep 04 02:03:07 AM UTC 24 |
Sep 04 02:03:10 AM UTC 24 |
34171533 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all.3493173736 |
|
|
Sep 04 02:03:07 AM UTC 24 |
Sep 04 02:03:10 AM UTC 24 |
180052042 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_extclk.437509961 |
|
|
Sep 04 02:03:07 AM UTC 24 |
Sep 04 02:03:10 AM UTC 24 |
105201806 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_peri.3142159478 |
|
|
Sep 04 02:03:08 AM UTC 24 |
Sep 04 02:03:10 AM UTC 24 |
12251326 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_ctrl_intersig_mubi.1450395933 |
|
|
Sep 04 02:03:09 AM UTC 24 |
Sep 04 02:03:11 AM UTC 24 |
60010723 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_idle_intersig_mubi.85514943 |
|
|
Sep 04 02:03:09 AM UTC 24 |
Sep 04 02:03:11 AM UTC 24 |
24762119 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_status.2986624263 |
|
|
Sep 04 02:03:09 AM UTC 24 |
Sep 04 02:03:11 AM UTC 24 |
18000436 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_trans.1445293708 |
|
|
Sep 04 02:03:08 AM UTC 24 |
Sep 04 02:03:11 AM UTC 24 |
27345518 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_regwen.2465537052 |
|
|
Sep 04 02:03:07 AM UTC 24 |
Sep 04 02:03:11 AM UTC 24 |
387345902 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_handshake_intersig_mubi.184880157 |
|
|
Sep 04 02:03:09 AM UTC 24 |
Sep 04 02:03:11 AM UTC 24 |
21163711 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_clk_byp_req_intersig_mubi.3119159741 |
|
|
Sep 04 02:03:09 AM UTC 24 |
Sep 04 02:03:11 AM UTC 24 |
21809208 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_div_intersig_mubi.1966345769 |
|
|
Sep 04 02:03:09 AM UTC 24 |
Sep 04 02:03:11 AM UTC 24 |
35418782 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/47.clkmgr_regwen.1401080989 |
|
|
Sep 04 02:03:04 AM UTC 24 |
Sep 04 02:03:12 AM UTC 24 |
752529043 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency_timeout.620294165 |
|
|
Sep 04 02:03:04 AM UTC 24 |
Sep 04 02:03:13 AM UTC 24 |
1479919385 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency.3121863865 |
|
|
Sep 04 02:03:07 AM UTC 24 |
Sep 04 02:03:13 AM UTC 24 |
815389256 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_alert_test.2266802555 |
|
|
Sep 04 02:03:11 AM UTC 24 |
Sep 04 02:03:13 AM UTC 24 |
18442364 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency_timeout.413090226 |
|
|
Sep 04 02:03:02 AM UTC 24 |
Sep 04 02:03:14 AM UTC 24 |
2060569386 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/34.clkmgr_stress_all_with_rand_reset.1742237440 |
|
|
Sep 04 02:02:05 AM UTC 24 |
Sep 04 02:03:14 AM UTC 24 |
7077737373 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency.3136889993 |
|
|
Sep 04 02:03:01 AM UTC 24 |
Sep 04 02:03:15 AM UTC 24 |
2614306625 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all.3559598552 |
|
|
Sep 04 02:02:49 AM UTC 24 |
Sep 04 02:03:16 AM UTC 24 |
6052910235 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/44.clkmgr_stress_all.344032955 |
|
|
Sep 04 02:02:53 AM UTC 24 |
Sep 04 02:03:16 AM UTC 24 |
3305417482 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all.1333699478 |
|
|
Sep 04 02:03:01 AM UTC 24 |
Sep 04 02:03:16 AM UTC 24 |
2658703061 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/32.clkmgr_stress_all_with_rand_reset.1846902618 |
|
|
Sep 04 02:01:54 AM UTC 24 |
Sep 04 02:03:17 AM UTC 24 |
12826497698 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/25.clkmgr_stress_all_with_rand_reset.2436790375 |
|
|
Sep 04 02:01:15 AM UTC 24 |
Sep 04 02:03:17 AM UTC 24 |
15155625796 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_regwen.136605690 |
|
|
Sep 04 02:03:10 AM UTC 24 |
Sep 04 02:03:18 AM UTC 24 |
1519984396 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all.2636962771 |
|
|
Sep 04 02:03:10 AM UTC 24 |
Sep 04 02:03:20 AM UTC 24 |
2788907197 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/40.clkmgr_stress_all_with_rand_reset.2112878722 |
|
|
Sep 04 02:02:37 AM UTC 24 |
Sep 04 02:03:25 AM UTC 24 |
2832919164 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/37.clkmgr_stress_all_with_rand_reset.733807655 |
|
|
Sep 04 02:02:24 AM UTC 24 |
Sep 04 02:03:25 AM UTC 24 |
8725867771 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency_timeout.279046704 |
|
|
Sep 04 02:03:08 AM UTC 24 |
Sep 04 02:03:28 AM UTC 24 |
2417911189 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/30.clkmgr_stress_all_with_rand_reset.1560221707 |
|
|
Sep 04 02:01:44 AM UTC 24 |
Sep 04 02:03:29 AM UTC 24 |
14460485733 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/39.clkmgr_stress_all.2965607485 |
|
|
Sep 04 02:02:33 AM UTC 24 |
Sep 04 02:03:30 AM UTC 24 |
7234485980 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all.1942086455 |
|
|
Sep 04 02:02:57 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
5427118400 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all_with_rand_reset.3161148131 |
|
|
Sep 04 02:02:56 AM UTC 24 |
Sep 04 02:03:34 AM UTC 24 |
2061059740 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/44.clkmgr_stress_all_with_rand_reset.4264435849 |
|
|
Sep 04 02:02:52 AM UTC 24 |
Sep 04 02:03:35 AM UTC 24 |
3359110782 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all_with_rand_reset.1647915900 |
|
|
Sep 04 02:03:07 AM UTC 24 |
Sep 04 02:03:39 AM UTC 24 |
2043701362 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/36.clkmgr_stress_all_with_rand_reset.1106179201 |
|
|
Sep 04 02:02:18 AM UTC 24 |
Sep 04 02:03:42 AM UTC 24 |
11436502472 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all_with_rand_reset.1410665964 |
|
|
Sep 04 02:03:10 AM UTC 24 |
Sep 04 02:04:27 AM UTC 24 |
8762221517 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all_with_rand_reset.1582477067 |
|
|
Sep 04 02:03:00 AM UTC 24 |
Sep 04 02:04:30 AM UTC 24 |
16150732926 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/39.clkmgr_stress_all_with_rand_reset.2967356278 |
|
|
Sep 04 02:02:33 AM UTC 24 |
Sep 04 02:04:31 AM UTC 24 |
18506795490 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all_with_rand_reset.1963986834 |
|
|
Sep 04 02:02:49 AM UTC 24 |
Sep 04 02:04:31 AM UTC 24 |
15800236766 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all.4206425963 |
|
|
Sep 04 02:03:04 AM UTC 24 |
Sep 04 02:04:31 AM UTC 24 |
10699107596 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all_with_rand_reset.164260146 |
|
|
Sep 04 02:03:04 AM UTC 24 |
Sep 04 02:04:44 AM UTC 24 |
18698070824 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_intr_test.1891401532 |
|
|
Sep 04 02:03:12 AM UTC 24 |
Sep 04 02:03:14 AM UTC 24 |
13235187 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.1862161848 |
|
|
Sep 04 02:03:12 AM UTC 24 |
Sep 04 02:03:14 AM UTC 24 |
19835656 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_rw.148689886 |
|
|
Sep 04 02:03:12 AM UTC 24 |
Sep 04 02:03:14 AM UTC 24 |
74062741 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.180200156 |
|
|
Sep 04 02:03:11 AM UTC 24 |
Sep 04 02:03:15 AM UTC 24 |
88271072 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_aliasing.1828251762 |
|
|
Sep 04 02:03:12 AM UTC 24 |
Sep 04 02:03:15 AM UTC 24 |
196797281 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.4104483057 |
|
|
Sep 04 02:03:13 AM UTC 24 |
Sep 04 02:03:15 AM UTC 24 |
32455681 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.4186105631 |
|
|
Sep 04 02:03:11 AM UTC 24 |
Sep 04 02:03:15 AM UTC 24 |
141956594 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.2184332445 |
|
|
Sep 04 02:03:25 AM UTC 24 |
Sep 04 02:03:28 AM UTC 24 |
24119654 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_errors.506147256 |
|
|
Sep 04 02:03:11 AM UTC 24 |
Sep 04 02:03:16 AM UTC 24 |
40850743 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.1721278286 |
|
|
Sep 04 02:03:13 AM UTC 24 |
Sep 04 02:03:16 AM UTC 24 |
100943363 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_intg_err.4149489600 |
|
|
Sep 04 02:03:11 AM UTC 24 |
Sep 04 02:03:16 AM UTC 24 |
312199519 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_intr_test.3486867958 |
|
|
Sep 04 02:03:14 AM UTC 24 |
Sep 04 02:03:16 AM UTC 24 |
27078206 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.2398993457 |
|
|
Sep 04 02:03:12 AM UTC 24 |
Sep 04 02:03:16 AM UTC 24 |
145315410 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.160455709 |
|
|
Sep 04 02:03:14 AM UTC 24 |
Sep 04 02:03:17 AM UTC 24 |
68666033 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_errors.200484151 |
|
|
Sep 04 02:03:14 AM UTC 24 |
Sep 04 02:03:17 AM UTC 24 |
73033310 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.1927359470 |
|
|
Sep 04 02:03:15 AM UTC 24 |
Sep 04 02:03:17 AM UTC 24 |
58874429 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_rw.9487003 |
|
|
Sep 04 02:03:15 AM UTC 24 |
Sep 04 02:03:17 AM UTC 24 |
64686453 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.1955323697 |
|
|
Sep 04 02:03:16 AM UTC 24 |
Sep 04 02:03:18 AM UTC 24 |
104354000 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_aliasing.1632666201 |
|
|
Sep 04 02:03:16 AM UTC 24 |
Sep 04 02:03:18 AM UTC 24 |
63724702 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_intg_err.2523461534 |
|
|
Sep 04 02:03:14 AM UTC 24 |
Sep 04 02:03:18 AM UTC 24 |
222105287 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.3944023682 |
|
|
Sep 04 02:03:14 AM UTC 24 |
Sep 04 02:03:19 AM UTC 24 |
145417134 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_intr_test.1583021067 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:19 AM UTC 24 |
16361654 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.3988227504 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:19 AM UTC 24 |
51634210 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.2344556918 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:19 AM UTC 24 |
45812970 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_rw.2606598513 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:19 AM UTC 24 |
60350215 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.3824436930 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:20 AM UTC 24 |
146197971 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_aliasing.3545680689 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:20 AM UTC 24 |
53047511 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.214391702 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:20 AM UTC 24 |
115650178 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.3548704000 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:20 AM UTC 24 |
174603363 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_intr_test.3908549801 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:21 AM UTC 24 |
12010334 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1841296749 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:21 AM UTC 24 |
31024369 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_errors.1122952669 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:21 AM UTC 24 |
95955861 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_intg_err.1140174620 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:21 AM UTC 24 |
120420041 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.2162119550 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:21 AM UTC 24 |
65423814 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_rw.3867059 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:21 AM UTC 24 |
79186224 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.1704929452 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:21 AM UTC 24 |
32836870 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_aliasing.2325703309 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:22 AM UTC 24 |
107124518 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_errors.1177333636 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:22 AM UTC 24 |
96377221 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.2615315141 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:22 AM UTC 24 |
110094357 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_intr_test.3734123648 |
|
|
Sep 04 02:03:21 AM UTC 24 |
Sep 04 02:03:23 AM UTC 24 |
30886341 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.2517379947 |
|
|
Sep 04 02:03:20 AM UTC 24 |
Sep 04 02:03:23 AM UTC 24 |
199650443 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.784933412 |
|
|
Sep 04 02:03:21 AM UTC 24 |
Sep 04 02:03:23 AM UTC 24 |
35134381 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.507087671 |
|
|
Sep 04 02:03:20 AM UTC 24 |
Sep 04 02:03:23 AM UTC 24 |
42896011 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_intg_err.2046390391 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:23 AM UTC 24 |
815445723 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.4216293465 |
|
|
Sep 04 02:03:20 AM UTC 24 |
Sep 04 02:03:24 AM UTC 24 |
114285198 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.883978298 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:30 AM UTC 24 |
209482530 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_rw.2077671590 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:24 AM UTC 24 |
14244407 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.2187306892 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:24 AM UTC 24 |
64143591 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_intr_test.3893243693 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:25 AM UTC 24 |
12232155 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_errors.2451972235 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:25 AM UTC 24 |
33630739 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_intg_err.3854136725 |
|
|
Sep 04 02:03:20 AM UTC 24 |
Sep 04 02:03:25 AM UTC 24 |
418936185 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.4275640722 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:25 AM UTC 24 |
73496568 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_errors.2987407297 |
|
|
Sep 04 02:03:20 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
114666282 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_aliasing.2670337356 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
138678666 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.46723689 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
166480403 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.1739925652 |
|
|
Sep 04 02:03:24 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
80982309 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_rw.78793739 |
|
|
Sep 04 02:03:24 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
41952398 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.284575059 |
|
|
Sep 04 02:03:20 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
866352864 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.3193609918 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
294449915 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_intg_err.2794957205 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
189263826 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.3966696038 |
|
|
Sep 04 02:03:16 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
1070817791 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.2967296827 |
|
|
Sep 04 02:03:17 AM UTC 24 |
Sep 04 02:03:26 AM UTC 24 |
658033408 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1479322671 |
|
|
Sep 04 02:03:24 AM UTC 24 |
Sep 04 02:03:27 AM UTC 24 |
59602887 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_intr_test.1825041931 |
|
|
Sep 04 02:03:25 AM UTC 24 |
Sep 04 02:03:27 AM UTC 24 |
47108606 ps |
| T142 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.2578457906 |
|
|
Sep 04 02:03:24 AM UTC 24 |
Sep 04 02:03:27 AM UTC 24 |
283735115 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_rw.3878440710 |
|
|
Sep 04 02:03:25 AM UTC 24 |
Sep 04 02:03:27 AM UTC 24 |
52822792 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.2130058513 |
|
|
Sep 04 02:03:25 AM UTC 24 |
Sep 04 02:03:28 AM UTC 24 |
45046066 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.3758511743 |
|
|
Sep 04 02:03:24 AM UTC 24 |
Sep 04 02:03:28 AM UTC 24 |
663378879 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.25744524 |
|
|
Sep 04 02:03:22 AM UTC 24 |
Sep 04 02:03:28 AM UTC 24 |
323870296 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_intr_test.2197305588 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:29 AM UTC 24 |
13393709 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_rw.4199362944 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:29 AM UTC 24 |
45770407 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_errors.539382680 |
|
|
Sep 04 02:03:24 AM UTC 24 |
Sep 04 02:03:29 AM UTC 24 |
407274125 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.4080044177 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:29 AM UTC 24 |
21492751 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_intg_err.1300597780 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:29 AM UTC 24 |
100214808 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.2251179571 |
|
|
Sep 04 02:03:24 AM UTC 24 |
Sep 04 02:03:29 AM UTC 24 |
500707078 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.3904784788 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:30 AM UTC 24 |
140454584 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.3339519443 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:30 AM UTC 24 |
232348926 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_errors.805702939 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:30 AM UTC 24 |
39517253 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.3374804690 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
97912294 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_intr_test.360921742 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
34621943 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_intg_err.896423277 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
137760687 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_errors.2008163686 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
128449008 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.921316924 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
55421375 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_rw.3670734697 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
41016314 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.3130879360 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
52230133 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_intr_test.1521562170 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
38795709 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.2767141187 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
81987963 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_rw.1343778394 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:31 AM UTC 24 |
44723131 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.2199449335 |
|
|
Sep 04 02:03:27 AM UTC 24 |
Sep 04 02:03:32 AM UTC 24 |
984183842 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.69160326 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:32 AM UTC 24 |
39457248 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.3380234791 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:32 AM UTC 24 |
82709411 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.46685906 |
|
|
Sep 04 02:03:19 AM UTC 24 |
Sep 04 02:03:33 AM UTC 24 |
1988608566 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_intr_test.3188883666 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:33 AM UTC 24 |
29882346 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_rw.1719511657 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:33 AM UTC 24 |
15395407 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.1263196330 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:33 AM UTC 24 |
177219848 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.3572086221 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:33 AM UTC 24 |
83260326 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.90014255 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:33 AM UTC 24 |
26552339 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_errors.4129949172 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:33 AM UTC 24 |
285450479 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.1481501498 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:33 AM UTC 24 |
150259320 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_intg_err.3330390471 |
|
|
Sep 04 02:03:29 AM UTC 24 |
Sep 04 02:03:34 AM UTC 24 |
521587894 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_errors.1117565276 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:34 AM UTC 24 |
56648942 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.3647403537 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:34 AM UTC 24 |
148340782 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_rw.1851924232 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:35 AM UTC 24 |
56258652 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_rw.1155515167 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
21563743 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_intr_test.2260027575 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:35 AM UTC 24 |
116890842 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_intr_test.666775590 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
15456674 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.2444309550 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:35 AM UTC 24 |
275263813 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_intr_test.664389948 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:35 AM UTC 24 |
13520782 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.1276523038 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
39827463 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_rw.3095446205 |
|
|
Sep 04 02:03:34 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
25984138 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.702610842 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
55553045 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.1022896444 |
|
|
Sep 04 02:03:34 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
29260855 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_intg_err.2151048206 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
139757119 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.3277638305 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
103562775 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.1745170880 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
878894559 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_errors.2493134331 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
81516355 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.3544066925 |
|
|
Sep 04 02:03:34 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
38076372 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.4294381135 |
|
|
Sep 04 02:03:34 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
77270372 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_errors.230059947 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
443737497 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_intg_err.2013999939 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:36 AM UTC 24 |
87862059 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.674931552 |
|
|
Sep 04 02:03:34 AM UTC 24 |
Sep 04 02:03:37 AM UTC 24 |
55204064 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.829424392 |
|
|
Sep 04 02:03:33 AM UTC 24 |
Sep 04 02:03:37 AM UTC 24 |
154439364 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_intg_err.1873612406 |
|
|
Sep 04 02:03:34 AM UTC 24 |
Sep 04 02:03:38 AM UTC 24 |
200807678 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_errors.1486345895 |
|
|
Sep 04 02:03:34 AM UTC 24 |
Sep 04 02:03:38 AM UTC 24 |
261007279 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_intg_err.1107956898 |
|
|
Sep 04 02:03:31 AM UTC 24 |
Sep 04 02:03:38 AM UTC 24 |
1194062058 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_intr_test.3867173832 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:45 AM UTC 24 |
166732773 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_intr_test.2068544651 |
|
|
Sep 04 02:03:37 AM UTC 24 |
Sep 04 02:03:39 AM UTC 24 |
15118473 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_intr_test.3798564539 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:39 AM UTC 24 |
12578217 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_rw.1889025232 |
|
|
Sep 04 02:03:37 AM UTC 24 |
Sep 04 02:03:39 AM UTC 24 |
175943946 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_errors.1052984235 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
63118179 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.4141555952 |
|
|
Sep 04 02:03:37 AM UTC 24 |
Sep 04 02:03:39 AM UTC 24 |
38232390 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.4229163046 |
|
|
Sep 04 02:03:37 AM UTC 24 |
Sep 04 02:03:40 AM UTC 24 |
130033192 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_rw.1092144606 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:40 AM UTC 24 |
18228731 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_intr_test.3378621486 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
12919133 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_intr_test.4244608933 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:40 AM UTC 24 |
25955824 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.397330066 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:40 AM UTC 24 |
103709478 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.424883781 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:40 AM UTC 24 |
67463781 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_rw.1818983470 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:40 AM UTC 24 |
42642958 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.1150746106 |
|
|
Sep 04 02:03:37 AM UTC 24 |
Sep 04 02:03:40 AM UTC 24 |
233483850 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.3006613973 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:40 AM UTC 24 |
82235139 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.3095790702 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:40 AM UTC 24 |
158845311 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.3833521051 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:41 AM UTC 24 |
88603425 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_intg_err.2275839489 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:41 AM UTC 24 |
93696206 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_errors.1059833378 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:41 AM UTC 24 |
28530209 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.1874054595 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:41 AM UTC 24 |
97317877 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.3758230390 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:41 AM UTC 24 |
136808570 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_intg_err.4172450393 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:41 AM UTC 24 |
76787320 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.2563353431 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:41 AM UTC 24 |
122540223 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_intg_err.2978736213 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:41 AM UTC 24 |
195977230 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_errors.2106144409 |
|
|
Sep 04 02:03:37 AM UTC 24 |
Sep 04 02:03:42 AM UTC 24 |
205677660 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_errors.641743789 |
|
|
Sep 04 02:03:38 AM UTC 24 |
Sep 04 02:03:42 AM UTC 24 |
398224527 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.4132108800 |
|
|
Sep 04 02:03:37 AM UTC 24 |
Sep 04 02:03:42 AM UTC 24 |
1059048913 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_rw.554999815 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:45 AM UTC 24 |
49907631 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_intr_test.2326654738 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:45 AM UTC 24 |
20985667 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_rw.1629282204 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
36317280 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.513753911 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:45 AM UTC 24 |
69277723 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.1987870321 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
61532478 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.1495994931 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
152582726 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.121727080 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
36053197 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/21.clkmgr_intr_test.693607317 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
15646483 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_rw.4152826843 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
72850379 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/20.clkmgr_intr_test.3138948313 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
15412287 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.3557013880 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
30087777 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.587021954 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
27349124 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.402218493 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:46 AM UTC 24 |
72343843 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.804973835 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:47 AM UTC 24 |
113220369 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_intg_err.3836863419 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:47 AM UTC 24 |
124348118 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.165950659 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:47 AM UTC 24 |
145278052 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.3310189277 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:47 AM UTC 24 |
88608392 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_intg_err.2228395715 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:47 AM UTC 24 |
88218834 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.467541167 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:47 AM UTC 24 |
150949423 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.3087548017 |
|
|
Sep 04 02:03:43 AM UTC 24 |
Sep 04 02:03:47 AM UTC 24 |
250259870 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.3048513196 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:47 AM UTC 24 |
203671718 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.3066018795 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:48 AM UTC 24 |
590220409 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_intg_err.1815198461 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:48 AM UTC 24 |
139236823 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_errors.3015888327 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:48 AM UTC 24 |
335532454 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_errors.689564432 |
|
|
Sep 04 02:03:44 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
1659696250 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/22.clkmgr_intr_test.346902777 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
12816568 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/23.clkmgr_intr_test.1824707393 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
11156583 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/24.clkmgr_intr_test.2437686606 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
41195925 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/28.clkmgr_intr_test.568053017 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
28449888 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/26.clkmgr_intr_test.1236156477 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
22170022 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/27.clkmgr_intr_test.2296884204 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
13794967 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/25.clkmgr_intr_test.3658984690 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
18182014 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/30.clkmgr_intr_test.1604925433 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
17920317 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/29.clkmgr_intr_test.1199064030 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
12707369 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/31.clkmgr_intr_test.2108026388 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
19239111 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/33.clkmgr_intr_test.3207803768 |
|
|
Sep 04 02:03:51 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
14103164 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/32.clkmgr_intr_test.177823200 |
|
|
Sep 04 02:03:50 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
32288070 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/35.clkmgr_intr_test.2390908810 |
|
|
Sep 04 02:03:51 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
13632297 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/36.clkmgr_intr_test.1515591640 |
|
|
Sep 04 02:03:51 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
29502767 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/38.clkmgr_intr_test.4218319281 |
|
|
Sep 04 02:03:51 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
14601811 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/40.clkmgr_intr_test.1220416935 |
|
|
Sep 04 02:03:51 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
14739253 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/34.clkmgr_intr_test.1223013039 |
|
|
Sep 04 02:03:51 AM UTC 24 |
Sep 04 02:03:52 AM UTC 24 |
76934919 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_09_03/clkmgr-sim-vcs/coverage/cover_reg_top/37.clkmgr_intr_test.2683613429 |
|
|
Sep 04 02:03:51 AM UTC 24 |
Sep 04 02:03:53 AM UTC 24 |
26689946 ps |