| T806 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_ctrl_intersig_mubi.3702411715 |
|
|
Sep 09 05:17:22 AM UTC 24 |
Sep 09 05:17:24 AM UTC 24 |
22943881 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_clk_handshake_intersig_mubi.2490833144 |
|
|
Sep 09 05:17:23 AM UTC 24 |
Sep 09 05:17:25 AM UTC 24 |
39671623 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_lc_clk_byp_req_intersig_mubi.2918671346 |
|
|
Sep 09 05:17:22 AM UTC 24 |
Sep 09 05:17:25 AM UTC 24 |
40703880 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_idle_intersig_mubi.400931501 |
|
|
Sep 09 05:17:22 AM UTC 24 |
Sep 09 05:17:25 AM UTC 24 |
80611169 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency.879808824 |
|
|
Sep 09 05:17:16 AM UTC 24 |
Sep 09 05:17:25 AM UTC 24 |
1735164724 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_div_intersig_mubi.538597842 |
|
|
Sep 09 05:17:24 AM UTC 24 |
Sep 09 05:17:26 AM UTC 24 |
69023081 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/44.clkmgr_frequency_timeout.2030646497 |
|
|
Sep 09 05:17:02 AM UTC 24 |
Sep 09 05:17:26 AM UTC 24 |
2427895602 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/46.clkmgr_frequency_timeout.3951902304 |
|
|
Sep 09 05:17:12 AM UTC 24 |
Sep 09 05:17:27 AM UTC 24 |
1461900580 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_alert_test.1032148326 |
|
|
Sep 09 05:17:25 AM UTC 24 |
Sep 09 05:17:27 AM UTC 24 |
14572325 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_extclk.2207257505 |
|
|
Sep 09 05:17:25 AM UTC 24 |
Sep 09 05:17:27 AM UTC 24 |
37919002 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_smoke.3850200446 |
|
|
Sep 09 05:17:25 AM UTC 24 |
Sep 09 05:17:27 AM UTC 24 |
76741676 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/42.clkmgr_stress_all_with_rand_reset.2613859056 |
|
|
Sep 09 05:16:54 AM UTC 24 |
Sep 09 05:17:28 AM UTC 24 |
3128466561 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_status.4145921779 |
|
|
Sep 09 05:17:26 AM UTC 24 |
Sep 09 05:17:28 AM UTC 24 |
24669937 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_peri.3229156434 |
|
|
Sep 09 05:17:26 AM UTC 24 |
Sep 09 05:17:28 AM UTC 24 |
48503801 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_idle_intersig_mubi.3875265611 |
|
|
Sep 09 05:17:26 AM UTC 24 |
Sep 09 05:17:28 AM UTC 24 |
14187573 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_trans.3688225915 |
|
|
Sep 09 05:17:26 AM UTC 24 |
Sep 09 05:17:29 AM UTC 24 |
32624099 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/45.clkmgr_frequency.340623328 |
|
|
Sep 09 05:17:07 AM UTC 24 |
Sep 09 05:17:29 AM UTC 24 |
2359430152 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency_timeout.1672690890 |
|
|
Sep 09 05:17:21 AM UTC 24 |
Sep 09 05:17:29 AM UTC 24 |
1594838270 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_ctrl_intersig_mubi.2246190034 |
|
|
Sep 09 05:17:27 AM UTC 24 |
Sep 09 05:17:30 AM UTC 24 |
44237772 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_div_intersig_mubi.2435748010 |
|
|
Sep 09 05:17:28 AM UTC 24 |
Sep 09 05:17:30 AM UTC 24 |
19468440 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_lc_clk_byp_req_intersig_mubi.3540932357 |
|
|
Sep 09 05:17:28 AM UTC 24 |
Sep 09 05:17:30 AM UTC 24 |
29002936 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_clk_handshake_intersig_mubi.3094464846 |
|
|
Sep 09 05:17:28 AM UTC 24 |
Sep 09 05:17:30 AM UTC 24 |
52043233 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_frequency.2732765121 |
|
|
Sep 09 05:17:21 AM UTC 24 |
Sep 09 05:17:30 AM UTC 24 |
1346112308 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_alert_test.4174706040 |
|
|
Sep 09 05:17:29 AM UTC 24 |
Sep 09 05:17:31 AM UTC 24 |
48719554 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/41.clkmgr_stress_all.144722339 |
|
|
Sep 09 05:16:51 AM UTC 24 |
Sep 09 05:17:31 AM UTC 24 |
4906847237 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/34.clkmgr_stress_all_with_rand_reset.3667703722 |
|
|
Sep 09 05:16:21 AM UTC 24 |
Sep 09 05:17:31 AM UTC 24 |
10480464356 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/38.clkmgr_stress_all_with_rand_reset.271196502 |
|
|
Sep 09 05:16:39 AM UTC 24 |
Sep 09 05:17:32 AM UTC 24 |
3253748293 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_regwen.3110734684 |
|
|
Sep 09 05:17:25 AM UTC 24 |
Sep 09 05:17:33 AM UTC 24 |
1149501861 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all.3533432446 |
|
|
Sep 09 05:17:00 AM UTC 24 |
Sep 09 05:17:35 AM UTC 24 |
4410225666 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/32.clkmgr_stress_all_with_rand_reset.3170572717 |
|
|
Sep 09 05:16:07 AM UTC 24 |
Sep 09 05:17:37 AM UTC 24 |
21334267523 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency.145634084 |
|
|
Sep 09 05:17:25 AM UTC 24 |
Sep 09 05:17:38 AM UTC 24 |
2229469565 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/39.clkmgr_stress_all.3955450543 |
|
|
Sep 09 05:16:44 AM UTC 24 |
Sep 09 05:17:38 AM UTC 24 |
6413506913 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/47.clkmgr_frequency_timeout.2498515449 |
|
|
Sep 09 05:17:17 AM UTC 24 |
Sep 09 05:17:38 AM UTC 24 |
2417221172 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_regwen.334167572 |
|
|
Sep 09 05:17:29 AM UTC 24 |
Sep 09 05:17:38 AM UTC 24 |
797203295 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/37.clkmgr_stress_all.3823568656 |
|
|
Sep 09 05:16:36 AM UTC 24 |
Sep 09 05:17:39 AM UTC 24 |
7828823215 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_frequency_timeout.2680778697 |
|
|
Sep 09 05:17:26 AM UTC 24 |
Sep 09 05:17:39 AM UTC 24 |
2095719421 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/44.clkmgr_stress_all_with_rand_reset.3609800702 |
|
|
Sep 09 05:17:06 AM UTC 24 |
Sep 09 05:17:40 AM UTC 24 |
2313401379 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/36.clkmgr_stress_all_with_rand_reset.692148643 |
|
|
Sep 09 05:16:32 AM UTC 24 |
Sep 09 05:17:42 AM UTC 24 |
7727231766 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/44.clkmgr_stress_all.376344158 |
|
|
Sep 09 05:17:06 AM UTC 24 |
Sep 09 05:17:43 AM UTC 24 |
8192868246 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/42.clkmgr_stress_all.761262107 |
|
|
Sep 09 05:16:55 AM UTC 24 |
Sep 09 05:17:44 AM UTC 24 |
6293686558 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all.4063159626 |
|
|
Sep 09 05:17:11 AM UTC 24 |
Sep 09 05:17:47 AM UTC 24 |
6171011480 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all_with_rand_reset.850822390 |
|
|
Sep 09 05:17:15 AM UTC 24 |
Sep 09 05:17:48 AM UTC 24 |
2043277800 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/33.clkmgr_stress_all_with_rand_reset.1855778072 |
|
|
Sep 09 05:16:15 AM UTC 24 |
Sep 09 05:17:50 AM UTC 24 |
5067315414 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/43.clkmgr_stress_all_with_rand_reset.2660068117 |
|
|
Sep 09 05:17:00 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
7760250927 ps |
| T848 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/46.clkmgr_stress_all.1750657297 |
|
|
Sep 09 05:17:16 AM UTC 24 |
Sep 09 05:17:59 AM UTC 24 |
9700032015 ps |
| T849 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all.3646886137 |
|
|
Sep 09 05:17:25 AM UTC 24 |
Sep 09 05:18:02 AM UTC 24 |
5860416934 ps |
| T850 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/40.clkmgr_stress_all_with_rand_reset.3928305084 |
|
|
Sep 09 05:16:47 AM UTC 24 |
Sep 09 05:18:18 AM UTC 24 |
8231285249 ps |
| T851 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/45.clkmgr_stress_all_with_rand_reset.3895446224 |
|
|
Sep 09 05:17:11 AM UTC 24 |
Sep 09 05:18:26 AM UTC 24 |
5122429122 ps |
| T852 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/28.clkmgr_stress_all_with_rand_reset.1771879654 |
|
|
Sep 09 05:15:47 AM UTC 24 |
Sep 09 05:18:30 AM UTC 24 |
41300653632 ps |
| T853 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all.4050940320 |
|
|
Sep 09 05:17:29 AM UTC 24 |
Sep 09 05:18:32 AM UTC 24 |
8162852045 ps |
| T854 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/49.clkmgr_stress_all_with_rand_reset.1248120714 |
|
|
Sep 09 05:17:29 AM UTC 24 |
Sep 09 05:18:41 AM UTC 24 |
5060375173 ps |
| T855 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/29.clkmgr_stress_all_with_rand_reset.3423370416 |
|
|
Sep 09 05:15:51 AM UTC 24 |
Sep 09 05:18:51 AM UTC 24 |
35216941679 ps |
| T856 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/47.clkmgr_stress_all_with_rand_reset.2857962917 |
|
|
Sep 09 05:17:20 AM UTC 24 |
Sep 09 05:18:54 AM UTC 24 |
14460380034 ps |
| T857 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/48.clkmgr_stress_all_with_rand_reset.650682702 |
|
|
Sep 09 05:17:25 AM UTC 24 |
Sep 09 05:18:59 AM UTC 24 |
20288037527 ps |
| T62 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/default/41.clkmgr_stress_all_with_rand_reset.970747578 |
|
|
Sep 09 05:16:51 AM UTC 24 |
Sep 09 05:19:10 AM UTC 24 |
20404441801 ps |
| T858 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_intr_test.791740290 |
|
|
Sep 09 05:17:30 AM UTC 24 |
Sep 09 05:17:32 AM UTC 24 |
13186579 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_rw.74942301 |
|
|
Sep 09 05:17:31 AM UTC 24 |
Sep 09 05:17:34 AM UTC 24 |
19842005 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.1788460980 |
|
|
Sep 09 05:17:31 AM UTC 24 |
Sep 09 05:17:34 AM UTC 24 |
59804509 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.2352352080 |
|
|
Sep 09 05:17:29 AM UTC 24 |
Sep 09 05:17:34 AM UTC 24 |
312224062 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_aliasing.153215825 |
|
|
Sep 09 05:17:32 AM UTC 24 |
Sep 09 05:17:34 AM UTC 24 |
19349815 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.1070488506 |
|
|
Sep 09 05:17:32 AM UTC 24 |
Sep 09 05:17:35 AM UTC 24 |
93093574 ps |
| T859 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_errors.2262291532 |
|
|
Sep 09 05:17:30 AM UTC 24 |
Sep 09 05:17:35 AM UTC 24 |
89163169 ps |
| T860 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.903294512 |
|
|
Sep 09 05:17:33 AM UTC 24 |
Sep 09 05:17:35 AM UTC 24 |
58600489 ps |
| T67 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.3664859038 |
|
|
Sep 09 05:17:30 AM UTC 24 |
Sep 09 05:17:36 AM UTC 24 |
266683004 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.3495746866 |
|
|
Sep 09 05:17:33 AM UTC 24 |
Sep 09 05:17:36 AM UTC 24 |
275662957 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.559035045 |
|
|
Sep 09 05:17:33 AM UTC 24 |
Sep 09 05:17:36 AM UTC 24 |
91060953 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_tl_intg_err.2924722600 |
|
|
Sep 09 05:17:30 AM UTC 24 |
Sep 09 05:17:36 AM UTC 24 |
557906318 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_intg_err.3321461248 |
|
|
Sep 09 05:17:34 AM UTC 24 |
Sep 09 05:17:37 AM UTC 24 |
139338786 ps |
| T861 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_intr_test.1875308645 |
|
|
Sep 09 05:17:35 AM UTC 24 |
Sep 09 05:17:37 AM UTC 24 |
91415339 ps |
| T862 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_tl_errors.3400758947 |
|
|
Sep 09 05:17:33 AM UTC 24 |
Sep 09 05:17:37 AM UTC 24 |
158375063 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_rw.3349068957 |
|
|
Sep 09 05:17:35 AM UTC 24 |
Sep 09 05:17:37 AM UTC 24 |
55347656 ps |
| T863 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.1485416137 |
|
|
Sep 09 05:17:35 AM UTC 24 |
Sep 09 05:17:37 AM UTC 24 |
48256938 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_aliasing.1693844471 |
|
|
Sep 09 05:17:35 AM UTC 24 |
Sep 09 05:17:38 AM UTC 24 |
88406751 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.3952629131 |
|
|
Sep 09 05:17:36 AM UTC 24 |
Sep 09 05:17:39 AM UTC 24 |
87725714 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.1552600223 |
|
|
Sep 09 05:17:37 AM UTC 24 |
Sep 09 05:17:40 AM UTC 24 |
269056154 ps |
| T864 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_intr_test.444387968 |
|
|
Sep 09 05:17:38 AM UTC 24 |
Sep 09 05:17:40 AM UTC 24 |
12538158 ps |
| T865 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.3613545796 |
|
|
Sep 09 05:17:38 AM UTC 24 |
Sep 09 05:17:40 AM UTC 24 |
36480532 ps |
| T866 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_rw.3861952151 |
|
|
Sep 09 05:17:38 AM UTC 24 |
Sep 09 05:17:40 AM UTC 24 |
19644222 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.2783258213 |
|
|
Sep 09 05:17:37 AM UTC 24 |
Sep 09 05:17:40 AM UTC 24 |
235200109 ps |
| T867 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.821693552 |
|
|
Sep 09 05:17:38 AM UTC 24 |
Sep 09 05:17:41 AM UTC 24 |
110443236 ps |
| T868 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.1822846333 |
|
|
Sep 09 05:17:37 AM UTC 24 |
Sep 09 05:17:41 AM UTC 24 |
402567420 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.3566319354 |
|
|
Sep 09 05:17:38 AM UTC 24 |
Sep 09 05:17:41 AM UTC 24 |
88888911 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_intg_err.2533448035 |
|
|
Sep 09 05:17:38 AM UTC 24 |
Sep 09 05:17:41 AM UTC 24 |
83259137 ps |
| T869 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_aliasing.3445975836 |
|
|
Sep 09 05:17:38 AM UTC 24 |
Sep 09 05:17:41 AM UTC 24 |
32600948 ps |
| T870 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.391110629 |
|
|
Sep 09 05:17:40 AM UTC 24 |
Sep 09 05:17:41 AM UTC 24 |
15023953 ps |
| T871 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_rw.3146085436 |
|
|
Sep 09 05:17:40 AM UTC 24 |
Sep 09 05:17:42 AM UTC 24 |
43985109 ps |
| T872 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.303988630 |
|
|
Sep 09 05:17:40 AM UTC 24 |
Sep 09 05:17:42 AM UTC 24 |
29747883 ps |
| T873 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_intr_test.4080358949 |
|
|
Sep 09 05:17:40 AM UTC 24 |
Sep 09 05:17:42 AM UTC 24 |
94797808 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.1196795021 |
|
|
Sep 09 05:17:38 AM UTC 24 |
Sep 09 05:17:42 AM UTC 24 |
81718226 ps |
| T874 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_tl_errors.77431888 |
|
|
Sep 09 05:17:37 AM UTC 24 |
Sep 09 05:17:42 AM UTC 24 |
381444202 ps |
| T875 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_intr_test.1594242728 |
|
|
Sep 09 05:17:46 AM UTC 24 |
Sep 09 05:17:48 AM UTC 24 |
11019393 ps |
| T876 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_aliasing.2277678751 |
|
|
Sep 09 05:17:40 AM UTC 24 |
Sep 09 05:17:43 AM UTC 24 |
139597069 ps |
| T877 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.2193700628 |
|
|
Sep 09 05:17:31 AM UTC 24 |
Sep 09 05:17:43 AM UTC 24 |
1739511581 ps |
| T878 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_intr_test.2568267032 |
|
|
Sep 09 05:17:41 AM UTC 24 |
Sep 09 05:17:43 AM UTC 24 |
13993865 ps |
| T879 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.2279713485 |
|
|
Sep 09 05:17:41 AM UTC 24 |
Sep 09 05:17:43 AM UTC 24 |
25195714 ps |
| T880 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.379498360 |
|
|
Sep 09 05:17:41 AM UTC 24 |
Sep 09 05:17:43 AM UTC 24 |
101254628 ps |
| T72 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.1437641818 |
|
|
Sep 09 05:17:39 AM UTC 24 |
Sep 09 05:17:43 AM UTC 24 |
164040984 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_intg_err.44465085 |
|
|
Sep 09 05:17:40 AM UTC 24 |
Sep 09 05:17:44 AM UTC 24 |
166625675 ps |
| T74 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.778179102 |
|
|
Sep 09 05:17:41 AM UTC 24 |
Sep 09 05:17:44 AM UTC 24 |
92197360 ps |
| T131 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.1474548316 |
|
|
Sep 09 05:17:41 AM UTC 24 |
Sep 09 05:17:44 AM UTC 24 |
101168141 ps |
| T881 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.1195657052 |
|
|
Sep 09 05:17:43 AM UTC 24 |
Sep 09 05:17:45 AM UTC 24 |
38140655 ps |
| T882 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_aliasing.1505120206 |
|
|
Sep 09 05:17:43 AM UTC 24 |
Sep 09 05:17:45 AM UTC 24 |
35746050 ps |
| T883 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_rw.225264643 |
|
|
Sep 09 05:17:42 AM UTC 24 |
Sep 09 05:17:45 AM UTC 24 |
50792155 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_intg_err.2950924876 |
|
|
Sep 09 05:17:41 AM UTC 24 |
Sep 09 05:17:45 AM UTC 24 |
214431022 ps |
| T884 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_tl_errors.2060515063 |
|
|
Sep 09 05:17:40 AM UTC 24 |
Sep 09 05:17:45 AM UTC 24 |
488620367 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.2897384547 |
|
|
Sep 09 05:17:43 AM UTC 24 |
Sep 09 05:17:46 AM UTC 24 |
155517493 ps |
| T885 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.1685489280 |
|
|
Sep 09 05:17:43 AM UTC 24 |
Sep 09 05:17:46 AM UTC 24 |
108011406 ps |
| T886 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.249678242 |
|
|
Sep 09 05:17:38 AM UTC 24 |
Sep 09 05:17:46 AM UTC 24 |
351004034 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.523935322 |
|
|
Sep 09 05:17:43 AM UTC 24 |
Sep 09 05:17:46 AM UTC 24 |
96866092 ps |
| T887 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_intr_test.4092017559 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:46 AM UTC 24 |
12752145 ps |
| T888 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_errors.1596884026 |
|
|
Sep 09 05:17:43 AM UTC 24 |
Sep 09 05:17:46 AM UTC 24 |
181581049 ps |
| T889 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_rw.1581456087 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:46 AM UTC 24 |
15737081 ps |
| T890 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_rw.2729171765 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:46 AM UTC 24 |
54403675 ps |
| T891 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_intr_test.1890686151 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:46 AM UTC 24 |
16229865 ps |
| T892 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_tl_errors.204791741 |
|
|
Sep 09 05:17:41 AM UTC 24 |
Sep 09 05:17:47 AM UTC 24 |
512736966 ps |
| T893 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.2732218070 |
|
|
Sep 09 05:17:45 AM UTC 24 |
Sep 09 05:17:47 AM UTC 24 |
92012871 ps |
| T894 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_errors.3832130283 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:47 AM UTC 24 |
150192576 ps |
| T895 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_rw.2558384789 |
|
|
Sep 09 05:17:49 AM UTC 24 |
Sep 09 05:17:51 AM UTC 24 |
21193712 ps |
| T896 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.2694242648 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:48 AM UTC 24 |
157268005 ps |
| T897 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.1722368519 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:48 AM UTC 24 |
266771351 ps |
| T898 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_rw.2396550540 |
|
|
Sep 09 05:17:46 AM UTC 24 |
Sep 09 05:17:48 AM UTC 24 |
35512983 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.3008336862 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:48 AM UTC 24 |
129094727 ps |
| T73 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.2861934386 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:48 AM UTC 24 |
121842534 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1477203540 |
|
|
Sep 09 05:17:44 AM UTC 24 |
Sep 09 05:17:48 AM UTC 24 |
144698411 ps |
| T899 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.2770612714 |
|
|
Sep 09 05:17:46 AM UTC 24 |
Sep 09 05:17:48 AM UTC 24 |
83081469 ps |
| T900 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.1137886397 |
|
|
Sep 09 05:17:46 AM UTC 24 |
Sep 09 05:17:49 AM UTC 24 |
32639681 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_intg_err.115750855 |
|
|
Sep 09 05:17:46 AM UTC 24 |
Sep 09 05:17:49 AM UTC 24 |
69960585 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.238320427 |
|
|
Sep 09 05:17:46 AM UTC 24 |
Sep 09 05:17:49 AM UTC 24 |
218618457 ps |
| T901 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.1702489784 |
|
|
Sep 09 05:17:46 AM UTC 24 |
Sep 09 05:17:49 AM UTC 24 |
213769779 ps |
| T902 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_intr_test.2545658841 |
|
|
Sep 09 05:17:48 AM UTC 24 |
Sep 09 05:17:50 AM UTC 24 |
25023777 ps |
| T903 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.2223879698 |
|
|
Sep 09 05:17:47 AM UTC 24 |
Sep 09 05:17:50 AM UTC 24 |
30773405 ps |
| T904 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_rw.235776207 |
|
|
Sep 09 05:17:48 AM UTC 24 |
Sep 09 05:17:50 AM UTC 24 |
86108968 ps |
| T905 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/7.clkmgr_tl_errors.2876272588 |
|
|
Sep 09 05:17:46 AM UTC 24 |
Sep 09 05:17:50 AM UTC 24 |
296250865 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.3401311964 |
|
|
Sep 09 05:17:48 AM UTC 24 |
Sep 09 05:17:50 AM UTC 24 |
65164447 ps |
| T906 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.3227664109 |
|
|
Sep 09 05:17:48 AM UTC 24 |
Sep 09 05:17:50 AM UTC 24 |
31704491 ps |
| T907 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.3645127587 |
|
|
Sep 09 05:17:48 AM UTC 24 |
Sep 09 05:17:50 AM UTC 24 |
131670539 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.2197254680 |
|
|
Sep 09 05:17:47 AM UTC 24 |
Sep 09 05:17:51 AM UTC 24 |
91007887 ps |
| T908 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.111678060 |
|
|
Sep 09 05:17:40 AM UTC 24 |
Sep 09 05:17:51 AM UTC 24 |
738119273 ps |
| T909 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_intr_test.1074467592 |
|
|
Sep 09 05:17:49 AM UTC 24 |
Sep 09 05:17:51 AM UTC 24 |
11772878 ps |
| T910 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_intr_test.1995067259 |
|
|
Sep 09 05:17:50 AM UTC 24 |
Sep 09 05:17:52 AM UTC 24 |
28935529 ps |
| T911 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.3520887925 |
|
|
Sep 09 05:17:49 AM UTC 24 |
Sep 09 05:17:52 AM UTC 24 |
92244328 ps |
| T912 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.258200749 |
|
|
Sep 09 05:17:49 AM UTC 24 |
Sep 09 05:17:52 AM UTC 24 |
91022706 ps |
| T913 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_errors.2746079380 |
|
|
Sep 09 05:17:48 AM UTC 24 |
Sep 09 05:17:52 AM UTC 24 |
191836717 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_intg_err.3629431747 |
|
|
Sep 09 05:17:49 AM UTC 24 |
Sep 09 05:17:52 AM UTC 24 |
56213109 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_tl_intg_err.2282338787 |
|
|
Sep 09 05:17:48 AM UTC 24 |
Sep 09 05:17:52 AM UTC 24 |
368958725 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.2865213886 |
|
|
Sep 09 05:17:48 AM UTC 24 |
Sep 09 05:17:52 AM UTC 24 |
435366944 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.198921786 |
|
|
Sep 09 05:17:49 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
100483824 ps |
| T914 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_rw.1845768876 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
56399728 ps |
| T915 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_errors.252342457 |
|
|
Sep 09 05:17:50 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
80838414 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.2187078947 |
|
|
Sep 09 05:17:49 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
96008737 ps |
| T916 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_tl_intg_err.3006416158 |
|
|
Sep 09 05:17:50 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
179990102 ps |
| T917 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/9.clkmgr_tl_errors.2704615425 |
|
|
Sep 09 05:17:49 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
191526992 ps |
| T918 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2846895348 |
|
|
Sep 09 05:17:42 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
1423871097 ps |
| T919 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_intr_test.4293483957 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
30281069 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.2445793243 |
|
|
Sep 09 05:17:49 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
584874447 ps |
| T920 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_rw.3667181520 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
41359851 ps |
| T921 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.323717226 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
49129143 ps |
| T922 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.2368961325 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:53 AM UTC 24 |
71568991 ps |
| T923 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.2531415633 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:54 AM UTC 24 |
33711744 ps |
| T924 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.3827603207 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:54 AM UTC 24 |
154874275 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.1380056416 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:55 AM UTC 24 |
333340718 ps |
| T925 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_intr_test.1607367536 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:55 AM UTC 24 |
16251945 ps |
| T926 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_rw.3011391207 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:55 AM UTC 24 |
21907326 ps |
| T927 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_intg_err.1356702535 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:55 AM UTC 24 |
427592047 ps |
| T928 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.1424560660 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:56 AM UTC 24 |
117321259 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.4243065970 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:56 AM UTC 24 |
143313596 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.1015129423 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:56 AM UTC 24 |
109757989 ps |
| T929 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_intg_err.2350014826 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:56 AM UTC 24 |
68584198 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.3502057621 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:56 AM UTC 24 |
176207194 ps |
| T930 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.3134622612 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:56 AM UTC 24 |
424762467 ps |
| T931 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_tl_errors.2560244584 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:56 AM UTC 24 |
76451754 ps |
| T932 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_intr_test.486242094 |
|
|
Sep 09 05:17:54 AM UTC 24 |
Sep 09 05:17:56 AM UTC 24 |
14303315 ps |
| T933 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_rw.1001996772 |
|
|
Sep 09 05:18:00 AM UTC 24 |
Sep 09 05:18:02 AM UTC 24 |
15983932 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/5.clkmgr_tl_intg_err.1696072087 |
|
|
Sep 09 05:17:43 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
4225998173 ps |
| T934 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_rw.614678226 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
15885861 ps |
| T935 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_intr_test.744693982 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
34936663 ps |
| T936 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_errors.2171394249 |
|
|
Sep 09 05:17:54 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
46060331 ps |
| T937 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_rw.3656411010 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
62345825 ps |
| T938 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.1654780827 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
49731152 ps |
| T939 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.681182469 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
118487799 ps |
| T940 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.4192156986 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
22868981 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.1206844983 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
1112318140 ps |
| T941 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/13.clkmgr_tl_intg_err.3660075161 |
|
|
Sep 09 05:17:54 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
139686863 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2983867921 |
|
|
Sep 09 05:17:53 AM UTC 24 |
Sep 09 05:17:57 AM UTC 24 |
148059001 ps |
| T942 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_errors.2129202545 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:58 AM UTC 24 |
92558715 ps |
| T943 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/11.clkmgr_tl_errors.2902822174 |
|
|
Sep 09 05:17:51 AM UTC 24 |
Sep 09 05:17:58 AM UTC 24 |
1375849644 ps |
| T944 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.3625188137 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:58 AM UTC 24 |
102008679 ps |
| T130 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.503644065 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:58 AM UTC 24 |
258329291 ps |
| T945 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.1653596857 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:58 AM UTC 24 |
108190520 ps |
| T946 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.4161071899 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:58 AM UTC 24 |
228554064 ps |
| T947 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_intr_test.2731856695 |
|
|
Sep 09 05:17:57 AM UTC 24 |
Sep 09 05:17:58 AM UTC 24 |
12150322 ps |
| T948 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.3514022638 |
|
|
Sep 09 05:17:57 AM UTC 24 |
Sep 09 05:17:59 AM UTC 24 |
24237354 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/14.clkmgr_tl_intg_err.4044568441 |
|
|
Sep 09 05:17:55 AM UTC 24 |
Sep 09 05:17:59 AM UTC 24 |
233972396 ps |
| T949 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.495242818 |
|
|
Sep 09 05:17:57 AM UTC 24 |
Sep 09 05:17:59 AM UTC 24 |
72516103 ps |
| T950 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.2266065895 |
|
|
Sep 09 05:17:57 AM UTC 24 |
Sep 09 05:17:59 AM UTC 24 |
139604417 ps |
| T951 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_errors.2427927464 |
|
|
Sep 09 05:17:56 AM UTC 24 |
Sep 09 05:17:59 AM UTC 24 |
154963979 ps |
| T952 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_csr_rw.3239181593 |
|
|
Sep 09 05:17:57 AM UTC 24 |
Sep 09 05:17:59 AM UTC 24 |
207465311 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_intg_err.3282853643 |
|
|
Sep 09 05:17:57 AM UTC 24 |
Sep 09 05:17:59 AM UTC 24 |
49073825 ps |
| T953 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.560338758 |
|
|
Sep 09 05:17:56 AM UTC 24 |
Sep 09 05:17:59 AM UTC 24 |
194885599 ps |
| T954 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_intr_test.453992593 |
|
|
Sep 09 05:17:58 AM UTC 24 |
Sep 09 05:18:00 AM UTC 24 |
31066123 ps |
| T955 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.2489793568 |
|
|
Sep 09 05:17:57 AM UTC 24 |
Sep 09 05:18:00 AM UTC 24 |
88088032 ps |
| T956 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_errors.2231362983 |
|
|
Sep 09 05:17:58 AM UTC 24 |
Sep 09 05:18:01 AM UTC 24 |
51195628 ps |
| T957 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_tl_errors.3046465743 |
|
|
Sep 09 05:17:57 AM UTC 24 |
Sep 09 05:18:00 AM UTC 24 |
86964647 ps |
| T958 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_rw.2413607484 |
|
|
Sep 09 05:17:58 AM UTC 24 |
Sep 09 05:18:00 AM UTC 24 |
44858024 ps |
| T959 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_intr_test.213652984 |
|
|
Sep 09 05:17:59 AM UTC 24 |
Sep 09 05:18:00 AM UTC 24 |
13225824 ps |
| T960 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/15.clkmgr_tl_intg_err.4138034096 |
|
|
Sep 09 05:17:57 AM UTC 24 |
Sep 09 05:18:00 AM UTC 24 |
353322095 ps |
| T961 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.606631347 |
|
|
Sep 09 05:17:58 AM UTC 24 |
Sep 09 05:18:01 AM UTC 24 |
81313019 ps |
| T962 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_rw.3757717061 |
|
|
Sep 09 05:17:59 AM UTC 24 |
Sep 09 05:18:01 AM UTC 24 |
37715644 ps |
| T963 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.3453487575 |
|
|
Sep 09 05:17:59 AM UTC 24 |
Sep 09 05:18:01 AM UTC 24 |
25211405 ps |
| T964 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.3637557292 |
|
|
Sep 09 05:17:59 AM UTC 24 |
Sep 09 05:18:01 AM UTC 24 |
144959138 ps |
| T965 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.969544721 |
|
|
Sep 09 05:17:58 AM UTC 24 |
Sep 09 05:18:01 AM UTC 24 |
86951409 ps |
| T966 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.433885774 |
|
|
Sep 09 05:17:59 AM UTC 24 |
Sep 09 05:18:01 AM UTC 24 |
96598082 ps |
| T967 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.2481880034 |
|
|
Sep 09 05:17:58 AM UTC 24 |
Sep 09 05:18:01 AM UTC 24 |
340578775 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.90856578 |
|
|
Sep 09 05:17:58 AM UTC 24 |
Sep 09 05:18:02 AM UTC 24 |
194827731 ps |
| T968 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/17.clkmgr_tl_intg_err.1905474116 |
|
|
Sep 09 05:17:58 AM UTC 24 |
Sep 09 05:18:02 AM UTC 24 |
151123478 ps |
| T969 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.1233849193 |
|
|
Sep 09 05:17:59 AM UTC 24 |
Sep 09 05:18:02 AM UTC 24 |
235177363 ps |
| T970 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_errors.1127183967 |
|
|
Sep 09 05:17:59 AM UTC 24 |
Sep 09 05:18:02 AM UTC 24 |
90274178 ps |
| T971 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_intr_test.2311697051 |
|
|
Sep 09 05:18:00 AM UTC 24 |
Sep 09 05:18:02 AM UTC 24 |
56304209 ps |
| T972 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_intr_test.755800552 |
|
|
Sep 09 05:18:01 AM UTC 24 |
Sep 09 05:18:02 AM UTC 24 |
34547193 ps |
| T973 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.821019649 |
|
|
Sep 09 05:18:00 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
40023914 ps |
| T974 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/21.clkmgr_intr_test.3882157231 |
|
|
Sep 09 05:18:01 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
28262969 ps |
| T975 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_rw.508037703 |
|
|
Sep 09 05:18:01 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
24499719 ps |
| T976 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/20.clkmgr_intr_test.4086086574 |
|
|
Sep 09 05:18:01 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
11580138 ps |
| T977 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.3084836845 |
|
|
Sep 09 05:18:00 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
135678499 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.1628465190 |
|
|
Sep 09 05:18:00 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
66637478 ps |
| T978 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.3785930828 |
|
|
Sep 09 05:18:01 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
77731546 ps |
| T979 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.929475919 |
|
|
Sep 09 05:18:01 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
50972232 ps |
| T980 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/22.clkmgr_intr_test.1665134123 |
|
|
Sep 09 05:18:01 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
84798892 ps |
| T981 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.3571529517 |
|
|
Sep 09 05:18:00 AM UTC 24 |
Sep 09 05:18:03 AM UTC 24 |
62584336 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/18.clkmgr_tl_intg_err.2534116602 |
|
|
Sep 09 05:18:00 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
99126731 ps |
| T982 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_errors.1571354163 |
|
|
Sep 09 05:18:01 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
128092313 ps |
| T983 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/25.clkmgr_intr_test.2164612344 |
|
|
Sep 09 05:18:02 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
30494314 ps |
| T984 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/23.clkmgr_intr_test.2254469471 |
|
|
Sep 09 05:18:02 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
49919831 ps |
| T985 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/26.clkmgr_intr_test.422933134 |
|
|
Sep 09 05:18:02 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
32071240 ps |
| T986 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/29.clkmgr_intr_test.3721532034 |
|
|
Sep 09 05:18:02 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
28086820 ps |
| T987 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/31.clkmgr_intr_test.1842774359 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
30527117 ps |
| T988 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/27.clkmgr_intr_test.2760000658 |
|
|
Sep 09 05:18:02 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
14422059 ps |
| T989 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/24.clkmgr_intr_test.3033572947 |
|
|
Sep 09 05:18:02 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
99981101 ps |
| T990 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/34.clkmgr_intr_test.261253325 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
28126898 ps |
| T991 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/32.clkmgr_intr_test.4193235002 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
13217253 ps |
| T992 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/30.clkmgr_intr_test.2380448918 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
22681851 ps |
| T993 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/33.clkmgr_intr_test.2909156802 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
13119423 ps |
| T994 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/28.clkmgr_intr_test.1910350572 |
|
|
Sep 09 05:18:02 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
66103070 ps |
| T995 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/36.clkmgr_intr_test.166555367 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
46420931 ps |
| T996 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.445534190 |
|
|
Sep 09 05:17:35 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
7912987306 ps |
| T997 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/35.clkmgr_intr_test.4177703294 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:04 AM UTC 24 |
37348752 ps |
| T998 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/38.clkmgr_intr_test.1746308459 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:05 AM UTC 24 |
11496078 ps |
| T999 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/37.clkmgr_intr_test.2777855596 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:05 AM UTC 24 |
20776927 ps |
| T1000 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/39.clkmgr_intr_test.2133420309 |
|
|
Sep 09 05:18:03 AM UTC 24 |
Sep 09 05:18:05 AM UTC 24 |
32130786 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_09_08/clkmgr-sim-vcs/coverage/cover_reg_top/19.clkmgr_tl_intg_err.2798913665 |
|
|
Sep 09 05:18:01 AM UTC 24 |
Sep 09 05:18:05 AM UTC 24 |
398554205 ps |