Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
97.66	97.12	94.40	98.44		100.00	98.33	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	406816534	4567	0	0
addr_rd_A	406816534	928	0	0
bank0_info0_page_cfg_0_rd_A	406816534	1741	0	0
bank0_info0_page_cfg_1_rd_A	406816534	1709	0	0
bank0_info0_page_cfg_2_rd_A	406816534	1816	0	0
bank0_info0_page_cfg_3_rd_A	406816534	1786	0	0
bank0_info0_page_cfg_4_rd_A	406816534	1704	0	0
bank0_info0_page_cfg_5_rd_A	406816534	1723	0	0
bank0_info0_page_cfg_6_rd_A	406816534	1714	0	0
bank0_info0_page_cfg_7_rd_A	406816534	1777	0	0
bank0_info0_page_cfg_8_rd_A	406816534	1541	0	0
bank0_info0_page_cfg_9_rd_A	406816534	1927	0	0
bank0_info0_regwen_0_rd_A	406816534	964	0	0
bank0_info0_regwen_1_rd_A	406816534	871	0	0
bank0_info0_regwen_2_rd_A	406816534	943	0	0
bank0_info0_regwen_3_rd_A	406816534	901	0	0
bank0_info0_regwen_4_rd_A	406816534	1040	0	0
bank0_info0_regwen_5_rd_A	406816534	951	0	0
bank0_info0_regwen_6_rd_A	406816534	1059	0	0
bank0_info0_regwen_7_rd_A	406816534	887	0	0
bank0_info0_regwen_8_rd_A	406816534	933	0	0
bank0_info0_regwen_9_rd_A	406816534	964	0	0
bank0_info1_page_cfg_rd_A	406816534	1593	0	0
bank0_info1_regwen_rd_A	406816534	913	0	0
bank0_info2_page_cfg_0_rd_A	406816534	1747	0	0
bank0_info2_page_cfg_1_rd_A	406816534	1747	0	0
bank0_info2_regwen_0_rd_A	406816534	969	0	0
bank0_info2_regwen_1_rd_A	406816534	1051	0	0
bank1_info0_page_cfg_0_rd_A	406816534	1671	0	0
bank1_info0_page_cfg_1_rd_A	406816534	1621	0	0
bank1_info0_page_cfg_2_rd_A	406816534	1548	0	0
bank1_info0_page_cfg_3_rd_A	406816534	1822	0	0
bank1_info0_page_cfg_4_rd_A	406816534	1731	0	0
bank1_info0_page_cfg_5_rd_A	406816534	1635	0	0
bank1_info0_page_cfg_6_rd_A	406816534	1866	0	0
bank1_info0_page_cfg_7_rd_A	406816534	1834	0	0
bank1_info0_page_cfg_8_rd_A	406816534	1672	0	0
bank1_info0_page_cfg_9_rd_A	406816534	1666	0	0
bank1_info0_regwen_0_rd_A	406816534	1062	0	0
bank1_info0_regwen_1_rd_A	406816534	970	0	0
bank1_info0_regwen_2_rd_A	406816534	970	0	0
bank1_info0_regwen_3_rd_A	406816534	922	0	0
bank1_info0_regwen_4_rd_A	406816534	1005	0	0
bank1_info0_regwen_5_rd_A	406816534	902	0	0
bank1_info0_regwen_6_rd_A	406816534	911	0	0
bank1_info0_regwen_7_rd_A	406816534	984	0	0
bank1_info0_regwen_8_rd_A	406816534	976	0	0
bank1_info0_regwen_9_rd_A	406816534	1037	0	0
bank1_info1_page_cfg_rd_A	406816534	1803	0	0
bank1_info1_regwen_rd_A	406816534	983	0	0
bank1_info2_page_cfg_0_rd_A	406816534	1692	0	0
bank1_info2_page_cfg_1_rd_A	406816534	1635	0	0
bank1_info2_regwen_0_rd_A	406816534	962	0	0
bank1_info2_regwen_1_rd_A	406816534	1114	0	0
bank_cfg_regwen_rd_A	406816534	988	0	0
default_region_rd_A	406816534	1602	0	0
exec_rd_A	406816534	951	0	0
fifo_lvl_rd_A	406816534	1106	0	0
fifo_rst_rd_A	406816534	970	0	0
hw_info_cfg_override_rd_A	406816534	1202	0	0
intr_enable_rd_A	406816534	1452	0	0
mp_region_0_rd_A	406816534	1138	0	0
mp_region_1_rd_A	406816534	1030	0	0
mp_region_2_rd_A	406816534	1019	0	0
mp_region_3_rd_A	406816534	1102	0	0
mp_region_4_rd_A	406816534	1223	0	0
mp_region_5_rd_A	406816534	1064	0	0
mp_region_6_rd_A	406816534	1020	0	0
mp_region_7_rd_A	406816534	1011	0	0
mp_region_cfg_0_rd_A	406816534	1731	0	0
mp_region_cfg_1_rd_A	406816534	1792	0	0
mp_region_cfg_2_rd_A	406816534	1578	0	0
mp_region_cfg_3_rd_A	406816534	1969	0	0
mp_region_cfg_4_rd_A	406816534	1568	0	0
mp_region_cfg_5_rd_A	406816534	1674	0	0
mp_region_cfg_6_rd_A	406816534	1520	0	0
mp_region_cfg_7_rd_A	406816534	1565	0	0
phy_alert_cfg_rd_A	406816534	236	0	0
region_cfg_regwen_0_rd_A	406816534	866	0	0
region_cfg_regwen_1_rd_A	406816534	984	0	0
region_cfg_regwen_2_rd_A	406816534	1100	0	0
region_cfg_regwen_3_rd_A	406816534	906	0	0
region_cfg_regwen_4_rd_A	406816534	954	0	0
region_cfg_regwen_5_rd_A	406816534	861	0	0
region_cfg_regwen_6_rd_A	406816534	954	0	0
region_cfg_regwen_7_rd_A	406816534	1014	0	0
scratch_rd_A	406816534	998	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	4567	0	0
T59	3356	3	0	0
T178	2772	11	0	0
T188	3621	117	0	0
T189	3295	113	0	0
T190	15895	1	0	0
T203	4824	261	0	0
T209	5152	197	0	0
T211	5799	313	0	0
T218	4612	4	0	0
T224	4809	2	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	928	0	0
T58	3933	3	0	0
T60	4014	2	0	0
T179	79995	84	0	0
T205	9478	8	0	0
T218	4612	3	0	0
T224	4809	16	0	0
T269	4977	13	0	0
T270	21619	64	0	0
T271	4624	7	0	0
T272	10424	19	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1741	0	0
T58	3933	5	0	0
T60	4014	9	0	0
T179	79995	372	0	0
T205	9478	2	0	0
T218	4612	17	0	0
T224	4809	4	0	0
T269	4977	17	0	0
T270	21619	11	0	0
T271	4624	1	0	0
T272	10424	57	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1709	0	0
T58	3933	27	0	0
T179	79995	277	0	0
T205	9478	12	0	0
T218	4612	12	0	0
T224	4809	32	0	0
T269	4977	4	0	0
T270	21619	26	0	0
T272	10424	65	0	0
T273	10680	43	0	0
T274	18172	47	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1816	0	0
T58	3933	19	0	0
T60	4014	26	0	0
T179	79995	463	0	0
T205	9478	13	0	0
T218	4612	7	0	0
T224	4809	30	0	0
T269	4977	3	0	0
T270	21619	15	0	0
T272	10424	37	0	0
T273	10680	28	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1786	0	0
T58	3933	30	0	0
T60	4014	28	0	0
T179	79995	382	0	0
T205	9478	5	0	0
T218	4612	3	0	0
T224	4809	28	0	0
T269	4977	1	0	0
T270	21619	28	0	0
T271	4624	6	0	0
T272	10424	44	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1704	0	0
T58	3933	17	0	0
T60	4014	3	0	0
T179	79995	386	0	0
T205	9478	4	0	0
T218	4612	19	0	0
T224	4809	37	0	0
T269	4977	9	0	0
T270	21619	39	0	0
T271	4624	2	0	0
T272	10424	19	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1723	0	0
T58	3933	5	0	0
T60	4014	31	0	0
T179	79995	249	0	0
T218	4612	17	0	0
T224	4809	7	0	0
T269	4977	2	0	0
T270	21619	29	0	0
T272	10424	27	0	0
T273	10680	12	0	0
T274	18172	43	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1714	0	0
T58	3933	35	0	0
T60	4014	28	0	0
T179	79995	337	0	0
T205	9478	3	0	0
T218	4612	9	0	0
T224	4809	1	0	0
T269	4977	15	0	0
T270	21619	75	0	0
T271	4624	6	0	0
T272	10424	46	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1777	0	0
T58	3933	31	0	0
T60	4014	2	0	0
T179	79995	293	0	0
T205	9478	12	0	0
T218	4612	13	0	0
T224	4809	1	0	0
T269	4977	4	0	0
T270	21619	82	0	0
T272	10424	55	0	0
T273	10680	35	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1541	0	0
T58	3933	38	0	0
T60	4014	31	0	0
T179	79995	330	0	0
T205	9478	1	0	0
T218	4612	1	0	0
T224	4809	6	0	0
T269	4977	3	0	0
T270	21619	21	0	0
T271	4624	4	0	0
T272	10424	14	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1927	0	0
T58	3933	20	0	0
T60	4014	23	0	0
T179	79995	324	0	0
T205	9478	16	0	0
T218	4612	22	0	0
T224	4809	37	0	0
T269	4977	11	0	0
T270	21619	10	0	0
T271	4624	1	0	0
T272	10424	42	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	964	0	0
T58	3933	1	0	0
T60	4014	6	0	0
T179	79995	58	0	0
T218	4612	1	0	0
T224	4809	12	0	0
T269	4977	15	0	0
T270	21619	12	0	0
T271	4624	7	0	0
T272	10424	21	0	0
T273	10680	21	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	871	0	0
T60	4014	4	0	0
T179	79995	68	0	0
T205	9478	11	0	0
T218	4612	15	0	0
T224	4809	3	0	0
T269	4977	4	0	0
T270	21619	35	0	0
T271	4624	5	0	0
T272	10424	15	0	0
T273	10680	7	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	943	0	0
T58	3933	6	0	0
T60	4014	3	0	0
T179	79995	106	0	0
T205	9478	31	0	0
T218	4612	2	0	0
T224	4809	3	0	0
T269	4977	12	0	0
T270	21619	31	0	0
T271	4624	13	0	0
T272	10424	11	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	901	0	0
T58	3933	6	0	0
T60	4014	10	0	0
T179	79995	63	0	0
T205	9478	14	0	0
T218	4612	1	0	0
T224	4809	6	0	0
T269	4977	5	0	0
T270	21619	35	0	0
T271	4624	1	0	0
T272	10424	22	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1040	0	0
T58	3933	8	0	0
T60	4014	3	0	0
T179	79995	77	0	0
T205	9478	40	0	0
T224	4809	5	0	0
T269	4977	11	0	0
T270	21619	54	0	0
T271	4624	5	0	0
T272	10424	23	0	0
T273	10680	24	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	951	0	0
T58	3933	3	0	0
T60	4014	5	0	0
T179	79995	87	0	0
T205	9478	5	0	0
T224	4809	7	0	0
T269	4977	8	0	0
T270	21619	42	0	0
T271	4624	5	0	0
T272	10424	17	0	0
T273	10680	22	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1059	0	0
T60	4014	3	0	0
T179	79995	80	0	0
T205	9478	23	0	0
T224	4809	5	0	0
T269	4977	10	0	0
T270	21619	34	0	0
T272	10424	13	0	0
T273	10680	54	0	0
T274	18172	54	0	0
T275	3726	4	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	887	0	0
T58	3933	5	0	0
T60	4014	6	0	0
T179	79995	74	0	0
T205	9478	1	0	0
T224	4809	6	0	0
T269	4977	4	0	0
T270	21619	40	0	0
T271	4624	6	0	0
T272	10424	19	0	0
T273	10680	23	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	933	0	0
T58	3933	1	0	0
T60	4014	1	0	0
T179	79995	79	0	0
T205	9478	18	0	0
T218	4612	5	0	0
T224	4809	7	0	0
T269	4977	4	0	0
T270	21619	51	0	0
T272	10424	13	0	0
T273	10680	42	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	964	0	0
T60	4014	2	0	0
T179	79995	101	0	0
T205	9478	30	0	0
T218	4612	7	0	0
T224	4809	11	0	0
T269	4977	9	0	0
T270	21619	52	0	0
T271	4624	7	0	0
T272	10424	15	0	0
T273	10680	7	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1593	0	0
T60	4014	2	0	0
T179	79995	394	0	0
T218	4612	2	0	0
T224	4809	27	0	0
T269	4977	7	0	0
T270	21619	46	0	0
T271	4624	5	0	0
T272	10424	20	0	0
T273	10680	7	0	0
T274	18172	20	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	913	0	0
T58	3933	2	0	0
T60	4014	5	0	0
T179	79995	76	0	0
T205	9478	10	0	0
T218	4612	1	0	0
T224	4809	9	0	0
T269	4977	7	0	0
T270	21619	48	0	0
T271	4624	3	0	0
T272	10424	30	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1747	0	0
T58	3933	4	0	0
T60	4014	29	0	0
T179	79995	334	0	0
T205	9478	10	0	0
T224	4809	8	0	0
T269	4977	3	0	0
T270	21619	13	0	0
T272	10424	62	0	0
T273	10680	22	0	0
T274	18172	37	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1747	0	0
T58	3933	31	0	0
T60	4014	4	0	0
T179	79995	316	0	0
T205	9478	8	0	0
T218	4612	7	0	0
T224	4809	37	0	0
T269	4977	2	0	0
T270	21619	27	0	0
T271	4624	1	0	0
T272	10424	58	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	969	0	0
T60	4014	3	0	0
T179	79995	84	0	0
T218	4612	6	0	0
T224	4809	4	0	0
T270	21619	25	0	0
T271	4624	14	0	0
T272	10424	14	0	0
T273	10680	55	0	0
T274	18172	52	0	0
T275	3726	1	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1051	0	0
T58	3933	1	0	0
T60	4014	5	0	0
T179	79995	93	0	0
T218	4612	5	0	0
T224	4809	12	0	0
T269	4977	4	0	0
T270	21619	56	0	0
T271	4624	9	0	0
T272	10424	27	0	0
T273	10680	21	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1671	0	0
T58	3933	3	0	0
T60	4014	1	0	0
T179	79995	303	0	0
T218	4612	8	0	0
T224	4809	30	0	0
T269	4977	6	0	0
T270	21619	50	0	0
T271	4624	5	0	0
T272	10424	74	0	0
T273	10680	12	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1621	0	0
T58	3933	3	0	0
T60	4014	32	0	0
T179	79995	260	0	0
T205	9478	1	0	0
T218	4612	2	0	0
T224	4809	6	0	0
T269	4977	7	0	0
T270	21619	48	0	0
T271	4624	1	0	0
T272	10424	43	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1548	0	0
T58	3933	26	0	0
T60	4014	27	0	0
T179	79995	208	0	0
T205	9478	6	0	0
T218	4612	5	0	0
T224	4809	9	0	0
T269	4977	4	0	0
T270	21619	55	0	0
T271	4624	13	0	0
T272	10424	28	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1822	0	0
T58	3933	9	0	0
T60	4014	22	0	0
T179	79995	421	0	0
T205	9478	10	0	0
T218	4612	3	0	0
T224	4809	38	0	0
T269	4977	16	0	0
T270	21619	70	0	0
T271	4624	3	0	0
T272	10424	33	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1731	0	0
T58	3933	25	0	0
T60	4014	26	0	0
T179	79995	335	0	0
T205	9478	20	0	0
T218	4612	2	0	0
T224	4809	54	0	0
T269	4977	15	0	0
T270	21619	40	0	0
T272	10424	28	0	0
T273	10680	14	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1635	0	0
T58	3933	1	0	0
T60	4014	29	0	0
T179	79995	339	0	0
T205	9478	24	0	0
T218	4612	10	0	0
T269	4977	9	0	0
T270	21619	35	0	0
T271	4624	4	0	0
T272	10424	29	0	0
T273	10680	27	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1866	0	0
T58	3933	7	0	0
T60	4014	1	0	0
T179	79995	364	0	0
T205	9478	27	0	0
T218	4612	8	0	0
T224	4809	11	0	0
T269	4977	12	0	0
T270	21619	98	0	0
T271	4624	1	0	0
T272	10424	61	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1834	0	0
T58	3933	19	0	0
T60	4014	2	0	0
T179	79995	365	0	0
T205	9478	20	0	0
T218	4612	27	0	0
T269	4977	1	0	0
T270	21619	10	0	0
T271	4624	6	0	0
T272	10424	39	0	0
T273	10680	33	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1672	0	0
T58	3933	22	0	0
T60	4014	21	0	0
T179	79995	331	0	0
T205	9478	15	0	0
T218	4612	5	0	0
T224	4809	6	0	0
T269	4977	12	0	0
T270	21619	77	0	0
T271	4624	1	0	0
T272	10424	56	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1666	0	0
T58	3933	6	0	0
T60	4014	21	0	0
T179	79995	348	0	0
T205	9478	5	0	0
T218	4612	5	0	0
T224	4809	21	0	0
T269	4977	14	0	0
T270	21619	48	0	0
T272	10424	37	0	0
T273	10680	10	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1062	0	0
T58	3933	3	0	0
T60	4014	2	0	0
T179	79995	89	0	0
T218	4612	6	0	0
T224	4809	9	0	0
T269	4977	9	0	0
T270	21619	44	0	0
T271	4624	2	0	0
T272	10424	21	0	0
T273	10680	9	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	970	0	0
T58	3933	9	0	0
T60	4014	3	0	0
T179	79995	90	0	0
T205	9478	6	0	0
T218	4612	9	0	0
T224	4809	14	0	0
T269	4977	7	0	0
T270	21619	44	0	0
T272	10424	10	0	0
T273	10680	21	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	970	0	0
T58	3933	8	0	0
T60	4014	7	0	0
T179	79995	116	0	0
T218	4612	5	0	0
T224	4809	6	0	0
T269	4977	12	0	0
T270	21619	60	0	0
T271	4624	5	0	0
T272	10424	9	0	0
T273	10680	19	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	922	0	0
T58	3933	4	0	0
T60	4014	2	0	0
T179	79995	78	0	0
T205	9478	8	0	0
T224	4809	3	0	0
T269	4977	5	0	0
T270	21619	27	0	0
T272	10424	22	0	0
T273	10680	8	0	0
T274	18172	31	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1005	0	0
T58	3933	3	0	0
T60	4014	3	0	0
T179	79995	104	0	0
T205	9478	16	0	0
T224	4809	11	0	0
T269	4977	11	0	0
T270	21619	40	0	0
T272	10424	8	0	0
T273	10680	10	0	0
T274	18172	21	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	902	0	0
T60	4014	2	0	0
T179	79995	80	0	0
T205	9478	13	0	0
T218	4612	1	0	0
T224	4809	11	0	0
T269	4977	12	0	0
T270	21619	25	0	0
T271	4624	8	0	0
T272	10424	10	0	0
T273	10680	30	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	911	0	0
T60	4014	4	0	0
T179	79995	87	0	0
T205	9478	11	0	0
T218	4612	5	0	0
T224	4809	8	0	0
T269	4977	3	0	0
T270	21619	36	0	0
T271	4624	6	0	0
T272	10424	7	0	0
T273	10680	20	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	984	0	0
T58	3933	4	0	0
T60	4014	8	0	0
T179	79995	91	0	0
T205	9478	15	0	0
T218	4612	4	0	0
T224	4809	8	0	0
T269	4977	5	0	0
T270	21619	27	0	0
T272	10424	16	0	0
T273	10680	36	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	976	0	0
T60	4014	6	0	0
T179	79995	85	0	0
T205	9478	7	0	0
T218	4612	6	0	0
T224	4809	8	0	0
T269	4977	11	0	0
T270	21619	52	0	0
T271	4624	3	0	0
T272	10424	25	0	0
T273	10680	18	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1037	0	0
T58	3933	2	0	0
T60	4014	7	0	0
T179	79995	89	0	0
T205	9478	11	0	0
T218	4612	7	0	0
T224	4809	6	0	0
T269	4977	16	0	0
T270	21619	44	0	0
T271	4624	2	0	0
T272	10424	10	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1803	0	0
T58	3933	28	0	0
T60	4014	31	0	0
T179	79995	437	0	0
T205	9478	34	0	0
T218	4612	36	0	0
T224	4809	10	0	0
T269	4977	5	0	0
T270	21619	40	0	0
T271	4624	5	0	0
T272	10424	45	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	983	0	0
T58	3933	8	0	0
T179	79995	99	0	0
T205	9478	12	0	0
T218	4612	2	0	0
T224	4809	2	0	0
T269	4977	10	0	0
T270	21619	86	0	0
T271	4624	9	0	0
T272	10424	20	0	0
T273	10680	4	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1692	0	0
T58	3933	4	0	0
T60	4014	25	0	0
T179	79995	327	0	0
T205	9478	41	0	0
T218	4612	6	0	0
T224	4809	10	0	0
T269	4977	3	0	0
T270	21619	59	0	0
T271	4624	3	0	0
T272	10424	60	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1635	0	0
T58	3933	25	0	0
T60	4014	26	0	0
T179	79995	305	0	0
T205	9478	7	0	0
T218	4612	2	0	0
T224	4809	1	0	0
T269	4977	6	0	0
T270	21619	28	0	0
T271	4624	4	0	0
T272	10424	33	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	962	0	0
T58	3933	2	0	0
T60	4014	7	0	0
T179	79995	79	0	0
T205	9478	22	0	0
T218	4612	9	0	0
T224	4809	12	0	0
T269	4977	14	0	0
T270	21619	49	0	0
T272	10424	21	0	0
T273	10680	29	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1114	0	0
T58	3933	9	0	0
T60	4014	9	0	0
T179	79995	98	0	0
T205	9478	13	0	0
T218	4612	15	0	0
T224	4809	7	0	0
T269	4977	3	0	0
T270	21619	94	0	0
T271	4624	2	0	0
T272	10424	6	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	988	0	0
T58	3933	2	0	0
T60	4014	8	0	0
T179	79995	87	0	0
T205	9478	9	0	0
T218	4612	5	0	0
T224	4809	4	0	0
T269	4977	13	0	0
T270	21619	46	0	0
T271	4624	3	0	0
T272	10424	12	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1602	0	0
T58	3933	3	0	0
T60	4014	11	0	0
T179	79995	213	0	0
T205	9478	16	0	0
T218	4612	16	0	0
T224	4809	23	0	0
T269	4977	4	0	0
T270	21619	72	0	0
T271	4624	1	0	0
T272	10424	18	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	951	0	0
T58	3933	2	0	0
T179	79995	91	0	0
T205	9478	18	0	0
T218	4612	2	0	0
T224	4809	12	0	0
T269	4977	12	0	0
T270	21619	30	0	0
T271	4624	6	0	0
T272	10424	13	0	0
T273	10680	13	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1106	0	0
T58	3933	5	0	0
T60	4014	8	0	0
T179	79995	110	0	0
T205	9478	10	0	0
T218	4612	6	0	0
T224	4809	9	0	0
T269	4977	8	0	0
T270	21619	42	0	0
T271	4624	13	0	0
T272	10424	26	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	970	0	0
T58	3933	2	0	0
T60	4014	5	0	0
T179	79995	57	0	0
T205	9478	37	0	0
T218	4612	4	0	0
T224	4809	7	0	0
T269	4977	4	0	0
T270	21619	67	0	0
T271	4624	8	0	0
T272	10424	23	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1202	0	0
T58	3933	9	0	0
T60	4014	10	0	0
T179	79995	120	0	0
T205	9478	10	0	0
T218	4612	10	0	0
T224	4809	3	0	0
T269	4977	11	0	0
T270	21619	59	0	0
T271	4624	9	0	0
T272	10424	21	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1452	0	0
T60	4014	5	0	0
T179	79995	260	0	0
T205	9478	10	0	0
T218	4612	26	0	0
T224	4809	10	0	0
T269	4977	13	0	0
T270	21619	31	0	0
T272	10424	80	0	0
T273	10680	16	0	0
T274	18172	61	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1138	0	0
T60	4014	1	0	0
T179	79995	124	0	0
T218	4612	7	0	0
T224	4809	6	0	0
T269	4977	12	0	0
T270	21619	96	0	0
T271	4624	2	0	0
T272	10424	22	0	0
T273	10680	3	0	0
T274	18172	46	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1030	0	0
T58	3933	2	0	0
T60	4014	2	0	0
T179	79995	129	0	0
T205	9478	4	0	0
T218	4612	4	0	0
T224	4809	7	0	0
T269	4977	8	0	0
T270	21619	49	0	0
T272	10424	27	0	0
T273	10680	20	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1019	0	0
T58	3933	3	0	0
T60	4014	3	0	0
T179	79995	128	0	0
T205	9478	21	0	0
T218	4612	2	0	0
T224	4809	10	0	0
T269	4977	4	0	0
T270	21619	24	0	0
T271	4624	4	0	0
T272	10424	26	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1102	0	0
T58	3933	4	0	0
T60	4014	3	0	0
T179	79995	137	0	0
T205	9478	33	0	0
T224	4809	4	0	0
T269	4977	11	0	0
T270	21619	73	0	0
T271	4624	1	0	0
T272	10424	19	0	0
T273	10680	14	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1223	0	0
T58	3933	1	0	0
T60	4014	6	0	0
T179	79995	133	0	0
T205	9478	27	0	0
T218	4612	4	0	0
T224	4809	11	0	0
T269	4977	13	0	0
T270	21619	11	0	0
T271	4624	1	0	0
T272	10424	29	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1064	0	0
T58	3933	6	0	0
T60	4014	5	0	0
T179	79995	105	0	0
T205	9478	35	0	0
T218	4612	13	0	0
T224	4809	10	0	0
T269	4977	8	0	0
T270	21619	32	0	0
T271	4624	3	0	0
T272	10424	29	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1020	0	0
T58	3933	8	0	0
T60	4014	3	0	0
T179	79995	116	0	0
T205	9478	9	0	0
T218	4612	4	0	0
T224	4809	11	0	0
T269	4977	3	0	0
T270	21619	30	0	0
T272	10424	26	0	0
T273	10680	21	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1011	0	0
T58	3933	4	0	0
T60	4014	13	0	0
T179	79995	123	0	0
T205	9478	6	0	0
T218	4612	1	0	0
T224	4809	7	0	0
T270	21619	38	0	0
T272	10424	11	0	0
T273	10680	14	0	0
T274	18172	11	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1731	0	0
T58	3933	25	0	0
T60	4014	16	0	0
T179	79995	291	0	0
T205	9478	8	0	0
T218	4612	2	0	0
T224	4809	23	0	0
T269	4977	5	0	0
T270	21619	50	0	0
T271	4624	2	0	0
T272	10424	65	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1792	0	0
T58	3933	3	0	0
T60	4014	24	0	0
T179	79995	374	0	0
T205	9478	11	0	0
T224	4809	4	0	0
T269	4977	8	0	0
T270	21619	73	0	0
T272	10424	36	0	0
T273	10680	2	0	0
T274	18172	22	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1578	0	0
T58	3933	17	0	0
T60	4014	5	0	0
T179	79995	376	0	0
T205	9478	9	0	0
T218	4612	8	0	0
T224	4809	1	0	0
T269	4977	1	0	0
T270	21619	42	0	0
T271	4624	13	0	0
T272	10424	23	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1969	0	0
T58	3933	5	0	0
T60	4014	24	0	0
T179	79995	305	0	0
T205	9478	5	0	0
T218	4612	13	0	0
T224	4809	4	0	0
T269	4977	11	0	0
T270	21619	46	0	0
T271	4624	7	0	0
T272	10424	64	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1568	0	0
T60	4014	6	0	0
T179	79995	376	0	0
T205	9478	3	0	0
T218	4612	16	0	0
T224	4809	10	0	0
T269	4977	8	0	0
T270	21619	3	0	0
T272	10424	10	0	0
T273	10680	11	0	0
T274	18172	43	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1674	0	0
T58	3933	19	0	0
T60	4014	1	0	0
T179	79995	379	0	0
T205	9478	10	0	0
T218	4612	6	0	0
T224	4809	24	0	0
T269	4977	9	0	0
T270	21619	18	0	0
T271	4624	11	0	0
T272	10424	20	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1520	0	0
T58	3933	1	0	0
T60	4014	19	0	0
T179	79995	299	0	0
T205	9478	7	0	0
T218	4612	18	0	0
T224	4809	2	0	0
T269	4977	7	0	0
T270	21619	38	0	0
T271	4624	5	0	0
T272	10424	11	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1565	0	0
T58	3933	3	0	0
T60	4014	2	0	0
T179	79995	237	0	0
T205	9478	11	0	0
T218	4612	24	0	0
T269	4977	16	0	0
T270	21619	35	0	0
T272	10424	23	0	0
T273	10680	47	0	0
T274	18172	20	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	236	0	0
T205	9478	9	0	0
T218	4612	2	0	0
T224	4809	6	0	0
T269	4977	11	0	0
T270	21619	70	0	0
T272	10424	8	0	0
T273	10680	20	0	0
T274	18172	16	0	0
T276	5846	6	0	0
T277	9399	12	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	866	0	0
T60	4014	7	0	0
T179	79995	63	0	0
T218	4612	2	0	0
T224	4809	7	0	0
T269	4977	11	0	0
T270	21619	44	0	0
T271	4624	5	0	0
T272	10424	20	0	0
T274	18172	57	0	0
T275	3726	4	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	984	0	0
T58	3933	4	0	0
T60	4014	8	0	0
T179	79995	68	0	0
T205	9478	25	0	0
T224	4809	6	0	0
T269	4977	16	0	0
T270	21619	24	0	0
T272	10424	10	0	0
T273	10680	21	0	0
T274	18172	24	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1100	0	0
T58	3933	2	0	0
T179	79995	89	0	0
T205	9478	14	0	0
T224	4809	7	0	0
T269	4977	5	0	0
T270	21619	8	0	0
T271	4624	3	0	0
T272	10424	18	0	0
T273	10680	39	0	0
T274	18172	55	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	906	0	0
T58	3933	4	0	0
T60	4014	4	0	0
T179	79995	80	0	0
T205	9478	13	0	0
T224	4809	15	0	0
T269	4977	4	0	0
T270	21619	14	0	0
T271	4624	6	0	0
T272	10424	8	0	0
T273	10680	13	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	954	0	0
T58	3933	3	0	0
T179	79995	87	0	0
T218	4612	3	0	0
T224	4809	12	0	0
T269	4977	5	0	0
T270	21619	64	0	0
T271	4624	8	0	0
T272	10424	20	0	0
T273	10680	5	0	0
T274	18172	31	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	861	0	0
T58	3933	5	0	0
T60	4014	1	0	0
T179	79995	96	0	0
T205	9478	12	0	0
T218	4612	14	0	0
T224	4809	7	0	0
T269	4977	7	0	0
T270	21619	24	0	0
T271	4624	11	0	0
T272	10424	7	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	954	0	0
T58	3933	5	0	0
T60	4014	5	0	0
T179	79995	76	0	0
T224	4809	5	0	0
T269	4977	9	0	0
T270	21619	20	0	0
T271	4624	10	0	0
T272	10424	26	0	0
T273	10680	19	0	0
T274	18172	45	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	1014	0	0
T58	3933	9	0	0
T60	4014	6	0	0
T179	79995	84	0	0
T205	9478	11	0	0
T218	4612	5	0	0
T224	4809	1	0	0
T269	4977	10	0	0
T270	21619	32	0	0
T271	4624	4	0	0
T272	10424	7	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	406816534	998	0	0
T60	4014	3	0	0
T179	79995	73	0	0
T205	9478	12	0	0
T218	4612	7	0	0
T224	4809	5	0	0
T269	4977	3	0	0
T270	21619	43	0	0
T271	4624	7	0	0
T272	10424	16	0	0
T273	10680	43	0	0