Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
97.66	97.12	94.40	98.44		100.00	98.33	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	399759461	3501	0	0
addr_rd_A	399759461	1247	0	0
bank0_info0_page_cfg_0_rd_A	399759461	2208	0	0
bank0_info0_page_cfg_1_rd_A	399759461	1861	0	0
bank0_info0_page_cfg_2_rd_A	399759461	1667	0	0
bank0_info0_page_cfg_3_rd_A	399759461	2352	0	0
bank0_info0_page_cfg_4_rd_A	399759461	2367	0	0
bank0_info0_page_cfg_5_rd_A	399759461	2468	0	0
bank0_info0_page_cfg_6_rd_A	399759461	2486	0	0
bank0_info0_page_cfg_7_rd_A	399759461	1946	0	0
bank0_info0_page_cfg_8_rd_A	399759461	1935	0	0
bank0_info0_page_cfg_9_rd_A	399759461	2322	0	0
bank0_info0_regwen_0_rd_A	399759461	768	0	0
bank0_info0_regwen_1_rd_A	399759461	867	0	0
bank0_info0_regwen_2_rd_A	399759461	1334	0	0
bank0_info0_regwen_3_rd_A	399759461	1425	0	0
bank0_info0_regwen_4_rd_A	399759461	1300	0	0
bank0_info0_regwen_5_rd_A	399759461	1420	0	0
bank0_info0_regwen_6_rd_A	399759461	1405	0	0
bank0_info0_regwen_7_rd_A	399759461	1231	0	0
bank0_info0_regwen_8_rd_A	399759461	858	0	0
bank0_info0_regwen_9_rd_A	399759461	1462	0	0
bank0_info1_page_cfg_rd_A	399759461	1887	0	0
bank0_info1_regwen_rd_A	399759461	1224	0	0
bank0_info2_page_cfg_0_rd_A	399759461	2437	0	0
bank0_info2_page_cfg_1_rd_A	399759461	2239	0	0
bank0_info2_regwen_0_rd_A	399759461	1373	0	0
bank0_info2_regwen_1_rd_A	399759461	833	0	0
bank1_info0_page_cfg_0_rd_A	399759461	2260	0	0
bank1_info0_page_cfg_1_rd_A	399759461	2475	0	0
bank1_info0_page_cfg_2_rd_A	399759461	1834	0	0
bank1_info0_page_cfg_3_rd_A	399759461	2417	0	0
bank1_info0_page_cfg_4_rd_A	399759461	2228	0	0
bank1_info0_page_cfg_5_rd_A	399759461	2388	0	0
bank1_info0_page_cfg_6_rd_A	399759461	2425	0	0
bank1_info0_page_cfg_7_rd_A	399759461	2376	0	0
bank1_info0_page_cfg_8_rd_A	399759461	2530	0	0
bank1_info0_page_cfg_9_rd_A	399759461	1746	0	0
bank1_info0_regwen_0_rd_A	399759461	1239	0	0
bank1_info0_regwen_1_rd_A	399759461	1400	0	0
bank1_info0_regwen_2_rd_A	399759461	1291	0	0
bank1_info0_regwen_3_rd_A	399759461	1363	0	0
bank1_info0_regwen_4_rd_A	399759461	761	0	0
bank1_info0_regwen_5_rd_A	399759461	1435	0	0
bank1_info0_regwen_6_rd_A	399759461	1358	0	0
bank1_info0_regwen_7_rd_A	399759461	1185	0	0
bank1_info0_regwen_8_rd_A	399759461	1293	0	0
bank1_info0_regwen_9_rd_A	399759461	1374	0	0
bank1_info1_page_cfg_rd_A	399759461	2374	0	0
bank1_info1_regwen_rd_A	399759461	1301	0	0
bank1_info2_page_cfg_0_rd_A	399759461	2348	0	0
bank1_info2_page_cfg_1_rd_A	399759461	1709	0	0
bank1_info2_regwen_0_rd_A	399759461	1302	0	0
bank1_info2_regwen_1_rd_A	399759461	832	0	0
bank_cfg_regwen_rd_A	399759461	861	0	0
default_region_rd_A	399759461	2307	0	0
exec_rd_A	399759461	1328	0	0
fifo_lvl_rd_A	399759461	1524	0	0
fifo_rst_rd_A	399759461	1317	0	0
hw_info_cfg_override_rd_A	399759461	1532	0	0
intr_enable_rd_A	399759461	2419	0	0
mp_region_0_rd_A	399759461	1422	0	0
mp_region_1_rd_A	399759461	1018	0	0
mp_region_2_rd_A	399759461	1485	0	0
mp_region_3_rd_A	399759461	1632	0	0
mp_region_4_rd_A	399759461	1643	0	0
mp_region_5_rd_A	399759461	1480	0	0
mp_region_6_rd_A	399759461	1416	0	0
mp_region_7_rd_A	399759461	985	0	0
mp_region_cfg_0_rd_A	399759461	2271	0	0
mp_region_cfg_1_rd_A	399759461	2367	0	0
mp_region_cfg_2_rd_A	399759461	2341	0	0
mp_region_cfg_3_rd_A	399759461	2426	0	0
mp_region_cfg_4_rd_A	399759461	2387	0	0
mp_region_cfg_5_rd_A	399759461	2555	0	0
mp_region_cfg_6_rd_A	399759461	2333	0	0
mp_region_cfg_7_rd_A	399759461	2223	0	0
phy_alert_cfg_rd_A	399759461	859	0	0
region_cfg_regwen_0_rd_A	399759461	1272	0	0
region_cfg_regwen_1_rd_A	399759461	1142	0	0
region_cfg_regwen_2_rd_A	399759461	1142	0	0
region_cfg_regwen_3_rd_A	399759461	1387	0	0
region_cfg_regwen_4_rd_A	399759461	825	0	0
region_cfg_regwen_5_rd_A	399759461	1230	0	0
region_cfg_regwen_6_rd_A	399759461	1234	0	0
region_cfg_regwen_7_rd_A	399759461	1407	0	0
scratch_rd_A	399759461	1117	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	3501	0	0
T71	35645	1	0	0
T201	3068	115	0	0
T202	4998	1	0	0
T229	2475	2	0	0
T231	38678	1	0	0
T238	5262	4	0	0
T239	6223	3	0	0
T240	4888	6	0	0
T243	23272	1	0	0
T244	42191	2	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1247	0	0
T71	35645	16	0	0
T230	80219	75	0	0
T238	5262	4	0	0
T239	6223	8	0	0
T240	4888	4	0	0
T244	42191	43	0	0
T315	18323	59	0	0
T316	11199	4	0	0
T317	19199	40	0	0
T318	20412	16	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2208	0	0
T71	35645	91	0	0
T230	80219	259	0	0
T239	6223	11	0	0
T244	42191	145	0	0
T262	22177	29	0	0
T315	18323	22	0	0
T316	11199	12	0	0
T317	19199	42	0	0
T318	20412	50	0	0
T319	3289	30	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1861	0	0
T71	35645	111	0	0
T230	80219	315	0	0
T238	5262	10	0	0
T239	6223	40	0	0
T244	42191	107	0	0
T262	22177	49	0	0
T315	18323	40	0	0
T316	11199	18	0	0
T317	19199	26	0	0
T319	3289	2	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1667	0	0
T71	35645	91	0	0
T230	80219	296	0	0
T238	5262	3	0	0
T239	6223	11	0	0
T240	4888	27	0	0
T244	42191	65	0	0
T262	22177	43	0	0
T315	18323	8	0	0
T316	11199	10	0	0
T317	19199	40	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2352	0	0
T71	35645	48	0	0
T230	80219	317	0	0
T238	5262	7	0	0
T239	6223	10	0	0
T240	4888	3	0	0
T244	42191	120	0	0
T262	22177	76	0	0
T315	18323	20	0	0
T316	11199	59	0	0
T317	19199	36	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2367	0	0
T71	35645	94	0	0
T230	80219	269	0	0
T238	5262	6	0	0
T239	6223	9	0	0
T240	4888	12	0	0
T244	42191	152	0	0
T262	22177	18	0	0
T315	18323	68	0	0
T316	11199	6	0	0
T317	19199	103	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2468	0	0
T71	35645	120	0	0
T230	80219	371	0	0
T238	5262	12	0	0
T239	6223	36	0	0
T240	4888	9	0	0
T244	42191	102	0	0
T262	22177	71	0	0
T315	18323	11	0	0
T316	11199	38	0	0
T317	19199	61	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2486	0	0
T71	35645	63	0	0
T230	80219	348	0	0
T238	5262	5	0	0
T239	6223	27	0	0
T240	4888	7	0	0
T244	42191	247	0	0
T262	22177	36	0	0
T315	18323	28	0	0
T316	11199	35	0	0
T317	19199	43	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1946	0	0
T71	35645	81	0	0
T230	80219	323	0	0
T238	5262	11	0	0
T239	6223	38	0	0
T240	4888	3	0	0
T244	42191	162	0	0
T262	22177	49	0	0
T315	18323	20	0	0
T316	11199	28	0	0
T317	19199	26	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1935	0	0
T71	35645	74	0	0
T230	80219	391	0	0
T238	5262	29	0	0
T239	6223	12	0	0
T240	4888	10	0	0
T244	42191	118	0	0
T262	22177	16	0	0
T315	18323	28	0	0
T316	11199	26	0	0
T317	19199	7	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2322	0	0
T71	35645	111	0	0
T230	80219	365	0	0
T238	5262	27	0	0
T239	6223	26	0	0
T240	4888	2	0	0
T244	42191	141	0	0
T262	22177	27	0	0
T315	18323	10	0	0
T316	11199	3	0	0
T317	19199	52	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	768	0	0
T71	35645	15	0	0
T230	80219	72	0	0
T239	6223	10	0	0
T240	4888	5	0	0
T244	42191	54	0	0
T262	22177	21	0	0
T315	18323	20	0	0
T316	11199	30	0	0
T317	19199	54	0	0
T318	20412	20	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	867	0	0
T71	35645	18	0	0
T230	80219	67	0	0
T238	5262	13	0	0
T239	6223	8	0	0
T240	4888	4	0	0
T244	42191	43	0	0
T262	22177	1	0	0
T315	18323	32	0	0
T316	11199	43	0	0
T317	19199	60	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1334	0	0
T71	35645	30	0	0
T230	80219	74	0	0
T238	5262	2	0	0
T239	6223	9	0	0
T244	42191	27	0	0
T262	22177	28	0	0
T315	18323	40	0	0
T316	11199	33	0	0
T317	19199	26	0	0
T318	20412	44	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1425	0	0
T71	35645	24	0	0
T230	80219	72	0	0
T238	5262	2	0	0
T240	4888	9	0	0
T244	42191	42	0	0
T262	22177	71	0	0
T315	18323	50	0	0
T316	11199	48	0	0
T317	19199	10	0	0
T319	3289	1	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1300	0	0
T71	35645	7	0	0
T230	80219	78	0	0
T238	5262	10	0	0
T239	6223	5	0	0
T240	4888	3	0	0
T244	42191	37	0	0
T262	22177	68	0	0
T315	18323	31	0	0
T316	11199	1	0	0
T317	19199	45	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1420	0	0
T71	35645	47	0	0
T230	80219	88	0	0
T238	5262	6	0	0
T239	6223	7	0	0
T240	4888	9	0	0
T244	42191	41	0	0
T262	22177	57	0	0
T315	18323	41	0	0
T316	11199	43	0	0
T317	19199	18	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1405	0	0
T71	35645	18	0	0
T230	80219	63	0	0
T239	6223	12	0	0
T240	4888	4	0	0
T244	42191	48	0	0
T262	22177	45	0	0
T315	18323	16	0	0
T316	11199	47	0	0
T317	19199	92	0	0
T319	3289	5	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1231	0	0
T71	35645	21	0	0
T230	80219	64	0	0
T238	5262	1	0	0
T239	6223	15	0	0
T240	4888	3	0	0
T244	42191	34	0	0
T262	22177	22	0	0
T315	18323	27	0	0
T316	11199	18	0	0
T317	19199	40	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	858	0	0
T71	35645	46	0	0
T230	80219	89	0	0
T238	5262	9	0	0
T239	6223	8	0	0
T244	42191	38	0	0
T262	22177	40	0	0
T315	18323	32	0	0
T316	11199	13	0	0
T317	19199	36	0	0
T318	20412	80	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1462	0	0
T71	35645	22	0	0
T230	80219	84	0	0
T239	6223	8	0	0
T240	4888	2	0	0
T244	42191	60	0	0
T262	22177	46	0	0
T315	18323	17	0	0
T316	11199	40	0	0
T317	19199	37	0	0
T319	3289	2	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1887	0	0
T71	35645	61	0	0
T230	80219	296	0	0
T239	6223	11	0	0
T244	42191	176	0	0
T262	22177	30	0	0
T315	18323	23	0	0
T316	11199	37	0	0
T317	19199	46	0	0
T318	20412	39	0	0
T320	11023	23	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1224	0	0
T71	35645	31	0	0
T230	80219	78	0	0
T238	5262	6	0	0
T239	6223	8	0	0
T240	4888	8	0	0
T244	42191	47	0	0
T262	22177	23	0	0
T315	18323	14	0	0
T316	11199	11	0	0
T317	19199	19	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2437	0	0
T71	35645	36	0	0
T230	80219	324	0	0
T238	5262	5	0	0
T239	6223	4	0	0
T240	4888	25	0	0
T244	42191	265	0	0
T262	22177	39	0	0
T315	18323	38	0	0
T316	11199	51	0	0
T317	19199	74	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2239	0	0
T71	35645	108	0	0
T230	80219	253	0	0
T238	5262	16	0	0
T239	6223	10	0	0
T240	4888	3	0	0
T244	42191	204	0	0
T262	22177	62	0	0
T315	18323	24	0	0
T316	11199	17	0	0
T317	19199	17	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1373	0	0
T71	35645	33	0	0
T230	80219	73	0	0
T238	5262	13	0	0
T239	6223	8	0	0
T240	4888	4	0	0
T244	42191	17	0	0
T262	22177	58	0	0
T315	18323	30	0	0
T316	11199	26	0	0
T317	19199	31	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	833	0	0
T71	35645	27	0	0
T230	80219	74	0	0
T238	5262	4	0	0
T239	6223	6	0	0
T240	4888	3	0	0
T244	42191	32	0	0
T262	22177	38	0	0
T315	18323	32	0	0
T317	19199	44	0	0
T318	20412	44	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2260	0	0
T71	35645	78	0	0
T230	80219	321	0	0
T238	5262	7	0	0
T239	6223	15	0	0
T240	4888	7	0	0
T244	42191	115	0	0
T262	22177	34	0	0
T315	18323	20	0	0
T316	11199	30	0	0
T317	19199	49	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2475	0	0
T71	35645	59	0	0
T230	80219	363	0	0
T238	5262	13	0	0
T239	6223	11	0	0
T240	4888	15	0	0
T244	42191	202	0	0
T262	22177	70	0	0
T316	11199	31	0	0
T317	19199	24	0	0
T319	3289	13	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1834	0	0
T71	35645	94	0	0
T230	80219	363	0	0
T238	5262	14	0	0
T239	6223	41	0	0
T240	4888	13	0	0
T244	42191	106	0	0
T262	22177	71	0	0
T315	18323	56	0	0
T316	11199	11	0	0
T317	19199	23	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2417	0	0
T71	35645	78	0	0
T230	80219	327	0	0
T238	5262	2	0	0
T239	6223	9	0	0
T240	4888	4	0	0
T244	42191	197	0	0
T262	22177	61	0	0
T315	18323	28	0	0
T316	11199	30	0	0
T317	19199	26	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2228	0	0
T71	35645	89	0	0
T230	80219	420	0	0
T239	6223	27	0	0
T240	4888	23	0	0
T244	42191	102	0	0
T262	22177	56	0	0
T315	18323	30	0	0
T316	11199	5	0	0
T317	19199	36	0	0
T318	20412	12	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2388	0	0
T71	35645	64	0	0
T230	80219	301	0	0
T238	5262	5	0	0
T239	6223	35	0	0
T240	4888	1	0	0
T244	42191	140	0	0
T262	22177	75	0	0
T315	18323	47	0	0
T316	11199	23	0	0
T317	19199	58	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2425	0	0
T71	35645	77	0	0
T230	80219	324	0	0
T238	5262	20	0	0
T239	6223	27	0	0
T240	4888	7	0	0
T244	42191	127	0	0
T262	22177	62	0	0
T315	18323	21	0	0
T316	11199	39	0	0
T317	19199	34	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2376	0	0
T71	35645	97	0	0
T230	80219	350	0	0
T238	5262	21	0	0
T239	6223	20	0	0
T240	4888	2	0	0
T244	42191	99	0	0
T262	22177	49	0	0
T315	18323	21	0	0
T316	11199	46	0	0
T317	19199	48	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2530	0	0
T71	35645	117	0	0
T230	80219	423	0	0
T238	5262	37	0	0
T239	6223	7	0	0
T240	4888	14	0	0
T244	42191	142	0	0
T262	22177	60	0	0
T315	18323	36	0	0
T316	11199	36	0	0
T317	19199	35	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1746	0	0
T71	35645	67	0	0
T230	80219	302	0	0
T238	5262	11	0	0
T239	6223	4	0	0
T240	4888	8	0	0
T244	42191	105	0	0
T262	22177	57	0	0
T315	18323	16	0	0
T316	11199	32	0	0
T317	19199	38	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1239	0	0
T71	35645	11	0	0
T230	80219	93	0	0
T238	5262	3	0	0
T239	6223	10	0	0
T240	4888	3	0	0
T244	42191	34	0	0
T262	22177	47	0	0
T315	18323	10	0	0
T316	11199	29	0	0
T317	19199	26	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1400	0	0
T71	35645	22	0	0
T230	80219	75	0	0
T238	5262	6	0	0
T239	6223	8	0	0
T240	4888	3	0	0
T244	42191	45	0	0
T262	22177	77	0	0
T315	18323	1	0	0
T316	11199	46	0	0
T317	19199	87	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1291	0	0
T71	35645	28	0	0
T230	80219	71	0	0
T239	6223	12	0	0
T240	4888	15	0	0
T244	42191	28	0	0
T262	22177	24	0	0
T315	18323	27	0	0
T316	11199	10	0	0
T317	19199	39	0	0
T319	3289	4	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1363	0	0
T71	35645	16	0	0
T230	80219	91	0	0
T239	6223	9	0	0
T240	4888	3	0	0
T244	42191	39	0	0
T262	22177	29	0	0
T315	18323	38	0	0
T316	11199	36	0	0
T317	19199	72	0	0
T318	20412	42	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	761	0	0
T71	35645	19	0	0
T230	80219	75	0	0
T238	5262	17	0	0
T239	6223	8	0	0
T244	42191	54	0	0
T262	22177	78	0	0
T315	18323	13	0	0
T316	11199	38	0	0
T317	19199	57	0	0
T319	3289	3	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1435	0	0
T71	35645	7	0	0
T230	80219	93	0	0
T238	5262	11	0	0
T239	6223	15	0	0
T244	42191	33	0	0
T262	22177	64	0	0
T315	18323	40	0	0
T316	11199	14	0	0
T317	19199	104	0	0
T319	3289	1	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1358	0	0
T71	35645	21	0	0
T230	80219	79	0	0
T238	5262	14	0	0
T239	6223	9	0	0
T240	4888	4	0	0
T244	42191	50	0	0
T262	22177	59	0	0
T315	18323	27	0	0
T316	11199	16	0	0
T317	19199	44	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1185	0	0
T71	35645	17	0	0
T230	80219	76	0	0
T239	6223	11	0	0
T240	4888	6	0	0
T244	42191	21	0	0
T262	22177	51	0	0
T315	18323	18	0	0
T316	11199	10	0	0
T317	19199	17	0	0
T318	20412	68	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1293	0	0
T71	35645	26	0	0
T230	80219	87	0	0
T238	5262	4	0	0
T239	6223	14	0	0
T240	4888	2	0	0
T244	42191	44	0	0
T262	22177	27	0	0
T315	18323	4	0	0
T316	11199	47	0	0
T317	19199	54	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1374	0	0
T71	35645	19	0	0
T230	80219	80	0	0
T239	6223	7	0	0
T240	4888	1	0	0
T244	42191	38	0	0
T262	22177	36	0	0
T315	18323	24	0	0
T316	11199	36	0	0
T317	19199	25	0	0
T319	3289	6	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2374	0	0
T71	35645	81	0	0
T230	80219	208	0	0
T238	5262	9	0	0
T239	6223	35	0	0
T240	4888	16	0	0
T244	42191	188	0	0
T262	22177	25	0	0
T315	18323	22	0	0
T316	11199	17	0	0
T317	19199	72	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1301	0	0
T71	35645	17	0	0
T230	80219	88	0	0
T239	6223	7	0	0
T240	4888	1	0	0
T244	42191	35	0	0
T262	22177	57	0	0
T315	18323	37	0	0
T316	11199	33	0	0
T317	19199	22	0	0
T319	3289	4	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2348	0	0
T71	35645	110	0	0
T230	80219	381	0	0
T238	5262	7	0	0
T239	6223	28	0	0
T240	4888	8	0	0
T244	42191	188	0	0
T262	22177	23	0	0
T315	18323	24	0	0
T316	11199	30	0	0
T317	19199	26	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1709	0	0
T71	35645	114	0	0
T230	80219	347	0	0
T238	5262	19	0	0
T239	6223	32	0	0
T240	4888	21	0	0
T244	42191	120	0	0
T262	22177	33	0	0
T315	18323	38	0	0
T316	11199	13	0	0
T317	19199	64	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1302	0	0
T71	35645	25	0	0
T230	80219	105	0	0
T238	5262	8	0	0
T239	6223	14	0	0
T240	4888	9	0	0
T244	42191	40	0	0
T262	22177	21	0	0
T315	18323	38	0	0
T316	11199	11	0	0
T317	19199	27	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	832	0	0
T71	35645	25	0	0
T230	80219	87	0	0
T238	5262	7	0	0
T239	6223	6	0	0
T244	42191	22	0	0
T262	22177	11	0	0
T315	18323	17	0	0
T316	11199	21	0	0
T317	19199	79	0	0
T318	20412	66	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	861	0	0
T71	35645	24	0	0
T230	80219	103	0	0
T238	5262	6	0	0
T239	6223	10	0	0
T240	4888	8	0	0
T244	42191	35	0	0
T262	22177	57	0	0
T315	18323	35	0	0
T316	11199	40	0	0
T317	19199	53	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2307	0	0
T71	35645	55	0	0
T230	80219	325	0	0
T238	5262	13	0	0
T239	6223	29	0	0
T240	4888	3	0	0
T244	42191	172	0	0
T262	22177	70	0	0
T315	18323	23	0	0
T316	11199	34	0	0
T317	19199	88	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1328	0	0
T71	35645	15	0	0
T230	80219	98	0	0
T239	6223	6	0	0
T240	4888	10	0	0
T244	42191	52	0	0
T262	22177	10	0	0
T315	18323	21	0	0
T316	11199	45	0	0
T317	19199	27	0	0
T319	3289	4	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1524	0	0
T71	35645	24	0	0
T230	80219	117	0	0
T238	5262	10	0	0
T239	6223	11	0	0
T244	42191	83	0	0
T262	22177	43	0	0
T315	18323	21	0	0
T316	11199	36	0	0
T317	19199	54	0	0
T319	3289	9	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1317	0	0
T71	35645	32	0	0
T230	80219	116	0	0
T239	6223	13	0	0
T240	4888	10	0	0
T244	42191	40	0	0
T262	22177	42	0	0
T315	18323	13	0	0
T316	11199	15	0	0
T317	19199	35	0	0
T318	20412	34	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1532	0	0
T71	35645	41	0	0
T230	80219	126	0	0
T238	5262	8	0	0
T239	6223	11	0	0
T240	4888	8	0	0
T244	42191	48	0	0
T262	22177	51	0	0
T315	18323	18	0	0
T316	11199	5	0	0
T317	19199	64	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2419	0	0
T71	35645	133	0	0
T230	80219	321	0	0
T238	5262	6	0	0
T239	6223	10	0	0
T244	42191	119	0	0
T262	22177	40	0	0
T315	18323	28	0	0
T316	11199	29	0	0
T317	19199	40	0	0
T319	3289	15	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1422	0	0
T71	35645	43	0	0
T230	80219	105	0	0
T239	6223	2	0	0
T240	4888	7	0	0
T244	42191	72	0	0
T262	22177	32	0	0
T315	18323	31	0	0
T316	11199	30	0	0
T317	19199	77	0	0
T319	3289	7	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1018	0	0
T71	35645	35	0	0
T230	80219	119	0	0
T238	5262	3	0	0
T239	6223	11	0	0
T240	4888	12	0	0
T244	42191	70	0	0
T262	22177	18	0	0
T315	18323	15	0	0
T316	11199	12	0	0
T317	19199	25	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1485	0	0
T71	35645	33	0	0
T230	80219	142	0	0
T238	5262	5	0	0
T239	6223	7	0	0
T240	4888	9	0	0
T244	42191	58	0	0
T262	22177	52	0	0
T315	18323	15	0	0
T316	11199	18	0	0
T317	19199	38	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1632	0	0
T71	35645	22	0	0
T230	80219	162	0	0
T239	6223	11	0	0
T240	4888	20	0	0
T244	42191	49	0	0
T262	22177	45	0	0
T315	18323	43	0	0
T316	11199	24	0	0
T317	19199	10	0	0
T318	20412	40	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1643	0	0
T71	35645	51	0	0
T230	80219	140	0	0
T238	5262	4	0	0
T239	6223	4	0	0
T240	4888	10	0	0
T244	42191	48	0	0
T262	22177	40	0	0
T315	18323	29	0	0
T316	11199	6	0	0
T317	19199	28	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1480	0	0
T71	35645	35	0	0
T230	80219	103	0	0
T238	5262	6	0	0
T239	6223	2	0	0
T240	4888	6	0	0
T244	42191	88	0	0
T262	22177	41	0	0
T315	18323	59	0	0
T316	11199	16	0	0
T317	19199	38	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1416	0	0
T71	35645	32	0	0
T230	80219	141	0	0
T238	5262	11	0	0
T239	6223	6	0	0
T240	4888	1	0	0
T244	42191	54	0	0
T262	22177	63	0	0
T315	18323	22	0	0
T316	11199	8	0	0
T317	19199	46	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	985	0	0
T71	35645	31	0	0
T230	80219	142	0	0
T238	5262	1	0	0
T239	6223	4	0	0
T240	4888	1	0	0
T244	42191	55	0	0
T262	22177	74	0	0
T315	18323	17	0	0
T316	11199	3	0	0
T317	19199	66	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2271	0	0
T71	35645	68	0	0
T230	80219	360	0	0
T238	5262	17	0	0
T239	6223	28	0	0
T240	4888	10	0	0
T244	42191	89	0	0
T262	22177	49	0	0
T315	18323	65	0	0
T316	11199	14	0	0
T317	19199	10	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2367	0	0
T71	35645	64	0	0
T230	80219	454	0	0
T238	5262	8	0	0
T239	6223	9	0	0
T240	4888	8	0	0
T244	42191	120	0	0
T262	22177	41	0	0
T315	18323	51	0	0
T316	11199	25	0	0
T317	19199	49	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2341	0	0
T71	35645	119	0	0
T230	80219	332	0	0
T238	5262	23	0	0
T239	6223	19	0	0
T240	4888	17	0	0
T244	42191	154	0	0
T262	22177	26	0	0
T315	18323	18	0	0
T316	11199	18	0	0
T317	19199	27	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2426	0	0
T71	35645	47	0	0
T230	80219	432	0	0
T238	5262	7	0	0
T239	6223	5	0	0
T240	4888	5	0	0
T244	42191	188	0	0
T262	22177	46	0	0
T315	18323	24	0	0
T316	11199	34	0	0
T317	19199	7	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2387	0	0
T71	35645	62	0	0
T230	80219	323	0	0
T238	5262	7	0	0
T239	6223	11	0	0
T240	4888	20	0	0
T244	42191	137	0	0
T262	22177	38	0	0
T315	18323	41	0	0
T316	11199	23	0	0
T317	19199	18	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2555	0	0
T71	35645	134	0	0
T230	80219	291	0	0
T238	5262	8	0	0
T239	6223	37	0	0
T240	4888	15	0	0
T244	42191	196	0	0
T262	22177	23	0	0
T315	18323	20	0	0
T316	11199	49	0	0
T317	19199	63	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2333	0	0
T71	35645	114	0	0
T230	80219	328	0	0
T238	5262	10	0	0
T239	6223	8	0	0
T240	4888	3	0	0
T244	42191	137	0	0
T262	22177	26	0	0
T315	18323	6	0	0
T316	11199	22	0	0
T317	19199	50	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	2223	0	0
T71	35645	63	0	0
T230	80219	311	0	0
T239	6223	35	0	0
T240	4888	10	0	0
T244	42191	187	0	0
T262	22177	30	0	0
T315	18323	19	0	0
T316	11199	26	0	0
T317	19199	18	0	0
T318	20412	41	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	859	0	0
T238	5262	5	0	0
T239	6223	7	0	0
T240	4888	6	0	0
T262	22177	52	0	0
T315	18323	16	0	0
T316	11199	29	0	0
T317	19199	41	0	0
T318	20412	51	0	0
T320	11023	25	0	0
T321	20106	57	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1272	0	0
T71	35645	36	0	0
T230	80219	97	0	0
T239	6223	6	0	0
T240	4888	5	0	0
T244	42191	50	0	0
T262	22177	29	0	0
T315	18323	44	0	0
T316	11199	14	0	0
T317	19199	64	0	0
T319	3289	3	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1142	0	0
T71	35645	28	0	0
T230	80219	59	0	0
T239	6223	7	0	0
T240	4888	1	0	0
T244	42191	34	0	0
T262	22177	16	0	0
T315	18323	28	0	0
T316	11199	26	0	0
T317	19199	25	0	0
T318	20412	21	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1142	0	0
T71	35645	37	0	0
T230	80219	68	0	0
T238	5262	6	0	0
T239	6223	11	0	0
T244	42191	35	0	0
T262	22177	17	0	0
T315	18323	3	0	0
T316	11199	18	0	0
T317	19199	53	0	0
T319	3289	9	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1387	0	0
T71	35645	27	0	0
T230	80219	62	0	0
T238	5262	1	0	0
T239	6223	3	0	0
T240	4888	9	0	0
T244	42191	41	0	0
T262	22177	63	0	0
T315	18323	43	0	0
T316	11199	48	0	0
T317	19199	89	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	825	0	0
T71	35645	18	0	0
T230	80219	100	0	0
T238	5262	10	0	0
T239	6223	4	0	0
T240	4888	4	0	0
T244	42191	39	0	0
T262	22177	39	0	0
T315	18323	3	0	0
T316	11199	8	0	0
T317	19199	95	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1230	0	0
T71	35645	22	0	0
T230	80219	88	0	0
T238	5262	6	0	0
T239	6223	13	0	0
T240	4888	3	0	0
T244	42191	44	0	0
T262	22177	10	0	0
T315	18323	6	0	0
T316	11199	11	0	0
T317	19199	100	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1234	0	0
T71	35645	17	0	0
T230	80219	82	0	0
T239	6223	6	0	0
T240	4888	8	0	0
T244	42191	33	0	0
T262	22177	35	0	0
T315	18323	37	0	0
T316	11199	28	0	0
T317	19199	53	0	0
T319	3289	5	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1407	0	0
T71	35645	24	0	0
T230	80219	80	0	0
T238	5262	10	0	0
T239	6223	8	0	0
T244	42191	39	0	0
T262	22177	44	0	0
T315	18323	21	0	0
T316	11199	4	0	0
T317	19199	55	0	0
T318	20412	51	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	399759461	1117	0	0
T71	35645	32	0	0
T230	80219	60	0	0
T238	5262	7	0	0
T239	6223	14	0	0
T240	4888	3	0	0
T244	42191	38	0	0
T262	22177	30	0	0
T315	18323	16	0	0
T316	11199	2	0	0
T317	19199	9	0	0