Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.69	97.12	93.60	98.44		100.00	84.29	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	389801712	4303	0	0
addr_rd_A	389801712	1921	0	0
bank0_info0_page_cfg_0_rd_A	389801712	2574	0	0
bank0_info0_page_cfg_1_rd_A	389801712	2004	0	0
bank0_info0_page_cfg_2_rd_A	389801712	1855	0	0
bank0_info0_page_cfg_3_rd_A	389801712	2685	0	0
bank0_info0_page_cfg_4_rd_A	389801712	2307	0	0
bank0_info0_page_cfg_5_rd_A	389801712	2477	0	0
bank0_info0_page_cfg_6_rd_A	389801712	2030	0	0
bank0_info0_page_cfg_7_rd_A	389801712	2059	0	0
bank0_info0_page_cfg_8_rd_A	389801712	2469	0	0
bank0_info0_page_cfg_9_rd_A	389801712	2491	0	0
bank0_info0_regwen_0_rd_A	389801712	1967	0	0
bank0_info0_regwen_1_rd_A	389801712	1256	0	0
bank0_info0_regwen_2_rd_A	389801712	1810	0	0
bank0_info0_regwen_3_rd_A	389801712	1772	0	0
bank0_info0_regwen_4_rd_A	389801712	1773	0	0
bank0_info0_regwen_5_rd_A	389801712	1835	0	0
bank0_info0_regwen_6_rd_A	389801712	1355	0	0
bank0_info0_regwen_7_rd_A	389801712	1802	0	0
bank0_info0_regwen_8_rd_A	389801712	1784	0	0
bank0_info0_regwen_9_rd_A	389801712	1989	0	0
bank0_info1_page_cfg_rd_A	389801712	2325	0	0
bank0_info1_regwen_rd_A	389801712	1766	0	0
bank0_info2_page_cfg_0_rd_A	389801712	2467	0	0
bank0_info2_page_cfg_1_rd_A	389801712	2383	0	0
bank0_info2_regwen_0_rd_A	389801712	1706	0	0
bank0_info2_regwen_1_rd_A	389801712	1813	0	0
bank1_info0_page_cfg_0_rd_A	389801712	2420	0	0
bank1_info0_page_cfg_1_rd_A	389801712	2087	0	0
bank1_info0_page_cfg_2_rd_A	389801712	2638	0	0
bank1_info0_page_cfg_3_rd_A	389801712	2022	0	0
bank1_info0_page_cfg_4_rd_A	389801712	2532	0	0
bank1_info0_page_cfg_5_rd_A	389801712	2580	0	0
bank1_info0_page_cfg_6_rd_A	389801712	1882	0	0
bank1_info0_page_cfg_7_rd_A	389801712	2486	0	0
bank1_info0_page_cfg_8_rd_A	389801712	2566	0	0
bank1_info0_page_cfg_9_rd_A	389801712	2375	0	0
bank1_info0_regwen_0_rd_A	389801712	1186	0	0
bank1_info0_regwen_1_rd_A	389801712	1713	0	0
bank1_info0_regwen_2_rd_A	389801712	1587	0	0
bank1_info0_regwen_3_rd_A	389801712	1765	0	0
bank1_info0_regwen_4_rd_A	389801712	1436	0	0
bank1_info0_regwen_5_rd_A	389801712	1698	0	0
bank1_info0_regwen_6_rd_A	389801712	1847	0	0
bank1_info0_regwen_7_rd_A	389801712	1653	0	0
bank1_info0_regwen_8_rd_A	389801712	1848	0	0
bank1_info0_regwen_9_rd_A	389801712	1872	0	0
bank1_info1_page_cfg_rd_A	389801712	2074	0	0
bank1_info1_regwen_rd_A	389801712	1800	0	0
bank1_info2_page_cfg_0_rd_A	389801712	2108	0	0
bank1_info2_page_cfg_1_rd_A	389801712	2613	0	0
bank1_info2_regwen_0_rd_A	389801712	1822	0	0
bank1_info2_regwen_1_rd_A	389801712	1816	0	0
bank_cfg_regwen_rd_A	389801712	1985	0	0
default_region_rd_A	389801712	2378	0	0
exec_rd_A	389801712	1888	0	0
fifo_lvl_rd_A	389801712	1879	0	0
fifo_rst_rd_A	389801712	1454	0	0
hw_info_cfg_override_rd_A	389801712	1984	0	0
intr_enable_rd_A	389801712	2266	0	0
mp_region_0_rd_A	389801712	1809	0	0
mp_region_1_rd_A	389801712	1874	0	0
mp_region_2_rd_A	389801712	1836	0	0
mp_region_3_rd_A	389801712	1907	0	0
mp_region_4_rd_A	389801712	1954	0	0
mp_region_5_rd_A	389801712	1829	0	0
mp_region_6_rd_A	389801712	2037	0	0
mp_region_7_rd_A	389801712	1493	0	0
mp_region_cfg_0_rd_A	389801712	2407	0	0
mp_region_cfg_1_rd_A	389801712	2481	0	0
mp_region_cfg_2_rd_A	389801712	2495	0	0
mp_region_cfg_3_rd_A	389801712	2131	0	0
mp_region_cfg_4_rd_A	389801712	2390	0	0
mp_region_cfg_5_rd_A	389801712	2452	0	0
mp_region_cfg_6_rd_A	389801712	2359	0	0
mp_region_cfg_7_rd_A	389801712	2513	0	0
phy_alert_cfg_rd_A	389801712	644	0	0
region_cfg_regwen_0_rd_A	389801712	1713	0	0
region_cfg_regwen_1_rd_A	389801712	1782	0	0
region_cfg_regwen_2_rd_A	389801712	1816	0	0
region_cfg_regwen_3_rd_A	389801712	1720	0	0
region_cfg_regwen_4_rd_A	389801712	1725	0	0
region_cfg_regwen_5_rd_A	389801712	1729	0	0
region_cfg_regwen_6_rd_A	389801712	1765	0	0
region_cfg_regwen_7_rd_A	389801712	1762	0	0
scratch_rd_A	389801712	1871	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	4303	0	0
T101	16164	1	0	0
T103	3398	88	0	0
T205	4091	189	0	0
T234	5182	146	0	0
T235	68480	4	0	0
T236	3115	51	0	0
T237	4896	440	0	0
T238	3563	211	0	0
T239	3382	100	0	0
T240	73372	1	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1921	0	0
T104	136098	117	0	0
T264	6452	5	0	0
T275	42763	57	0	0
T302	4677	8	0	0
T303	18806	33	0	0
T304	11748	13	0	0
T305	10201	27	0	0
T306	5311	3	0	0
T307	90109	545	0	0
T308	23462	41	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2574	0	0
T104	136098	127	0	0
T259	5742	10	0	0
T260	3568	6	0	0
T264	6452	24	0	0
T302	4677	13	0	0
T303	18806	45	0	0
T304	11748	49	0	0
T305	10201	49	0	0
T306	5311	18	0	0
T307	90109	500	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2004	0	0
T104	136098	120	0	0
T259	5742	23	0	0
T260	3568	26	0	0
T264	6452	30	0	0
T275	42763	96	0	0
T302	4677	9	0	0
T303	18806	27	0	0
T304	11748	14	0	0
T305	10201	46	0	0
T306	5311	15	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1855	0	0
T104	136098	126	0	0
T259	5742	18	0	0
T260	3568	2	0	0
T264	6452	22	0	0
T275	42763	150	0	0
T302	4677	7	0	0
T303	18806	44	0	0
T304	11748	19	0	0
T305	10201	24	0	0
T306	5311	27	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2685	0	0
T104	136098	139	0	0
T259	5742	28	0	0
T260	3568	2	0	0
T264	6452	17	0	0
T275	42763	187	0	0
T302	4677	6	0	0
T303	18806	55	0	0
T304	11748	31	0	0
T305	10201	65	0	0
T307	90109	532	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2307	0	0
T104	136098	87	0	0
T259	5742	21	0	0
T260	3568	15	0	0
T264	6452	22	0	0
T302	4677	15	0	0
T303	18806	10	0	0
T304	11748	18	0	0
T305	10201	29	0	0
T306	5311	15	0	0
T307	90109	472	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2477	0	0
T104	136098	125	0	0
T259	5742	28	0	0
T264	6452	9	0	0
T275	42763	98	0	0
T302	4677	2	0	0
T303	18806	50	0	0
T304	11748	51	0	0
T305	10201	59	0	0
T306	5311	6	0	0
T307	90109	482	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2030	0	0
T104	136098	127	0	0
T259	5742	32	0	0
T260	3568	21	0	0
T264	6452	4	0	0
T275	42763	146	0	0
T302	4677	10	0	0
T303	18806	34	0	0
T304	11748	25	0	0
T305	10201	49	0	0
T306	5311	6	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2059	0	0
T104	136098	140	0	0
T259	5742	5	0	0
T260	3568	9	0	0
T264	6452	52	0	0
T275	42763	155	0	0
T302	4677	3	0	0
T303	18806	65	0	0
T304	11748	16	0	0
T305	10201	49	0	0
T306	5311	23	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2469	0	0
T104	136098	128	0	0
T259	5742	2	0	0
T260	3568	8	0	0
T264	6452	17	0	0
T275	42763	174	0	0
T302	4677	2	0	0
T303	18806	24	0	0
T305	10201	18	0	0
T306	5311	16	0	0
T307	90109	504	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2491	0	0
T104	136098	145	0	0
T259	5742	13	0	0
T260	3568	12	0	0
T264	6452	44	0	0
T302	4677	5	0	0
T303	18806	39	0	0
T304	11748	4	0	0
T305	10201	15	0	0
T306	5311	9	0	0
T307	90109	513	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1967	0	0
T104	136098	131	0	0
T259	5742	7	0	0
T260	3568	2	0	0
T264	6452	4	0	0
T302	4677	6	0	0
T303	18806	43	0	0
T304	11748	11	0	0
T305	10201	23	0	0
T306	5311	2	0	0
T307	90109	440	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1256	0	0
T104	136098	122	0	0
T264	6452	16	0	0
T275	42763	35	0	0
T302	4677	14	0	0
T303	18806	29	0	0
T304	11748	4	0	0
T305	10201	20	0	0
T308	23462	24	0	0
T309	4810	4	0	0
T310	321250	450	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1810	0	0
T104	136098	124	0	0
T259	5742	3	0	0
T264	6452	3	0	0
T275	42763	32	0	0
T302	4677	7	0	0
T303	18806	18	0	0
T304	11748	37	0	0
T305	10201	7	0	0
T306	5311	2	0	0
T307	90109	434	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1772	0	0
T104	136098	145	0	0
T259	5742	7	0	0
T264	6452	10	0	0
T275	42763	45	0	0
T302	4677	7	0	0
T303	18806	20	0	0
T304	11748	8	0	0
T305	10201	8	0	0
T306	5311	8	0	0
T307	90109	445	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1773	0	0
T104	136098	154	0	0
T264	6452	6	0	0
T275	42763	44	0	0
T302	4677	11	0	0
T303	18806	6	0	0
T304	11748	22	0	0
T305	10201	20	0	0
T306	5311	7	0	0
T307	90109	485	0	0
T308	23462	63	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1835	0	0
T104	136098	155	0	0
T259	5742	1	0	0
T264	6452	9	0	0
T275	42763	39	0	0
T302	4677	14	0	0
T303	18806	38	0	0
T304	11748	17	0	0
T305	10201	20	0	0
T306	5311	6	0	0
T307	90109	473	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1355	0	0
T104	136098	102	0	0
T259	5742	12	0	0
T264	6452	4	0	0
T275	42763	28	0	0
T302	4677	12	0	0
T303	18806	43	0	0
T304	11748	46	0	0
T305	10201	14	0	0
T308	23462	38	0	0
T309	4810	6	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1802	0	0
T104	136098	100	0	0
T259	5742	2	0	0
T260	3568	1	0	0
T264	6452	6	0	0
T302	4677	12	0	0
T303	18806	77	0	0
T304	11748	13	0	0
T305	10201	12	0	0
T306	5311	3	0	0
T307	90109	434	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1784	0	0
T104	136098	123	0	0
T259	5742	10	0	0
T260	3568	2	0	0
T264	6452	3	0	0
T302	4677	9	0	0
T303	18806	23	0	0
T304	11748	56	0	0
T305	10201	18	0	0
T306	5311	3	0	0
T307	90109	477	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1989	0	0
T104	136098	100	0	0
T259	5742	6	0	0
T264	6452	7	0	0
T275	42763	34	0	0
T302	4677	8	0	0
T303	18806	67	0	0
T304	11748	35	0	0
T305	10201	14	0	0
T306	5311	4	0	0
T307	90109	517	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2325	0	0
T104	136098	136	0	0
T259	5742	2	0	0
T260	3568	21	0	0
T275	42763	205	0	0
T302	4677	4	0	0
T303	18806	19	0	0
T304	11748	25	0	0
T305	10201	56	0	0
T306	5311	14	0	0
T307	90109	463	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1766	0	0
T104	136098	151	0	0
T264	6452	6	0	0
T275	42763	45	0	0
T302	4677	7	0	0
T303	18806	53	0	0
T305	10201	25	0	0
T306	5311	7	0	0
T307	90109	503	0	0
T308	23462	55	0	0
T310	321250	426	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2467	0	0
T104	136098	124	0	0
T259	5742	32	0	0
T260	3568	3	0	0
T264	6452	18	0	0
T275	42763	115	0	0
T302	4677	12	0	0
T303	18806	63	0	0
T304	11748	6	0	0
T305	10201	75	0	0
T307	90109	450	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2383	0	0
T104	136098	164	0	0
T260	3568	1	0	0
T264	6452	17	0	0
T275	42763	159	0	0
T302	4677	11	0	0
T303	18806	34	0	0
T304	11748	11	0	0
T305	10201	13	0	0
T306	5311	9	0	0
T307	90109	452	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1706	0	0
T104	136098	151	0	0
T259	5742	7	0	0
T260	3568	10	0	0
T264	6452	10	0	0
T275	42763	43	0	0
T302	4677	2	0	0
T303	18806	30	0	0
T304	11748	38	0	0
T305	10201	12	0	0
T307	90109	459	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1813	0	0
T104	136098	123	0	0
T259	5742	9	0	0
T260	3568	5	0	0
T264	6452	2	0	0
T302	4677	14	0	0
T303	18806	28	0	0
T304	11748	48	0	0
T305	10201	27	0	0
T306	5311	10	0	0
T307	90109	464	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2420	0	0
T104	136098	119	0	0
T259	5742	16	0	0
T264	6452	25	0	0
T275	42763	86	0	0
T302	4677	7	0	0
T303	18806	31	0	0
T304	11748	18	0	0
T305	10201	68	0	0
T306	5311	10	0	0
T307	90109	460	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2087	0	0
T104	136098	152	0	0
T259	5742	15	0	0
T260	3568	8	0	0
T264	6452	5	0	0
T275	42763	220	0	0
T302	4677	5	0	0
T303	18806	55	0	0
T304	11748	3	0	0
T305	10201	39	0	0
T306	5311	4	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2638	0	0
T104	136098	143	0	0
T259	5742	17	0	0
T260	3568	19	0	0
T264	6452	4	0	0
T302	4677	5	0	0
T303	18806	6	0	0
T304	11748	30	0	0
T305	10201	70	0	0
T306	5311	22	0	0
T307	90109	491	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2022	0	0
T104	136098	124	0	0
T259	5742	12	0	0
T260	3568	10	0	0
T264	6452	23	0	0
T275	42763	193	0	0
T302	4677	2	0	0
T303	18806	41	0	0
T304	11748	20	0	0
T305	10201	36	0	0
T306	5311	13	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2532	0	0
T104	136098	111	0	0
T259	5742	27	0	0
T260	3568	9	0	0
T264	6452	29	0	0
T302	4677	4	0	0
T303	18806	64	0	0
T304	11748	29	0	0
T305	10201	43	0	0
T306	5311	4	0	0
T307	90109	509	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2580	0	0
T104	136098	152	0	0
T260	3568	19	0	0
T264	6452	2	0	0
T275	42763	177	0	0
T302	4677	9	0	0
T303	18806	19	0	0
T304	11748	40	0	0
T305	10201	29	0	0
T306	5311	1	0	0
T307	90109	471	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1882	0	0
T104	136098	103	0	0
T259	5742	24	0	0
T260	3568	6	0	0
T264	6452	24	0	0
T275	42763	140	0	0
T302	4677	3	0	0
T303	18806	20	0	0
T304	11748	8	0	0
T305	10201	15	0	0
T306	5311	10	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2486	0	0
T104	136098	155	0	0
T259	5742	18	0	0
T260	3568	16	0	0
T264	6452	37	0	0
T302	4677	5	0	0
T303	18806	12	0	0
T304	11748	5	0	0
T305	10201	14	0	0
T306	5311	9	0	0
T307	90109	482	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2566	0	0
T104	136098	120	0	0
T259	5742	7	0	0
T260	3568	17	0	0
T264	6452	35	0	0
T275	42763	176	0	0
T302	4677	13	0	0
T303	18806	44	0	0
T305	10201	13	0	0
T306	5311	7	0	0
T307	90109	467	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2375	0	0
T104	136098	122	0	0
T259	5742	1	0	0
T260	3568	14	0	0
T275	42763	157	0	0
T302	4677	8	0	0
T303	18806	59	0	0
T304	11748	8	0	0
T305	10201	49	0	0
T306	5311	10	0	0
T307	90109	480	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1186	0	0
T104	136098	107	0	0
T259	5742	6	0	0
T264	6452	7	0	0
T275	42763	29	0	0
T302	4677	10	0	0
T303	18806	30	0	0
T304	11748	14	0	0
T305	10201	23	0	0
T308	23462	24	0	0
T310	321250	416	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1713	0	0
T104	136098	108	0	0
T259	5742	4	0	0
T264	6452	4	0	0
T275	42763	36	0	0
T302	4677	13	0	0
T303	18806	12	0	0
T304	11748	50	0	0
T305	10201	9	0	0
T307	90109	444	0	0
T308	23462	20	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1587	0	0
T104	136098	127	0	0
T259	5742	9	0	0
T275	42763	42	0	0
T302	4677	5	0	0
T303	18806	8	0	0
T304	11748	8	0	0
T305	10201	9	0	0
T306	5311	8	0	0
T307	90109	512	0	0
T308	23462	59	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1765	0	0
T104	136098	78	0	0
T259	5742	7	0	0
T264	6452	4	0	0
T275	42763	35	0	0
T302	4677	10	0	0
T303	18806	60	0	0
T304	11748	11	0	0
T305	10201	27	0	0
T307	90109	490	0	0
T308	23462	72	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1436	0	0
T104	136098	185	0	0
T259	5742	11	0	0
T260	3568	6	0	0
T264	6452	9	0	0
T275	42763	33	0	0
T302	4677	6	0	0
T303	18806	57	0	0
T304	11748	22	0	0
T305	10201	13	0	0
T306	5311	10	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1698	0	0
T104	136098	96	0	0
T259	5742	6	0	0
T260	3568	5	0	0
T275	42763	51	0	0
T302	4677	6	0	0
T303	18806	30	0	0
T304	11748	24	0	0
T305	10201	11	0	0
T306	5311	9	0	0
T307	90109	428	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1847	0	0
T104	136098	129	0	0
T259	5742	10	0	0
T275	42763	50	0	0
T302	4677	6	0	0
T303	18806	90	0	0
T304	11748	16	0	0
T305	10201	15	0	0
T306	5311	5	0	0
T307	90109	498	0	0
T308	23462	65	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1653	0	0
T104	136098	107	0	0
T259	5742	16	0	0
T260	3568	5	0	0
T264	6452	16	0	0
T275	42763	29	0	0
T302	4677	7	0	0
T303	18806	14	0	0
T304	11748	37	0	0
T305	10201	9	0	0
T307	90109	489	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1848	0	0
T104	136098	156	0	0
T264	6452	8	0	0
T275	42763	18	0	0
T302	4677	4	0	0
T303	18806	51	0	0
T304	11748	32	0	0
T305	10201	24	0	0
T306	5311	6	0	0
T307	90109	571	0	0
T308	23462	32	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1872	0	0
T104	136098	180	0	0
T259	5742	2	0	0
T260	3568	7	0	0
T275	42763	40	0	0
T302	4677	1	0	0
T303	18806	80	0	0
T304	11748	33	0	0
T305	10201	21	0	0
T306	5311	7	0	0
T307	90109	445	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2074	0	0
T104	136098	152	0	0
T259	5742	17	0	0
T260	3568	9	0	0
T264	6452	3	0	0
T275	42763	125	0	0
T303	18806	24	0	0
T304	11748	28	0	0
T305	10201	44	0	0
T306	5311	14	0	0
T308	23462	28	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1800	0	0
T104	136098	147	0	0
T260	3568	1	0	0
T264	6452	2	0	0
T275	42763	29	0	0
T302	4677	11	0	0
T303	18806	24	0	0
T304	11748	27	0	0
T305	10201	15	0	0
T306	5311	9	0	0
T307	90109	455	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2108	0	0
T104	136098	117	0	0
T259	5742	38	0	0
T260	3568	3	0	0
T264	6452	9	0	0
T275	42763	215	0	0
T302	4677	8	0	0
T303	18806	25	0	0
T304	11748	3	0	0
T305	10201	41	0	0
T306	5311	24	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2613	0	0
T104	136098	159	0	0
T259	5742	22	0	0
T260	3568	27	0	0
T264	6452	4	0	0
T275	42763	195	0	0
T302	4677	6	0	0
T303	18806	49	0	0
T304	11748	23	0	0
T305	10201	38	0	0
T307	90109	513	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1822	0	0
T104	136098	130	0	0
T275	42763	38	0	0
T302	4677	12	0	0
T303	18806	20	0	0
T304	11748	32	0	0
T305	10201	9	0	0
T306	5311	4	0	0
T307	90109	445	0	0
T308	23462	23	0	0
T309	4810	16	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1816	0	0
T104	136098	130	0	0
T259	5742	11	0	0
T260	3568	1	0	0
T275	42763	48	0	0
T302	4677	8	0	0
T303	18806	17	0	0
T304	11748	19	0	0
T305	10201	28	0	0
T306	5311	7	0	0
T307	90109	492	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1985	0	0
T104	136098	168	0	0
T260	3568	9	0	0
T264	6452	6	0	0
T275	42763	54	0	0
T302	4677	8	0	0
T303	18806	43	0	0
T304	11748	13	0	0
T305	10201	14	0	0
T306	5311	4	0	0
T307	90109	534	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2378	0	0
T104	136098	105	0	0
T259	5742	9	0	0
T264	6452	21	0	0
T275	42763	115	0	0
T302	4677	4	0	0
T303	18806	61	0	0
T304	11748	46	0	0
T305	10201	18	0	0
T307	90109	484	0	0
T308	23462	44	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1888	0	0
T104	136098	125	0	0
T259	5742	3	0	0
T260	3568	3	0	0
T264	6452	10	0	0
T302	4677	6	0	0
T303	18806	56	0	0
T304	11748	27	0	0
T305	10201	13	0	0
T306	5311	4	0	0
T307	90109	540	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1879	0	0
T104	136098	122	0	0
T259	5742	16	0	0
T260	3568	7	0	0
T275	42763	84	0	0
T302	4677	8	0	0
T303	18806	22	0	0
T304	11748	29	0	0
T305	10201	15	0	0
T307	90109	453	0	0
T308	23462	40	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1454	0	0
T104	136098	152	0	0
T259	5742	4	0	0
T275	42763	58	0	0
T302	4677	3	0	0
T303	18806	30	0	0
T304	11748	29	0	0
T305	10201	12	0	0
T306	5311	2	0	0
T308	23462	61	0	0
T309	4810	3	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1984	0	0
T104	136098	137	0	0
T259	5742	3	0	0
T260	3568	8	0	0
T264	6452	7	0	0
T275	42763	83	0	0
T302	4677	9	0	0
T303	18806	27	0	0
T304	11748	23	0	0
T305	10201	16	0	0
T307	90109	499	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2266	0	0
T104	136098	130	0	0
T259	5742	24	0	0
T264	6452	2	0	0
T275	42763	52	0	0
T302	4677	6	0	0
T303	18806	52	0	0
T304	11748	30	0	0
T305	10201	17	0	0
T306	5311	14	0	0
T307	90109	425	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1809	0	0
T104	136098	148	0	0
T259	5742	5	0	0
T264	6452	9	0	0
T275	42763	58	0	0
T302	4677	6	0	0
T303	18806	52	0	0
T304	11748	4	0	0
T305	10201	15	0	0
T306	5311	8	0	0
T307	90109	457	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1874	0	0
T104	136098	116	0	0
T259	5742	2	0	0
T260	3568	5	0	0
T264	6452	14	0	0
T302	4677	7	0	0
T303	18806	29	0	0
T304	11748	45	0	0
T305	10201	17	0	0
T306	5311	4	0	0
T307	90109	457	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1836	0	0
T104	136098	110	0	0
T259	5742	3	0	0
T264	6452	7	0	0
T275	42763	53	0	0
T302	4677	7	0	0
T303	18806	36	0	0
T304	11748	15	0	0
T305	10201	28	0	0
T306	5311	4	0	0
T307	90109	483	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1907	0	0
T104	136098	139	0	0
T260	3568	9	0	0
T264	6452	11	0	0
T275	42763	45	0	0
T302	4677	5	0	0
T303	18806	70	0	0
T305	10201	21	0	0
T306	5311	8	0	0
T307	90109	466	0	0
T308	23462	41	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1954	0	0
T104	136098	123	0	0
T259	5742	6	0	0
T260	3568	1	0	0
T275	42763	78	0	0
T302	4677	5	0	0
T303	18806	24	0	0
T304	11748	22	0	0
T305	10201	25	0	0
T306	5311	1	0	0
T307	90109	434	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1829	0	0
T104	136098	131	0	0
T259	5742	9	0	0
T264	6452	6	0	0
T275	42763	39	0	0
T302	4677	11	0	0
T303	18806	20	0	0
T304	11748	4	0	0
T305	10201	25	0	0
T307	90109	524	0	0
T308	23462	50	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2037	0	0
T104	136098	170	0	0
T259	5742	9	0	0
T264	6452	15	0	0
T275	42763	74	0	0
T302	4677	10	0	0
T303	18806	48	0	0
T304	11748	57	0	0
T305	10201	14	0	0
T306	5311	2	0	0
T307	90109	497	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1493	0	0
T104	136098	134	0	0
T259	5742	12	0	0
T260	3568	6	0	0
T264	6452	5	0	0
T275	42763	86	0	0
T302	4677	9	0	0
T303	18806	51	0	0
T304	11748	11	0	0
T305	10201	20	0	0
T306	5311	9	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2407	0	0
T104	136098	145	0	0
T259	5742	30	0	0
T264	6452	10	0	0
T275	42763	100	0	0
T302	4677	10	0	0
T303	18806	45	0	0
T304	11748	28	0	0
T305	10201	33	0	0
T307	90109	464	0	0
T308	23462	31	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2481	0	0
T104	136098	109	0	0
T259	5742	4	0	0
T260	3568	6	0	0
T264	6452	21	0	0
T302	4677	12	0	0
T303	18806	72	0	0
T304	11748	2	0	0
T305	10201	88	0	0
T306	5311	9	0	0
T307	90109	463	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2495	0	0
T104	136098	156	0	0
T259	5742	24	0	0
T260	3568	10	0	0
T264	6452	39	0	0
T275	42763	150	0	0
T303	18806	10	0	0
T304	11748	2	0	0
T305	10201	65	0	0
T306	5311	19	0	0
T307	90109	471	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2131	0	0
T104	136098	153	0	0
T260	3568	1	0	0
T264	6452	51	0	0
T275	42763	147	0	0
T302	4677	10	0	0
T303	18806	24	0	0
T304	11748	20	0	0
T305	10201	58	0	0
T306	5311	10	0	0
T308	23462	64	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2390	0	0
T104	136098	98	0	0
T259	5742	19	0	0
T260	3568	13	0	0
T264	6452	4	0	0
T302	4677	2	0	0
T303	18806	69	0	0
T304	11748	15	0	0
T305	10201	25	0	0
T306	5311	19	0	0
T307	90109	500	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2452	0	0
T104	136098	166	0	0
T260	3568	3	0	0
T264	6452	11	0	0
T275	42763	132	0	0
T302	4677	1	0	0
T303	18806	44	0	0
T304	11748	30	0	0
T305	10201	47	0	0
T306	5311	17	0	0
T307	90109	489	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2359	0	0
T104	136098	141	0	0
T259	5742	18	0	0
T260	3568	7	0	0
T264	6452	23	0	0
T302	4677	5	0	0
T303	18806	21	0	0
T304	11748	4	0	0
T305	10201	12	0	0
T306	5311	4	0	0
T307	90109	475	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	2513	0	0
T104	136098	141	0	0
T259	5742	37	0	0
T260	3568	3	0	0
T264	6452	16	0	0
T302	4677	14	0	0
T303	18806	47	0	0
T304	11748	46	0	0
T305	10201	45	0	0
T306	5311	2	0	0
T307	90109	460	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	644	0	0
T302	4677	11	0	0
T303	18806	33	0	0
T304	11748	15	0	0
T305	10201	12	0	0
T306	5311	5	0	0
T307	90109	427	0	0
T308	23462	25	0	0
T309	4810	7	0	0
T311	9424	4	0	0
T312	19269	40	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1713	0	0
T104	136098	134	0	0
T259	5742	2	0	0
T260	3568	6	0	0
T275	42763	30	0	0
T302	4677	8	0	0
T303	18806	46	0	0
T304	11748	23	0	0
T305	10201	7	0	0
T307	90109	481	0	0
T308	23462	19	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1782	0	0
T104	136098	142	0	0
T259	5742	6	0	0
T260	3568	4	0	0
T264	6452	9	0	0
T302	4677	3	0	0
T303	18806	43	0	0
T304	11748	27	0	0
T305	10201	18	0	0
T306	5311	3	0	0
T307	90109	511	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1816	0	0
T104	136098	120	0	0
T259	5742	3	0	0
T260	3568	3	0	0
T264	6452	8	0	0
T275	42763	25	0	0
T302	4677	13	0	0
T303	18806	49	0	0
T304	11748	6	0	0
T305	10201	16	0	0
T307	90109	478	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1720	0	0
T104	136098	175	0	0
T259	5742	14	0	0
T264	6452	5	0	0
T275	42763	29	0	0
T302	4677	10	0	0
T303	18806	32	0	0
T304	11748	11	0	0
T305	10201	18	0	0
T307	90109	415	0	0
T308	23462	29	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1725	0	0
T104	136098	104	0	0
T260	3568	5	0	0
T264	6452	7	0	0
T275	42763	38	0	0
T302	4677	11	0	0
T303	18806	72	0	0
T304	11748	8	0	0
T305	10201	28	0	0
T307	90109	435	0	0
T308	23462	42	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1729	0	0
T104	136098	155	0	0
T259	5742	1	0	0
T260	3568	2	0	0
T275	42763	44	0	0
T302	4677	5	0	0
T303	18806	45	0	0
T304	11748	20	0	0
T305	10201	8	0	0
T306	5311	13	0	0
T307	90109	492	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1765	0	0
T104	136098	118	0	0
T259	5742	8	0	0
T264	6452	1	0	0
T275	42763	35	0	0
T302	4677	6	0	0
T303	18806	11	0	0
T304	11748	1	0	0
T305	10201	20	0	0
T306	5311	1	0	0
T307	90109	432	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1762	0	0
T104	136098	107	0	0
T259	5742	3	0	0
T260	3568	7	0	0
T264	6452	9	0	0
T302	4677	10	0	0
T303	18806	44	0	0
T304	11748	5	0	0
T305	10201	14	0	0
T306	5311	1	0	0
T307	90109	537	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	389801712	1871	0	0
T104	136098	88	0	0
T260	3568	9	0	0
T264	6452	3	0	0
T275	42763	42	0	0
T302	4677	4	0	0
T303	18806	36	0	0
T304	11748	4	0	0
T305	10201	15	0	0
T306	5311	1	0	0
T307	90109	485	0	0