Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.85	97.12	94.40	98.44		100.00	84.29	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	404885630	3997	0	0
addr_rd_A	404885630	595	0	0
bank0_info0_page_cfg_0_rd_A	404885630	1136	0	0
bank0_info0_page_cfg_1_rd_A	404885630	1266	0	0
bank0_info0_page_cfg_2_rd_A	404885630	1255	0	0
bank0_info0_page_cfg_3_rd_A	404885630	1108	0	0
bank0_info0_page_cfg_4_rd_A	404885630	1410	0	0
bank0_info0_page_cfg_5_rd_A	404885630	1184	0	0
bank0_info0_page_cfg_6_rd_A	404885630	1131	0	0
bank0_info0_page_cfg_7_rd_A	404885630	1105	0	0
bank0_info0_page_cfg_8_rd_A	404885630	1188	0	0
bank0_info0_page_cfg_9_rd_A	404885630	1227	0	0
bank0_info0_regwen_0_rd_A	404885630	572	0	0
bank0_info0_regwen_1_rd_A	404885630	680	0	0
bank0_info0_regwen_2_rd_A	404885630	659	0	0
bank0_info0_regwen_3_rd_A	404885630	611	0	0
bank0_info0_regwen_4_rd_A	404885630	695	0	0
bank0_info0_regwen_5_rd_A	404885630	658	0	0
bank0_info0_regwen_6_rd_A	404885630	567	0	0
bank0_info0_regwen_7_rd_A	404885630	697	0	0
bank0_info0_regwen_8_rd_A	404885630	655	0	0
bank0_info0_regwen_9_rd_A	404885630	696	0	0
bank0_info1_page_cfg_rd_A	404885630	1065	0	0
bank0_info1_regwen_rd_A	404885630	622	0	0
bank0_info2_page_cfg_0_rd_A	404885630	1084	0	0
bank0_info2_page_cfg_1_rd_A	404885630	1236	0	0
bank0_info2_regwen_0_rd_A	404885630	595	0	0
bank0_info2_regwen_1_rd_A	404885630	569	0	0
bank1_info0_page_cfg_0_rd_A	404885630	1039	0	0
bank1_info0_page_cfg_1_rd_A	404885630	1078	0	0
bank1_info0_page_cfg_2_rd_A	404885630	1138	0	0
bank1_info0_page_cfg_3_rd_A	404885630	1277	0	0
bank1_info0_page_cfg_4_rd_A	404885630	1076	0	0
bank1_info0_page_cfg_5_rd_A	404885630	1348	0	0
bank1_info0_page_cfg_6_rd_A	404885630	1385	0	0
bank1_info0_page_cfg_7_rd_A	404885630	1175	0	0
bank1_info0_page_cfg_8_rd_A	404885630	1021	0	0
bank1_info0_page_cfg_9_rd_A	404885630	1314	0	0
bank1_info0_regwen_0_rd_A	404885630	663	0	0
bank1_info0_regwen_1_rd_A	404885630	686	0	0
bank1_info0_regwen_2_rd_A	404885630	719	0	0
bank1_info0_regwen_3_rd_A	404885630	616	0	0
bank1_info0_regwen_4_rd_A	404885630	566	0	0
bank1_info0_regwen_5_rd_A	404885630	663	0	0
bank1_info0_regwen_6_rd_A	404885630	614	0	0
bank1_info0_regwen_7_rd_A	404885630	629	0	0
bank1_info0_regwen_8_rd_A	404885630	655	0	0
bank1_info0_regwen_9_rd_A	404885630	667	0	0
bank1_info1_page_cfg_rd_A	404885630	1164	0	0
bank1_info1_regwen_rd_A	404885630	587	0	0
bank1_info2_page_cfg_0_rd_A	404885630	1285	0	0
bank1_info2_page_cfg_1_rd_A	404885630	1306	0	0
bank1_info2_regwen_0_rd_A	404885630	646	0	0
bank1_info2_regwen_1_rd_A	404885630	565	0	0
bank_cfg_regwen_rd_A	404885630	646	0	0
default_region_rd_A	404885630	1307	0	0
exec_rd_A	404885630	600	0	0
fifo_lvl_rd_A	404885630	594	0	0
fifo_rst_rd_A	404885630	742	0	0
hw_info_cfg_override_rd_A	404885630	761	0	0
intr_enable_rd_A	404885630	1104	0	0
mp_region_0_rd_A	404885630	727	0	0
mp_region_1_rd_A	404885630	648	0	0
mp_region_2_rd_A	404885630	749	0	0
mp_region_3_rd_A	404885630	692	0	0
mp_region_4_rd_A	404885630	709	0	0
mp_region_5_rd_A	404885630	733	0	0
mp_region_6_rd_A	404885630	810	0	0
mp_region_7_rd_A	404885630	675	0	0
mp_region_cfg_0_rd_A	404885630	1385	0	0
mp_region_cfg_1_rd_A	404885630	1336	0	0
mp_region_cfg_2_rd_A	404885630	1267	0	0
mp_region_cfg_3_rd_A	404885630	1295	0	0
mp_region_cfg_4_rd_A	404885630	1200	0	0
mp_region_cfg_5_rd_A	404885630	1319	0	0
mp_region_cfg_6_rd_A	404885630	1088	0	0
mp_region_cfg_7_rd_A	404885630	1155	0	0
phy_alert_cfg_rd_A	404885630	222	0	0
region_cfg_regwen_0_rd_A	404885630	637	0	0
region_cfg_regwen_1_rd_A	404885630	597	0	0
region_cfg_regwen_2_rd_A	404885630	703	0	0
region_cfg_regwen_3_rd_A	404885630	673	0	0
region_cfg_regwen_4_rd_A	404885630	691	0	0
region_cfg_regwen_5_rd_A	404885630	664	0	0
region_cfg_regwen_6_rd_A	404885630	622	0	0
region_cfg_regwen_7_rd_A	404885630	650	0	0
scratch_rd_A	404885630	685	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	3997	0	0
T91	5297	160	0	0
T92	5416	185	0	0
T93	32619	2	0	0
T94	10209	9	0	0
T188	2873	145	0	0
T216	2983	93	0	0
T217	5591	530	0	0
T218	5511	42	0	0
T219	5627	99	0	0
T220	3772	5	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	595	0	0
T94	10209	15	0	0
T242	6239	10	0	0
T243	4715	3	0	0
T254	5094	9	0	0
T278	21524	11	0	0
T279	6477	3	0	0
T280	19448	31	0	0
T281	155272	217	0	0
T282	10128	9	0	0
T283	10078	26	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1136	0	0
T94	10209	53	0	0
T242	6239	37	0	0
T243	4715	9	0	0
T278	21524	80	0	0
T279	6477	10	0	0
T280	19448	14	0	0
T281	155272	222	0	0
T282	10128	1	0	0
T283	10078	30	0	0
T284	2825	2	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1266	0	0
T94	10209	49	0	0
T242	6239	29	0	0
T243	4715	8	0	0
T278	21524	75	0	0
T279	6477	32	0	0
T280	19448	27	0	0
T281	155272	215	0	0
T282	10128	11	0	0
T283	10078	25	0	0
T284	2825	3	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1255	0	0
T94	10209	57	0	0
T242	6239	71	0	0
T243	4715	2	0	0
T278	21524	68	0	0
T279	6477	54	0	0
T280	19448	7	0	0
T281	155272	197	0	0
T282	10128	8	0	0
T283	10078	31	0	0
T284	2825	9	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1108	0	0
T94	10209	52	0	0
T242	6239	1	0	0
T243	4715	14	0	0
T278	21524	65	0	0
T279	6477	31	0	0
T280	19448	18	0	0
T281	155272	250	0	0
T282	10128	7	0	0
T283	10078	31	0	0
T284	2825	6	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1410	0	0
T94	10209	57	0	0
T242	6239	30	0	0
T243	4715	12	0	0
T254	5094	38	0	0
T278	21524	51	0	0
T279	6477	51	0	0
T280	19448	23	0	0
T281	155272	270	0	0
T282	10128	6	0	0
T283	10078	81	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1184	0	0
T94	10209	51	0	0
T242	6239	17	0	0
T243	4715	7	0	0
T278	21524	61	0	0
T279	6477	1	0	0
T280	19448	5	0	0
T281	155272	226	0	0
T282	10128	5	0	0
T283	10078	51	0	0
T284	2825	1	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1131	0	0
T94	10209	17	0	0
T242	6239	39	0	0
T243	4715	6	0	0
T254	5094	13	0	0
T278	21524	62	0	0
T279	6477	26	0	0
T280	19448	56	0	0
T281	155272	204	0	0
T283	10078	44	0	0
T284	2825	2	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1105	0	0
T94	10209	77	0	0
T242	6239	4	0	0
T243	4715	5	0	0
T278	21524	7	0	0
T279	6477	71	0	0
T280	19448	1	0	0
T281	155272	230	0	0
T282	10128	5	0	0
T283	10078	55	0	0
T284	2825	2	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1188	0	0
T94	10209	18	0	0
T242	6239	25	0	0
T243	4715	2	0	0
T278	21524	72	0	0
T279	6477	70	0	0
T280	19448	16	0	0
T281	155272	227	0	0
T282	10128	23	0	0
T283	10078	16	0	0
T284	2825	8	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1227	0	0
T94	10209	26	0	0
T242	6239	11	0	0
T243	4715	7	0	0
T254	5094	3	0	0
T278	21524	69	0	0
T279	6477	63	0	0
T280	19448	20	0	0
T281	155272	204	0	0
T282	10128	13	0	0
T283	10078	31	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	572	0	0
T94	10209	13	0	0
T242	6239	14	0	0
T243	4715	5	0	0
T278	21524	51	0	0
T279	6477	6	0	0
T280	19448	22	0	0
T281	155272	168	0	0
T282	10128	8	0	0
T283	10078	16	0	0
T284	2825	1	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	680	0	0
T94	10209	8	0	0
T242	6239	11	0	0
T243	4715	2	0	0
T254	5094	5	0	0
T278	21524	52	0	0
T279	6477	6	0	0
T280	19448	37	0	0
T281	155272	250	0	0
T282	10128	19	0	0
T283	10078	25	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	659	0	0
T94	10209	25	0	0
T242	6239	6	0	0
T243	4715	10	0	0
T278	21524	18	0	0
T279	6477	13	0	0
T280	19448	39	0	0
T281	155272	198	0	0
T282	10128	13	0	0
T283	10078	19	0	0
T284	2825	4	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	611	0	0
T94	10209	8	0	0
T242	6239	5	0	0
T243	4715	7	0	0
T254	5094	5	0	0
T278	21524	36	0	0
T279	6477	9	0	0
T280	19448	31	0	0
T281	155272	224	0	0
T283	10078	9	0	0
T284	2825	8	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	695	0	0
T94	10209	16	0	0
T242	6239	6	0	0
T243	4715	12	0	0
T278	21524	73	0	0
T279	6477	8	0	0
T280	19448	23	0	0
T281	155272	244	0	0
T282	10128	10	0	0
T283	10078	25	0	0
T284	2825	8	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	658	0	0
T94	10209	10	0	0
T242	6239	12	0	0
T243	4715	10	0	0
T278	21524	50	0	0
T279	6477	13	0	0
T280	19448	7	0	0
T281	155272	217	0	0
T282	10128	8	0	0
T283	10078	21	0	0
T284	2825	3	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	567	0	0
T94	10209	11	0	0
T242	6239	13	0	0
T243	4715	6	0	0
T278	21524	37	0	0
T279	6477	10	0	0
T280	19448	34	0	0
T281	155272	216	0	0
T282	10128	3	0	0
T283	10078	14	0	0
T284	2825	1	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	697	0	0
T94	10209	14	0	0
T242	6239	10	0	0
T254	5094	11	0	0
T278	21524	52	0	0
T279	6477	10	0	0
T280	19448	24	0	0
T281	155272	249	0	0
T283	10078	10	0	0
T284	2825	5	0	0
T285	3438	8	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	655	0	0
T94	10209	25	0	0
T242	6239	17	0	0
T243	4715	8	0	0
T278	21524	64	0	0
T279	6477	5	0	0
T280	19448	23	0	0
T281	155272	243	0	0
T282	10128	12	0	0
T283	10078	13	0	0
T284	2825	6	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	696	0	0
T94	10209	20	0	0
T242	6239	1	0	0
T243	4715	12	0	0
T278	21524	62	0	0
T279	6477	4	0	0
T280	19448	39	0	0
T281	155272	212	0	0
T282	10128	16	0	0
T283	10078	23	0	0
T284	2825	2	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1065	0	0
T94	10209	35	0	0
T242	6239	78	0	0
T243	4715	11	0	0
T278	21524	55	0	0
T279	6477	16	0	0
T280	19448	16	0	0
T281	155272	200	0	0
T282	10128	17	0	0
T283	10078	22	0	0
T284	2825	3	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	622	0	0
T94	10209	14	0	0
T242	6239	11	0	0
T243	4715	3	0	0
T278	21524	43	0	0
T279	6477	2	0	0
T280	19448	15	0	0
T281	155272	228	0	0
T282	10128	7	0	0
T283	10078	17	0	0
T284	2825	5	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1084	0	0
T94	10209	48	0	0
T242	6239	27	0	0
T243	4715	5	0	0
T278	21524	38	0	0
T279	6477	40	0	0
T280	19448	8	0	0
T281	155272	223	0	0
T282	10128	15	0	0
T283	10078	28	0	0
T284	2825	3	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1236	0	0
T94	10209	51	0	0
T242	6239	26	0	0
T243	4715	3	0	0
T278	21524	69	0	0
T279	6477	7	0	0
T280	19448	14	0	0
T281	155272	233	0	0
T282	10128	18	0	0
T283	10078	39	0	0
T284	2825	2	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	595	0	0
T94	10209	4	0	0
T242	6239	6	0	0
T243	4715	3	0	0
T278	21524	17	0	0
T279	6477	12	0	0
T280	19448	20	0	0
T281	155272	218	0	0
T282	10128	15	0	0
T283	10078	2	0	0
T284	2825	7	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	569	0	0
T94	10209	2	0	0
T242	6239	9	0	0
T243	4715	2	0	0
T278	21524	40	0	0
T279	6477	4	0	0
T280	19448	21	0	0
T281	155272	194	0	0
T282	10128	9	0	0
T283	10078	20	0	0
T284	2825	6	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1039	0	0
T94	10209	23	0	0
T242	6239	12	0	0
T243	4715	7	0	0
T278	21524	65	0	0
T279	6477	6	0	0
T280	19448	53	0	0
T281	155272	210	0	0
T282	10128	24	0	0
T283	10078	26	0	0
T284	2825	9	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1078	0	0
T94	10209	39	0	0
T242	6239	12	0	0
T243	4715	7	0	0
T254	5094	8	0	0
T278	21524	25	0	0
T279	6477	42	0	0
T280	19448	15	0	0
T281	155272	249	0	0
T282	10128	7	0	0
T283	10078	52	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1138	0	0
T94	10209	34	0	0
T242	6239	27	0	0
T243	4715	3	0	0
T278	21524	38	0	0
T279	6477	21	0	0
T280	19448	50	0	0
T281	155272	199	0	0
T282	10128	16	0	0
T283	10078	38	0	0
T284	2825	9	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1277	0	0
T94	10209	81	0	0
T242	6239	24	0	0
T243	4715	7	0	0
T278	21524	27	0	0
T279	6477	53	0	0
T280	19448	28	0	0
T281	155272	201	0	0
T282	10128	1	0	0
T283	10078	22	0	0
T284	2825	7	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1076	0	0
T94	10209	24	0	0
T242	6239	40	0	0
T243	4715	9	0	0
T278	21524	24	0	0
T279	6477	28	0	0
T280	19448	8	0	0
T281	155272	188	0	0
T282	10128	3	0	0
T283	10078	34	0	0
T284	2825	4	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1348	0	0
T94	10209	25	0	0
T242	6239	23	0	0
T243	4715	5	0	0
T278	21524	61	0	0
T279	6477	36	0	0
T280	19448	10	0	0
T281	155272	249	0	0
T282	10128	30	0	0
T283	10078	27	0	0
T284	2825	4	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1385	0	0
T94	10209	74	0	0
T242	6239	30	0	0
T243	4715	10	0	0
T278	21524	25	0	0
T279	6477	76	0	0
T280	19448	49	0	0
T281	155272	247	0	0
T282	10128	2	0	0
T283	10078	33	0	0
T284	2825	2	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1175	0	0
T94	10209	55	0	0
T242	6239	27	0	0
T243	4715	6	0	0
T254	5094	8	0	0
T278	21524	59	0	0
T279	6477	36	0	0
T280	19448	16	0	0
T281	155272	254	0	0
T283	10078	37	0	0
T284	2825	2	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1021	0	0
T94	10209	25	0	0
T243	4715	8	0	0
T254	5094	31	0	0
T278	21524	29	0	0
T279	6477	6	0	0
T280	19448	12	0	0
T281	155272	246	0	0
T282	10128	25	0	0
T283	10078	59	0	0
T285	3438	3	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1314	0	0
T94	10209	18	0	0
T242	6239	12	0	0
T243	4715	9	0	0
T254	5094	38	0	0
T278	21524	34	0	0
T279	6477	35	0	0
T280	19448	23	0	0
T281	155272	208	0	0
T283	10078	56	0	0
T284	2825	9	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	663	0	0
T94	10209	19	0	0
T242	6239	15	0	0
T243	4715	14	0	0
T278	21524	59	0	0
T279	6477	13	0	0
T280	19448	37	0	0
T281	155272	188	0	0
T282	10128	28	0	0
T283	10078	9	0	0
T284	2825	5	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	686	0	0
T94	10209	19	0	0
T242	6239	2	0	0
T243	4715	14	0	0
T278	21524	78	0	0
T279	6477	14	0	0
T280	19448	23	0	0
T281	155272	248	0	0
T282	10128	7	0	0
T283	10078	7	0	0
T284	2825	2	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	719	0	0
T94	10209	26	0	0
T242	6239	11	0	0
T243	4715	8	0	0
T254	5094	3	0	0
T278	21524	40	0	0
T279	6477	7	0	0
T280	19448	10	0	0
T281	155272	230	0	0
T282	10128	35	0	0
T283	10078	24	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	616	0	0
T94	10209	22	0	0
T242	6239	8	0	0
T243	4715	13	0	0
T278	21524	33	0	0
T279	6477	2	0	0
T280	19448	11	0	0
T281	155272	227	0	0
T282	10128	5	0	0
T283	10078	15	0	0
T284	2825	5	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	566	0	0
T94	10209	18	0	0
T242	6239	11	0	0
T243	4715	10	0	0
T278	21524	7	0	0
T279	6477	9	0	0
T280	19448	14	0	0
T281	155272	205	0	0
T282	10128	14	0	0
T283	10078	4	0	0
T284	2825	3	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	663	0	0
T94	10209	14	0	0
T242	6239	7	0	0
T243	4715	10	0	0
T278	21524	77	0	0
T279	6477	8	0	0
T280	19448	2	0	0
T281	155272	209	0	0
T282	10128	3	0	0
T283	10078	19	0	0
T284	2825	5	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	614	0	0
T94	10209	15	0	0
T242	6239	2	0	0
T243	4715	6	0	0
T278	21524	7	0	0
T279	6477	13	0	0
T280	19448	19	0	0
T281	155272	254	0	0
T282	10128	4	0	0
T283	10078	7	0	0
T284	2825	2	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	629	0	0
T94	10209	14	0	0
T242	6239	4	0	0
T243	4715	4	0	0
T278	21524	16	0	0
T279	6477	10	0	0
T280	19448	5	0	0
T281	155272	214	0	0
T282	10128	12	0	0
T283	10078	17	0	0
T284	2825	1	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	655	0	0
T94	10209	10	0	0
T242	6239	8	0	0
T243	4715	8	0	0
T278	21524	36	0	0
T279	6477	11	0	0
T280	19448	28	0	0
T281	155272	262	0	0
T282	10128	10	0	0
T283	10078	6	0	0
T284	2825	6	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	667	0	0
T94	10209	20	0	0
T242	6239	10	0	0
T243	4715	9	0	0
T254	5094	9	0	0
T278	21524	30	0	0
T279	6477	9	0	0
T280	19448	28	0	0
T281	155272	218	0	0
T283	10078	23	0	0
T284	2825	1	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1164	0	0
T94	10209	50	0	0
T242	6239	46	0	0
T243	4715	7	0	0
T278	21524	48	0	0
T279	6477	33	0	0
T280	19448	22	0	0
T281	155272	217	0	0
T282	10128	1	0	0
T283	10078	46	0	0
T284	2825	6	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	587	0	0
T94	10209	12	0	0
T242	6239	5	0	0
T243	4715	4	0	0
T254	5094	6	0	0
T278	21524	10	0	0
T279	6477	7	0	0
T280	19448	11	0	0
T281	155272	238	0	0
T282	10128	17	0	0
T283	10078	18	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1285	0	0
T94	10209	70	0	0
T242	6239	23	0	0
T243	4715	6	0	0
T278	21524	66	0	0
T279	6477	61	0	0
T280	19448	21	0	0
T281	155272	202	0	0
T282	10128	14	0	0
T283	10078	63	0	0
T284	2825	8	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1306	0	0
T94	10209	51	0	0
T242	6239	49	0	0
T243	4715	6	0	0
T254	5094	11	0	0
T278	21524	38	0	0
T279	6477	27	0	0
T280	19448	27	0	0
T281	155272	230	0	0
T283	10078	59	0	0
T284	2825	3	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	646	0	0
T94	10209	18	0	0
T242	6239	14	0	0
T243	4715	12	0	0
T278	21524	56	0	0
T279	6477	11	0	0
T280	19448	23	0	0
T281	155272	227	0	0
T282	10128	9	0	0
T283	10078	9	0	0
T284	2825	9	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	565	0	0
T94	10209	16	0	0
T242	6239	7	0	0
T243	4715	12	0	0
T278	21524	35	0	0
T279	6477	7	0	0
T280	19448	1	0	0
T281	155272	211	0	0
T282	10128	13	0	0
T283	10078	18	0	0
T284	2825	4	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	646	0	0
T94	10209	12	0	0
T242	6239	1	0	0
T243	4715	8	0	0
T278	21524	32	0	0
T279	6477	9	0	0
T280	19448	32	0	0
T281	155272	239	0	0
T282	10128	13	0	0
T283	10078	9	0	0
T284	2825	7	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1307	0	0
T94	10209	62	0	0
T242	6239	10	0	0
T243	4715	1	0	0
T278	21524	68	0	0
T279	6477	44	0	0
T280	19448	10	0	0
T281	155272	221	0	0
T282	10128	5	0	0
T283	10078	74	0	0
T284	2825	4	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	600	0	0
T94	10209	20	0	0
T242	6239	13	0	0
T243	4715	4	0	0
T278	21524	41	0	0
T279	6477	9	0	0
T280	19448	26	0	0
T281	155272	248	0	0
T282	10128	23	0	0
T283	10078	13	0	0
T284	2825	1	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	594	0	0
T94	10209	9	0	0
T242	6239	16	0	0
T243	4715	5	0	0
T278	21524	48	0	0
T279	6477	8	0	0
T280	19448	21	0	0
T281	155272	190	0	0
T282	10128	8	0	0
T283	10078	10	0	0
T284	2825	9	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	742	0	0
T94	10209	12	0	0
T242	6239	14	0	0
T243	4715	13	0	0
T278	21524	54	0	0
T279	6477	10	0	0
T280	19448	20	0	0
T281	155272	240	0	0
T282	10128	16	0	0
T283	10078	13	0	0
T284	2825	7	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	761	0	0
T94	10209	31	0	0
T242	6239	4	0	0
T243	4715	13	0	0
T254	5094	20	0	0
T278	21524	35	0	0
T279	6477	18	0	0
T280	19448	23	0	0
T281	155272	259	0	0
T283	10078	18	0	0
T284	2825	1	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1104	0	0
T94	10209	12	0	0
T242	6239	45	0	0
T243	4715	9	0	0
T278	21524	31	0	0
T279	6477	63	0	0
T280	19448	17	0	0
T281	155272	257	0	0
T282	10128	13	0	0
T283	10078	44	0	0
T284	2825	8	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	727	0	0
T94	10209	25	0	0
T242	6239	10	0	0
T243	4715	9	0	0
T254	5094	13	0	0
T278	21524	55	0	0
T279	6477	23	0	0
T280	19448	22	0	0
T281	155272	243	0	0
T282	10128	17	0	0
T283	10078	15	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	648	0	0
T94	10209	15	0	0
T242	6239	7	0	0
T243	4715	7	0	0
T278	21524	27	0	0
T279	6477	4	0	0
T280	19448	20	0	0
T281	155272	179	0	0
T282	10128	10	0	0
T283	10078	17	0	0
T284	2825	4	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	749	0	0
T94	10209	33	0	0
T242	6239	7	0	0
T243	4715	10	0	0
T278	21524	50	0	0
T279	6477	8	0	0
T280	19448	19	0	0
T281	155272	190	0	0
T282	10128	3	0	0
T283	10078	23	0	0
T284	2825	7	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	692	0	0
T94	10209	16	0	0
T242	6239	5	0	0
T254	5094	9	0	0
T278	21524	46	0	0
T279	6477	13	0	0
T280	19448	45	0	0
T281	155272	202	0	0
T283	10078	12	0	0
T284	2825	2	0	0
T285	3438	4	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	709	0	0
T94	10209	23	0	0
T242	6239	6	0	0
T243	4715	3	0	0
T254	5094	13	0	0
T278	21524	19	0	0
T279	6477	10	0	0
T280	19448	20	0	0
T281	155272	235	0	0
T283	10078	27	0	0
T284	2825	6	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	733	0	0
T94	10209	12	0	0
T242	6239	16	0	0
T243	4715	4	0	0
T278	21524	15	0	0
T279	6477	6	0	0
T280	19448	27	0	0
T281	155272	269	0	0
T282	10128	17	0	0
T283	10078	17	0	0
T284	2825	1	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	810	0	0
T94	10209	11	0	0
T242	6239	10	0	0
T243	4715	1	0	0
T278	21524	80	0	0
T279	6477	19	0	0
T280	19448	43	0	0
T281	155272	249	0	0
T282	10128	10	0	0
T283	10078	16	0	0
T284	2825	4	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	675	0	0
T94	10209	21	0	0
T242	6239	15	0	0
T243	4715	5	0	0
T254	5094	12	0	0
T278	21524	38	0	0
T279	6477	13	0	0
T280	19448	27	0	0
T281	155272	213	0	0
T283	10078	17	0	0
T284	2825	7	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1385	0	0
T94	10209	66	0	0
T242	6239	7	0	0
T243	4715	8	0	0
T278	21524	80	0	0
T279	6477	37	0	0
T280	19448	53	0	0
T281	155272	187	0	0
T282	10128	14	0	0
T283	10078	62	0	0
T284	2825	9	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1336	0	0
T94	10209	38	0	0
T242	6239	26	0	0
T243	4715	9	0	0
T278	21524	48	0	0
T279	6477	29	0	0
T280	19448	23	0	0
T281	155272	201	0	0
T282	10128	28	0	0
T283	10078	37	0	0
T284	2825	6	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1267	0	0
T94	10209	69	0	0
T242	6239	31	0	0
T243	4715	5	0	0
T278	21524	44	0	0
T279	6477	43	0	0
T280	19448	5	0	0
T281	155272	218	0	0
T282	10128	17	0	0
T283	10078	56	0	0
T284	2825	9	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1295	0	0
T94	10209	16	0	0
T242	6239	22	0	0
T243	4715	6	0	0
T278	21524	45	0	0
T279	6477	23	0	0
T280	19448	35	0	0
T281	155272	259	0	0
T282	10128	16	0	0
T283	10078	24	0	0
T284	2825	1	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1200	0	0
T94	10209	41	0	0
T242	6239	51	0	0
T243	4715	6	0	0
T254	5094	4	0	0
T278	21524	34	0	0
T279	6477	20	0	0
T281	155272	225	0	0
T282	10128	12	0	0
T283	10078	12	0	0
T284	2825	4	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1319	0	0
T94	10209	52	0	0
T242	6239	24	0	0
T243	4715	7	0	0
T254	5094	41	0	0
T278	21524	17	0	0
T279	6477	6	0	0
T280	19448	50	0	0
T281	155272	219	0	0
T283	10078	30	0	0
T285	3438	15	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1088	0	0
T94	10209	47	0	0
T242	6239	8	0	0
T243	4715	4	0	0
T254	5094	32	0	0
T278	21524	21	0	0
T279	6477	62	0	0
T280	19448	35	0	0
T281	155272	211	0	0
T282	10128	6	0	0
T283	10078	34	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	1155	0	0
T94	10209	41	0	0
T242	6239	30	0	0
T243	4715	6	0	0
T278	21524	37	0	0
T279	6477	43	0	0
T280	19448	29	0	0
T281	155272	225	0	0
T282	10128	1	0	0
T283	10078	44	0	0
T284	2825	5	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	222	0	0
T94	10209	2	0	0
T243	4715	11	0	0
T254	5094	7	0	0
T278	21524	17	0	0
T280	19448	27	0	0
T283	10078	2	0	0
T284	2825	7	0	0
T286	4779	6	0	0
T287	4726	2	0	0
T288	10842	27	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	637	0	0
T94	10209	24	0	0
T242	6239	6	0	0
T243	4715	7	0	0
T278	21524	12	0	0
T279	6477	15	0	0
T280	19448	49	0	0
T281	155272	230	0	0
T282	10128	13	0	0
T283	10078	20	0	0
T284	2825	1	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	597	0	0
T94	10209	11	0	0
T242	6239	12	0	0
T243	4715	5	0	0
T278	21524	4	0	0
T279	6477	12	0	0
T280	19448	42	0	0
T281	155272	227	0	0
T282	10128	11	0	0
T283	10078	12	0	0
T284	2825	3	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	703	0	0
T94	10209	19	0	0
T242	6239	12	0	0
T243	4715	11	0	0
T254	5094	7	0	0
T278	21524	28	0	0
T280	19448	42	0	0
T281	155272	208	0	0
T282	10128	12	0	0
T283	10078	9	0	0
T284	2825	9	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	673	0	0
T94	10209	12	0	0
T242	6239	4	0	0
T243	4715	7	0	0
T278	21524	55	0	0
T279	6477	8	0	0
T280	19448	23	0	0
T281	155272	254	0	0
T282	10128	15	0	0
T283	10078	10	0	0
T284	2825	4	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	691	0	0
T94	10209	14	0	0
T242	6239	9	0	0
T243	4715	6	0	0
T254	5094	1	0	0
T278	21524	38	0	0
T279	6477	6	0	0
T280	19448	57	0	0
T281	155272	240	0	0
T282	10128	9	0	0
T283	10078	16	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	664	0	0
T94	10209	14	0	0
T242	6239	5	0	0
T243	4715	10	0	0
T254	5094	3	0	0
T278	21524	47	0	0
T279	6477	10	0	0
T280	19448	2	0	0
T281	155272	234	0	0
T282	10128	10	0	0
T283	10078	21	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	622	0	0
T94	10209	22	0	0
T242	6239	17	0	0
T243	4715	4	0	0
T278	21524	75	0	0
T279	6477	3	0	0
T280	19448	23	0	0
T281	155272	217	0	0
T282	10128	3	0	0
T283	10078	17	0	0
T284	2825	3	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	650	0	0
T94	10209	31	0	0
T242	6239	10	0	0
T243	4715	5	0	0
T278	21524	32	0	0
T279	6477	4	0	0
T280	19448	18	0	0
T281	155272	256	0	0
T282	10128	14	0	0
T283	10078	17	0	0
T284	2825	7	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	404885630	685	0	0
T94	10209	22	0	0
T242	6239	5	0	0
T243	4715	7	0	0
T278	21524	28	0	0
T279	6477	11	0	0
T280	19448	48	0	0
T281	155272	205	0	0
T282	10128	18	0	0
T283	10078	17	0	0
T284	2825	9	0	0