Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.69	97.12	93.60	98.44		100.00	84.29	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	376359250	3661	0	0
addr_rd_A	376359250	2666	0	0
bank0_info0_page_cfg_0_rd_A	376359250	3569	0	0
bank0_info0_page_cfg_1_rd_A	376359250	2993	0	0
bank0_info0_page_cfg_2_rd_A	376359250	3385	0	0
bank0_info0_page_cfg_3_rd_A	376359250	3573	0	0
bank0_info0_page_cfg_4_rd_A	376359250	2994	0	0
bank0_info0_page_cfg_5_rd_A	376359250	3505	0	0
bank0_info0_page_cfg_6_rd_A	376359250	3127	0	0
bank0_info0_page_cfg_7_rd_A	376359250	3618	0	0
bank0_info0_page_cfg_8_rd_A	376359250	3788	0	0
bank0_info0_page_cfg_9_rd_A	376359250	3284	0	0
bank0_info0_regwen_0_rd_A	376359250	2686	0	0
bank0_info0_regwen_1_rd_A	376359250	2331	0	0
bank0_info0_regwen_2_rd_A	376359250	2071	0	0
bank0_info0_regwen_3_rd_A	376359250	2806	0	0
bank0_info0_regwen_4_rd_A	376359250	2640	0	0
bank0_info0_regwen_5_rd_A	376359250	2677	0	0
bank0_info0_regwen_6_rd_A	376359250	2973	0	0
bank0_info0_regwen_7_rd_A	376359250	1732	0	0
bank0_info0_regwen_8_rd_A	376359250	2664	0	0
bank0_info0_regwen_9_rd_A	376359250	2665	0	0
bank0_info1_page_cfg_rd_A	376359250	2849	0	0
bank0_info1_regwen_rd_A	376359250	2819	0	0
bank0_info2_page_cfg_0_rd_A	376359250	2667	0	0
bank0_info2_page_cfg_1_rd_A	376359250	3496	0	0
bank0_info2_regwen_0_rd_A	376359250	2786	0	0
bank0_info2_regwen_1_rd_A	376359250	2200	0	0
bank1_info0_page_cfg_0_rd_A	376359250	3504	0	0
bank1_info0_page_cfg_1_rd_A	376359250	3416	0	0
bank1_info0_page_cfg_2_rd_A	376359250	3314	0	0
bank1_info0_page_cfg_3_rd_A	376359250	3162	0	0
bank1_info0_page_cfg_4_rd_A	376359250	3852	0	0
bank1_info0_page_cfg_5_rd_A	376359250	3828	0	0
bank1_info0_page_cfg_6_rd_A	376359250	3120	0	0
bank1_info0_page_cfg_7_rd_A	376359250	3260	0	0
bank1_info0_page_cfg_8_rd_A	376359250	3771	0	0
bank1_info0_page_cfg_9_rd_A	376359250	3256	0	0
bank1_info0_regwen_0_rd_A	376359250	2135	0	0
bank1_info0_regwen_1_rd_A	376359250	2646	0	0
bank1_info0_regwen_2_rd_A	376359250	2564	0	0
bank1_info0_regwen_3_rd_A	376359250	2673	0	0
bank1_info0_regwen_4_rd_A	376359250	2377	0	0
bank1_info0_regwen_5_rd_A	376359250	2312	0	0
bank1_info0_regwen_6_rd_A	376359250	1752	0	0
bank1_info0_regwen_7_rd_A	376359250	2664	0	0
bank1_info0_regwen_8_rd_A	376359250	1703	0	0
bank1_info0_regwen_9_rd_A	376359250	2264	0	0
bank1_info1_page_cfg_rd_A	376359250	3514	0	0
bank1_info1_regwen_rd_A	376359250	2118	0	0
bank1_info2_page_cfg_0_rd_A	376359250	3896	0	0
bank1_info2_page_cfg_1_rd_A	376359250	3068	0	0
bank1_info2_regwen_0_rd_A	376359250	2213	0	0
bank1_info2_regwen_1_rd_A	376359250	2651	0	0
bank_cfg_regwen_rd_A	376359250	2207	0	0
default_region_rd_A	376359250	3806	0	0
exec_rd_A	376359250	2144	0	0
fifo_lvl_rd_A	376359250	2578	0	0
fifo_rst_rd_A	376359250	2841	0	0
hw_info_cfg_override_rd_A	376359250	2892	0	0
intr_enable_rd_A	376359250	2973	0	0
mp_region_0_rd_A	376359250	2551	0	0
mp_region_1_rd_A	376359250	2315	0	0
mp_region_2_rd_A	376359250	2497	0	0
mp_region_3_rd_A	376359250	3019	0	0
mp_region_4_rd_A	376359250	2937	0	0
mp_region_5_rd_A	376359250	1964	0	0
mp_region_6_rd_A	376359250	2411	0	0
mp_region_7_rd_A	376359250	2439	0	0
mp_region_cfg_0_rd_A	376359250	3893	0	0
mp_region_cfg_1_rd_A	376359250	3756	0	0
mp_region_cfg_2_rd_A	376359250	3862	0	0
mp_region_cfg_3_rd_A	376359250	3366	0	0
mp_region_cfg_4_rd_A	376359250	3359	0	0
mp_region_cfg_5_rd_A	376359250	3647	0	0
mp_region_cfg_6_rd_A	376359250	3909	0	0
mp_region_cfg_7_rd_A	376359250	3416	0	0
phy_alert_cfg_rd_A	376359250	1332	0	0
region_cfg_regwen_0_rd_A	376359250	2216	0	0
region_cfg_regwen_1_rd_A	376359250	1626	0	0
region_cfg_regwen_2_rd_A	376359250	2690	0	0
region_cfg_regwen_3_rd_A	376359250	1765	0	0
region_cfg_regwen_4_rd_A	376359250	2055	0	0
region_cfg_regwen_5_rd_A	376359250	2646	0	0
region_cfg_regwen_6_rd_A	376359250	2201	0	0
region_cfg_regwen_7_rd_A	376359250	2274	0	0
scratch_rd_A	376359250	1621	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3661	0	0
T62	16727	1	0	0
T106	8260	6	0	0
T107	35687	3	0	0
T108	4154	152	0	0
T232	3058	81	0	0
T233	5160	443	0	0
T234	3632	86	0	0
T240	4884	84	0	0
T241	3463	5	0	0
T242	4131	2	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2666	0	0
T61	21047	65	0	0
T264	9860	14	0	0
T280	75015	59	0	0
T281	5627	3	0	0
T309	5744	13	0	0
T310	11459	6	0	0
T311	4037	6	0	0
T312	137020	164	0	0
T313	21106	3	0	0
T314	21158	26	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3569	0	0
T61	21047	15	0	0
T264	9860	18	0	0
T280	75015	128	0	0
T281	5627	15	0	0
T309	5744	80	0	0
T310	11459	19	0	0
T312	137020	151	0	0
T313	21106	33	0	0
T314	21158	28	0	0
T315	307506	461	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2993	0	0
T61	21047	69	0	0
T264	9860	37	0	0
T280	75015	102	0	0
T281	5627	13	0	0
T309	5744	72	0	0
T310	11459	38	0	0
T311	4037	5	0	0
T312	137020	148	0	0
T313	21106	43	0	0
T314	21158	68	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3385	0	0
T61	21047	31	0	0
T264	9860	3	0	0
T280	75015	188	0	0
T281	5627	10	0	0
T309	5744	11	0	0
T310	11459	44	0	0
T312	137020	108	0	0
T313	21106	56	0	0
T314	21158	26	0	0
T315	307506	495	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3573	0	0
T61	21047	35	0	0
T264	9860	2	0	0
T280	75015	161	0	0
T281	5627	11	0	0
T309	5744	15	0	0
T310	11459	57	0	0
T311	4037	14	0	0
T312	137020	180	0	0
T313	21106	14	0	0
T314	21158	53	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2994	0	0
T61	21047	22	0	0
T264	9860	4	0	0
T280	75015	127	0	0
T281	5627	49	0	0
T309	5744	8	0	0
T310	11459	17	0	0
T312	137020	129	0	0
T313	21106	7	0	0
T314	21158	23	0	0
T315	307506	456	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3505	0	0
T61	21047	57	0	0
T264	9860	13	0	0
T280	75015	191	0	0
T281	5627	11	0	0
T309	5744	68	0	0
T310	11459	16	0	0
T311	4037	2	0	0
T312	137020	130	0	0
T313	21106	47	0	0
T314	21158	33	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3127	0	0
T61	21047	53	0	0
T264	9860	18	0	0
T280	75015	133	0	0
T281	5627	4	0	0
T309	5744	26	0	0
T310	11459	14	0	0
T311	4037	38	0	0
T312	137020	153	0	0
T313	21106	24	0	0
T314	21158	63	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3618	0	0
T61	21047	61	0	0
T264	9860	10	0	0
T280	75015	199	0	0
T281	5627	8	0	0
T309	5744	1	0	0
T310	11459	16	0	0
T311	4037	7	0	0
T312	137020	119	0	0
T313	21106	29	0	0
T314	21158	62	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3788	0	0
T61	21047	59	0	0
T280	75015	108	0	0
T281	5627	23	0	0
T309	5744	6	0	0
T310	11459	25	0	0
T311	4037	2	0	0
T312	137020	119	0	0
T313	21106	56	0	0
T314	21158	82	0	0
T315	307506	450	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3284	0	0
T61	21047	25	0	0
T264	9860	13	0	0
T280	75015	117	0	0
T281	5627	30	0	0
T309	5744	10	0	0
T310	11459	10	0	0
T311	4037	1	0	0
T312	137020	175	0	0
T313	21106	64	0	0
T314	21158	20	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2686	0	0
T61	21047	66	0	0
T264	9860	33	0	0
T280	75015	45	0	0
T281	5627	5	0	0
T309	5744	12	0	0
T310	11459	23	0	0
T311	4037	5	0	0
T312	137020	154	0	0
T313	21106	19	0	0
T314	21158	43	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2331	0	0
T61	21047	20	0	0
T264	9860	9	0	0
T280	75015	39	0	0
T281	5627	3	0	0
T309	5744	10	0	0
T310	11459	43	0	0
T311	4037	8	0	0
T312	137020	147	0	0
T313	21106	58	0	0
T314	21158	48	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2071	0	0
T61	21047	11	0	0
T264	9860	12	0	0
T280	75015	38	0	0
T281	5627	8	0	0
T309	5744	14	0	0
T310	11459	13	0	0
T312	137020	100	0	0
T313	21106	13	0	0
T314	21158	41	0	0
T315	307506	439	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2806	0	0
T61	21047	23	0	0
T264	9860	28	0	0
T280	75015	31	0	0
T281	5627	13	0	0
T309	5744	6	0	0
T310	11459	45	0	0
T311	4037	7	0	0
T312	137020	147	0	0
T313	21106	56	0	0
T314	21158	21	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2640	0	0
T61	21047	28	0	0
T264	9860	26	0	0
T280	75015	36	0	0
T281	5627	4	0	0
T309	5744	5	0	0
T310	11459	24	0	0
T311	4037	3	0	0
T312	137020	115	0	0
T313	21106	24	0	0
T314	21158	65	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2677	0	0
T61	21047	26	0	0
T264	9860	22	0	0
T280	75015	30	0	0
T281	5627	1	0	0
T309	5744	8	0	0
T310	11459	28	0	0
T312	137020	133	0	0
T313	21106	33	0	0
T314	21158	48	0	0
T315	307506	452	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2973	0	0
T61	21047	51	0	0
T280	75015	25	0	0
T281	5627	3	0	0
T309	5744	3	0	0
T310	11459	23	0	0
T311	4037	5	0	0
T312	137020	143	0	0
T313	21106	61	0	0
T314	21158	71	0	0
T315	307506	488	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	1732	0	0
T61	21047	15	0	0
T264	9860	8	0	0
T280	75015	26	0	0
T281	5627	5	0	0
T309	5744	8	0	0
T310	11459	9	0	0
T311	4037	5	0	0
T312	137020	132	0	0
T313	21106	48	0	0
T314	21158	57	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2664	0	0
T61	21047	56	0	0
T264	9860	19	0	0
T280	75015	55	0	0
T281	5627	11	0	0
T309	5744	19	0	0
T311	4037	4	0	0
T312	137020	126	0	0
T313	21106	43	0	0
T314	21158	33	0	0
T315	307506	428	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2665	0	0
T61	21047	38	0	0
T264	9860	18	0	0
T280	75015	33	0	0
T281	5627	4	0	0
T309	5744	8	0	0
T310	11459	16	0	0
T311	4037	4	0	0
T312	137020	158	0	0
T313	21106	37	0	0
T314	21158	54	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2849	0	0
T61	21047	19	0	0
T264	9860	13	0	0
T280	75015	212	0	0
T281	5627	29	0	0
T309	5744	37	0	0
T310	11459	17	0	0
T311	4037	22	0	0
T312	137020	156	0	0
T313	21106	54	0	0
T314	21158	4	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2819	0	0
T61	21047	34	0	0
T264	9860	18	0	0
T280	75015	37	0	0
T281	5627	5	0	0
T309	5744	8	0	0
T310	11459	35	0	0
T311	4037	8	0	0
T312	137020	168	0	0
T313	21106	87	0	0
T314	21158	38	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2667	0	0
T61	21047	41	0	0
T264	9860	20	0	0
T280	75015	184	0	0
T281	5627	10	0	0
T309	5744	35	0	0
T310	11459	10	0	0
T311	4037	8	0	0
T312	137020	107	0	0
T313	21106	51	0	0
T314	21158	40	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3496	0	0
T61	21047	12	0	0
T264	9860	3	0	0
T280	75015	121	0	0
T281	5627	50	0	0
T309	5744	29	0	0
T311	4037	3	0	0
T312	137020	137	0	0
T313	21106	83	0	0
T314	21158	59	0	0
T315	307506	475	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2786	0	0
T61	21047	67	0	0
T264	9860	14	0	0
T280	75015	15	0	0
T281	5627	11	0	0
T309	5744	4	0	0
T310	11459	44	0	0
T311	4037	6	0	0
T312	137020	132	0	0
T313	21106	60	0	0
T314	21158	44	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2200	0	0
T61	21047	23	0	0
T280	75015	47	0	0
T281	5627	2	0	0
T309	5744	2	0	0
T310	11459	27	0	0
T311	4037	5	0	0
T312	137020	143	0	0
T313	21106	35	0	0
T314	21158	23	0	0
T315	307506	449	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3504	0	0
T61	21047	51	0	0
T264	9860	18	0	0
T280	75015	205	0	0
T281	5627	5	0	0
T309	5744	1	0	0
T310	11459	27	0	0
T311	4037	24	0	0
T312	137020	186	0	0
T313	21106	37	0	0
T314	21158	12	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3416	0	0
T61	21047	31	0	0
T264	9860	1	0	0
T280	75015	139	0	0
T281	5627	30	0	0
T309	5744	48	0	0
T310	11459	13	0	0
T311	4037	26	0	0
T312	137020	172	0	0
T313	21106	31	0	0
T314	21158	25	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3314	0	0
T61	21047	55	0	0
T264	9860	14	0	0
T280	75015	174	0	0
T281	5627	42	0	0
T309	5744	32	0	0
T310	11459	20	0	0
T311	4037	9	0	0
T312	137020	139	0	0
T313	21106	7	0	0
T314	21158	18	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3162	0	0
T61	21047	31	0	0
T264	9860	6	0	0
T280	75015	157	0	0
T281	5627	9	0	0
T309	5744	68	0	0
T310	11459	33	0	0
T312	137020	141	0	0
T313	21106	39	0	0
T314	21158	40	0	0
T315	307506	454	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3852	0	0
T61	21047	20	0	0
T280	75015	197	0	0
T281	5627	12	0	0
T309	5744	36	0	0
T310	11459	46	0	0
T311	4037	2	0	0
T312	137020	112	0	0
T313	21106	73	0	0
T314	21158	19	0	0
T315	307506	437	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3828	0	0
T61	21047	40	0	0
T264	9860	23	0	0
T280	75015	213	0	0
T281	5627	4	0	0
T309	5744	38	0	0
T310	11459	33	0	0
T311	4037	15	0	0
T312	137020	170	0	0
T313	21106	1	0	0
T314	21158	50	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3120	0	0
T61	21047	43	0	0
T264	9860	7	0	0
T280	75015	144	0	0
T281	5627	12	0	0
T309	5744	17	0	0
T310	11459	7	0	0
T311	4037	22	0	0
T312	137020	116	0	0
T313	21106	21	0	0
T314	21158	54	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3260	0	0
T61	21047	35	0	0
T264	9860	12	0	0
T280	75015	114	0	0
T281	5627	47	0	0
T309	5744	37	0	0
T310	11459	37	0	0
T311	4037	9	0	0
T312	137020	115	0	0
T313	21106	29	0	0
T314	21158	55	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3771	0	0
T61	21047	60	0	0
T280	75015	174	0	0
T281	5627	43	0	0
T309	5744	7	0	0
T310	11459	22	0	0
T311	4037	9	0	0
T312	137020	136	0	0
T313	21106	62	0	0
T314	21158	72	0	0
T315	307506	454	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3256	0	0
T61	21047	42	0	0
T264	9860	6	0	0
T280	75015	150	0	0
T281	5627	18	0	0
T309	5744	32	0	0
T310	11459	6	0	0
T311	4037	30	0	0
T312	137020	110	0	0
T313	21106	62	0	0
T314	21158	62	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2135	0	0
T61	21047	36	0	0
T264	9860	9	0	0
T280	75015	32	0	0
T281	5627	6	0	0
T309	5744	4	0	0
T310	11459	28	0	0
T312	137020	145	0	0
T313	21106	34	0	0
T314	21158	21	0	0
T315	307506	377	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2646	0	0
T61	21047	44	0	0
T264	9860	28	0	0
T280	75015	42	0	0
T281	5627	10	0	0
T309	5744	4	0	0
T310	11459	13	0	0
T311	4037	9	0	0
T312	137020	122	0	0
T313	21106	5	0	0
T314	21158	41	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2564	0	0
T61	21047	12	0	0
T264	9860	21	0	0
T280	75015	28	0	0
T281	5627	12	0	0
T309	5744	10	0	0
T310	11459	24	0	0
T311	4037	7	0	0
T312	137020	159	0	0
T313	21106	29	0	0
T314	21158	26	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2673	0	0
T61	21047	37	0	0
T264	9860	17	0	0
T280	75015	39	0	0
T281	5627	3	0	0
T309	5744	1	0	0
T310	11459	16	0	0
T311	4037	7	0	0
T312	137020	153	0	0
T313	21106	29	0	0
T314	21158	52	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2377	0	0
T61	21047	28	0	0
T264	9860	7	0	0
T280	75015	40	0	0
T281	5627	6	0	0
T309	5744	7	0	0
T310	11459	45	0	0
T311	4037	1	0	0
T312	137020	179	0	0
T313	21106	69	0	0
T314	21158	35	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2312	0	0
T61	21047	32	0	0
T264	9860	9	0	0
T280	75015	42	0	0
T281	5627	12	0	0
T309	5744	5	0	0
T310	11459	4	0	0
T311	4037	2	0	0
T312	137020	131	0	0
T313	21106	48	0	0
T314	21158	37	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	1752	0	0
T61	21047	56	0	0
T264	9860	15	0	0
T280	75015	24	0	0
T281	5627	3	0	0
T309	5744	14	0	0
T310	11459	22	0	0
T311	4037	9	0	0
T312	137020	149	0	0
T313	21106	11	0	0
T314	21158	28	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2664	0	0
T61	21047	68	0	0
T264	9860	2	0	0
T280	75015	39	0	0
T281	5627	5	0	0
T309	5744	7	0	0
T310	11459	10	0	0
T312	137020	155	0	0
T313	21106	58	0	0
T314	21158	43	0	0
T315	307506	447	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	1703	0	0
T61	21047	35	0	0
T264	9860	4	0	0
T280	75015	39	0	0
T281	5627	12	0	0
T309	5744	10	0	0
T310	11459	14	0	0
T311	4037	2	0	0
T312	137020	118	0	0
T313	21106	81	0	0
T314	21158	73	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2264	0	0
T61	21047	55	0	0
T264	9860	20	0	0
T280	75015	55	0	0
T281	5627	12	0	0
T309	5744	11	0	0
T310	11459	4	0	0
T311	4037	1	0	0
T312	137020	123	0	0
T313	21106	45	0	0
T314	21158	31	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3514	0	0
T61	21047	74	0	0
T264	9860	10	0	0
T280	75015	165	0	0
T281	5627	28	0	0
T309	5744	8	0	0
T310	11459	40	0	0
T311	4037	6	0	0
T312	137020	117	0	0
T313	21106	71	0	0
T314	21158	47	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2118	0	0
T61	21047	32	0	0
T264	9860	13	0	0
T280	75015	57	0	0
T281	5627	12	0	0
T309	5744	7	0	0
T310	11459	24	0	0
T311	4037	8	0	0
T312	137020	112	0	0
T313	21106	43	0	0
T314	21158	47	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3896	0	0
T61	21047	71	0	0
T264	9860	16	0	0
T280	75015	185	0	0
T281	5627	8	0	0
T309	5744	54	0	0
T310	11459	38	0	0
T311	4037	7	0	0
T312	137020	142	0	0
T313	21106	45	0	0
T314	21158	78	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3068	0	0
T61	21047	34	0	0
T264	9860	18	0	0
T280	75015	167	0	0
T309	5744	14	0	0
T310	11459	20	0	0
T311	4037	4	0	0
T312	137020	119	0	0
T313	21106	19	0	0
T314	21158	40	0	0
T315	307506	455	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2213	0	0
T61	21047	97	0	0
T264	9860	4	0	0
T280	75015	39	0	0
T281	5627	19	0	0
T309	5744	15	0	0
T310	11459	41	0	0
T312	137020	113	0	0
T313	21106	14	0	0
T314	21158	64	0	0
T315	307506	437	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2651	0	0
T61	21047	21	0	0
T280	75015	33	0	0
T281	5627	7	0	0
T309	5744	11	0	0
T310	11459	19	0	0
T311	4037	2	0	0
T312	137020	150	0	0
T313	21106	43	0	0
T314	21158	56	0	0
T315	307506	462	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2207	0	0
T61	21047	35	0	0
T264	9860	44	0	0
T280	75015	45	0	0
T281	5627	12	0	0
T309	5744	5	0	0
T310	11459	15	0	0
T311	4037	2	0	0
T312	137020	138	0	0
T313	21106	27	0	0
T314	21158	20	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3806	0	0
T61	21047	71	0	0
T264	9860	9	0	0
T280	75015	170	0	0
T281	5627	9	0	0
T309	5744	31	0	0
T310	11459	52	0	0
T311	4037	23	0	0
T312	137020	109	0	0
T313	21106	38	0	0
T314	21158	39	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2144	0	0
T61	21047	38	0	0
T264	9860	14	0	0
T280	75015	27	0	0
T281	5627	6	0	0
T309	5744	10	0	0
T310	11459	23	0	0
T311	4037	3	0	0
T312	137020	119	0	0
T313	21106	11	0	0
T314	21158	44	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2578	0	0
T61	21047	71	0	0
T264	9860	13	0	0
T280	75015	79	0	0
T281	5627	20	0	0
T309	5744	19	0	0
T310	11459	10	0	0
T311	4037	3	0	0
T312	137020	155	0	0
T313	21106	82	0	0
T314	21158	52	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2841	0	0
T61	21047	40	0	0
T264	9860	35	0	0
T280	75015	31	0	0
T281	5627	11	0	0
T309	5744	10	0	0
T310	11459	52	0	0
T311	4037	5	0	0
T312	137020	160	0	0
T313	21106	24	0	0
T314	21158	81	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2892	0	0
T61	21047	52	0	0
T264	9860	8	0	0
T280	75015	54	0	0
T281	5627	7	0	0
T309	5744	15	0	0
T310	11459	13	0	0
T311	4037	15	0	0
T312	137020	129	0	0
T313	21106	23	0	0
T314	21158	36	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2973	0	0
T61	21047	9	0	0
T264	9860	23	0	0
T280	75015	98	0	0
T281	5627	10	0	0
T310	11459	33	0	0
T311	4037	6	0	0
T312	137020	139	0	0
T313	21106	77	0	0
T314	21158	113	0	0
T315	307506	419	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2551	0	0
T61	21047	47	0	0
T264	9860	6	0	0
T280	75015	56	0	0
T281	5627	21	0	0
T309	5744	22	0	0
T310	11459	30	0	0
T312	137020	168	0	0
T313	21106	49	0	0
T314	21158	45	0	0
T315	307506	454	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2315	0	0
T61	21047	61	0	0
T280	75015	57	0	0
T281	5627	14	0	0
T309	5744	17	0	0
T310	11459	29	0	0
T311	4037	11	0	0
T312	137020	139	0	0
T313	21106	29	0	0
T314	21158	19	0	0
T315	307506	440	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2497	0	0
T61	21047	28	0	0
T264	9860	1	0	0
T280	75015	78	0	0
T281	5627	11	0	0
T309	5744	10	0	0
T310	11459	49	0	0
T311	4037	11	0	0
T312	137020	99	0	0
T313	21106	57	0	0
T314	21158	55	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3019	0	0
T61	21047	63	0	0
T264	9860	8	0	0
T280	75015	56	0	0
T281	5627	12	0	0
T309	5744	20	0	0
T310	11459	33	0	0
T311	4037	1	0	0
T312	137020	166	0	0
T313	21106	58	0	0
T314	21158	34	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2937	0	0
T61	21047	40	0	0
T264	9860	20	0	0
T280	75015	62	0	0
T281	5627	8	0	0
T309	5744	20	0	0
T310	11459	2	0	0
T311	4037	3	0	0
T312	137020	162	0	0
T313	21106	50	0	0
T314	21158	46	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	1964	0	0
T61	21047	73	0	0
T264	9860	6	0	0
T280	75015	40	0	0
T281	5627	3	0	0
T309	5744	15	0	0
T310	11459	35	0	0
T311	4037	10	0	0
T312	137020	150	0	0
T313	21106	57	0	0
T314	21158	32	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2411	0	0
T61	21047	59	0	0
T280	75015	45	0	0
T281	5627	20	0	0
T309	5744	10	0	0
T310	11459	5	0	0
T311	4037	1	0	0
T312	137020	166	0	0
T313	21106	42	0	0
T314	21158	81	0	0
T315	307506	390	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2439	0	0
T61	21047	97	0	0
T264	9860	14	0	0
T280	75015	56	0	0
T281	5627	4	0	0
T309	5744	16	0	0
T310	11459	27	0	0
T311	4037	7	0	0
T312	137020	129	0	0
T313	21106	73	0	0
T314	21158	35	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3893	0	0
T61	21047	14	0	0
T264	9860	16	0	0
T280	75015	229	0	0
T281	5627	8	0	0
T309	5744	8	0	0
T310	11459	37	0	0
T311	4037	30	0	0
T312	137020	102	0	0
T313	21106	105	0	0
T314	21158	43	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3756	0	0
T61	21047	89	0	0
T264	9860	9	0	0
T280	75015	193	0	0
T281	5627	11	0	0
T309	5744	41	0	0
T310	11459	44	0	0
T311	4037	6	0	0
T312	137020	130	0	0
T313	21106	87	0	0
T314	21158	19	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3862	0	0
T61	21047	54	0	0
T264	9860	23	0	0
T280	75015	221	0	0
T281	5627	24	0	0
T309	5744	28	0	0
T310	11459	24	0	0
T311	4037	27	0	0
T312	137020	139	0	0
T313	21106	42	0	0
T314	21158	20	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3366	0	0
T61	21047	62	0	0
T264	9860	15	0	0
T280	75015	115	0	0
T281	5627	47	0	0
T309	5744	59	0	0
T310	11459	23	0	0
T311	4037	9	0	0
T312	137020	148	0	0
T313	21106	37	0	0
T314	21158	42	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3359	0	0
T61	21047	75	0	0
T264	9860	2	0	0
T280	75015	175	0	0
T281	5627	12	0	0
T309	5744	23	0	0
T310	11459	25	0	0
T311	4037	24	0	0
T312	137020	144	0	0
T313	21106	31	0	0
T314	21158	45	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3647	0	0
T61	21047	9	0	0
T264	9860	4	0	0
T280	75015	196	0	0
T281	5627	3	0	0
T309	5744	73	0	0
T310	11459	6	0	0
T311	4037	24	0	0
T312	137020	120	0	0
T313	21106	15	0	0
T314	21158	49	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3909	0	0
T61	21047	24	0	0
T264	9860	22	0	0
T280	75015	141	0	0
T281	5627	10	0	0
T309	5744	41	0	0
T310	11459	57	0	0
T311	4037	14	0	0
T312	137020	152	0	0
T313	21106	16	0	0
T314	21158	43	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	3416	0	0
T61	21047	79	0	0
T264	9860	4	0	0
T280	75015	187	0	0
T281	5627	33	0	0
T309	5744	36	0	0
T310	11459	30	0	0
T311	4037	1	0	0
T312	137020	171	0	0
T313	21106	52	0	0
T314	21158	76	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	1332	0	0
T61	21047	39	0	0
T264	9860	2	0	0
T281	5627	1	0	0
T310	11459	28	0	0
T313	21106	33	0	0
T314	21158	67	0	0
T316	76639	524	0	0
T317	19857	17	0	0
T318	10563	5	0	0
T319	168426	489	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2216	0	0
T61	21047	44	0	0
T275	40469	45	0	0
T280	75015	50	0	0
T281	5627	3	0	0
T309	5744	19	0	0
T310	11459	44	0	0
T312	137020	158	0	0
T313	21106	36	0	0
T314	21158	74	0	0
T315	307506	460	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	1626	0	0
T61	21047	16	0	0
T264	9860	7	0	0
T280	75015	25	0	0
T281	5627	15	0	0
T309	5744	7	0	0
T311	4037	3	0	0
T312	137020	114	0	0
T313	21106	49	0	0
T314	21158	62	0	0
T315	307506	367	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2690	0	0
T61	21047	14	0	0
T264	9860	21	0	0
T280	75015	28	0	0
T281	5627	13	0	0
T309	5744	2	0	0
T310	11459	14	0	0
T311	4037	5	0	0
T312	137020	129	0	0
T313	21106	41	0	0
T314	21158	19	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	1765	0	0
T61	21047	43	0	0
T264	9860	8	0	0
T280	75015	43	0	0
T281	5627	9	0	0
T309	5744	11	0	0
T310	11459	51	0	0
T311	4037	6	0	0
T312	137020	161	0	0
T313	21106	34	0	0
T314	21158	25	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2055	0	0
T61	21047	31	0	0
T264	9860	7	0	0
T280	75015	42	0	0
T281	5627	5	0	0
T309	5744	4	0	0
T310	11459	27	0	0
T311	4037	6	0	0
T312	137020	137	0	0
T313	21106	33	0	0
T314	21158	36	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2646	0	0
T61	21047	20	0	0
T264	9860	7	0	0
T280	75015	46	0	0
T281	5627	9	0	0
T309	5744	10	0	0
T310	11459	12	0	0
T311	4037	6	0	0
T312	137020	143	0	0
T313	21106	24	0	0
T314	21158	20	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2201	0	0
T61	21047	41	0	0
T275	40469	28	0	0
T280	75015	58	0	0
T281	5627	4	0	0
T309	5744	5	0	0
T311	4037	1	0	0
T312	137020	122	0	0
T313	21106	52	0	0
T314	21158	48	0	0
T315	307506	453	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	2274	0	0
T61	21047	76	0	0
T264	9860	14	0	0
T280	75015	70	0	0
T281	5627	8	0	0
T309	5744	9	0	0
T310	11459	8	0	0
T311	4037	1	0	0
T312	137020	166	0	0
T313	21106	40	0	0
T314	21158	30	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	376359250	1621	0	0
T61	21047	44	0	0
T264	9860	8	0	0
T280	75015	34	0	0
T281	5627	6	0	0
T309	5744	10	0	0
T310	11459	24	0	0
T311	4037	7	0	0
T312	137020	101	0	0
T313	21106	34	0	0
T314	21158	25	0	0