SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_dfifo[1].fifo_d |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_dfifo[2].fifo_d |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
100.00 | 100.00 | 100.00 | gen_dfifo[2].fifo_d |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
92.19 | 100.00 | 68.75 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
88.33 | 95.00 | 75.00 | 83.33 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
78.34 | 92.65 | 64.66 | 71.43 | 84.62 | u_to_prog_fifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_normal_fifo.u_fifo_cnt | 81.58 | 92.00 | 80.00 | 72.73 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
62.12 | 78.57 | 38.46 | 71.43 | 60.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
65.86 | 86.11 | 54.84 | 62.50 | 60.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
78.34 | 92.65 | 64.66 | 71.43 | 84.62 | u_to_prog_fifo |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_normal_fifo.u_fifo_cnt | 71.04 | 90.91 | 66.67 | 55.56 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 377943908 | 4437968 | 0 | 0 |
DepthKnown_A | 377943908 | 377051522 | 0 | 0 |
RvalidKnown_A | 377943908 | 377051522 | 0 | 0 |
WreadyKnown_A | 377943908 | 377051522 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 1261 | 1261 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 4437968 | 0 | 0 |
T2 | 248165 | 9590 | 0 | 0 |
T3 | 7464 | 169 | 0 | 0 |
T4 | 276938 | 11417 | 0 | 0 |
T5 | 119998 | 25888 | 0 | 0 |
T6 | 0 | 25600 | 0 | 0 |
T10 | 402018 | 5120 | 0 | 0 |
T11 | 3952 | 0 | 0 | 0 |
T12 | 131182 | 1355 | 0 | 0 |
T16 | 3303 | 0 | 0 | 0 |
T17 | 75674 | 0 | 0 | 0 |
T18 | 1924 | 19 | 0 | 0 |
T25 | 0 | 8072 | 0 | 0 |
T56 | 0 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 377051522 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 377051522 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 377051522 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 1261 | 1261 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T16 | 1 | 1 | 0 | 0 |
T17 | 1 | 1 | 0 | 0 |
T18 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 377943908 | 30585179 | 0 | 0 |
DepthKnown_A | 377943908 | 377051522 | 0 | 0 |
RvalidKnown_A | 377943908 | 377051522 | 0 | 0 |
WreadyKnown_A | 377943908 | 377051522 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 1261 | 1261 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 30585179 | 0 | 0 |
T1 | 210909 | 96398 | 0 | 0 |
T2 | 248165 | 20489 | 0 | 0 |
T3 | 7464 | 629 | 0 | 0 |
T4 | 276938 | 113629 | 0 | 0 |
T10 | 402018 | 23562 | 0 | 0 |
T11 | 3952 | 505 | 0 | 0 |
T12 | 131182 | 8524 | 0 | 0 |
T16 | 3303 | 172 | 0 | 0 |
T17 | 75674 | 6579 | 0 | 0 |
T18 | 1924 | 381 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 377051522 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 377051522 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 377051522 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 1261 | 1261 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T16 | 1 | 1 | 0 | 0 |
T17 | 1 | 1 | 0 | 0 |
T18 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 4 | 4 | 100.00 | |
CONT_ASSIGN | 44 | 1 | 1 | 100.00 |
CONT_ASSIGN | 45 | 1 | 1 | 100.00 |
CONT_ASSIGN | 48 | 1 | 1 | 100.00 |
CONT_ASSIGN | 49 | 1 | 1 | 100.00 |
CONT_ASSIGN | 53 | 0 | 0 |
Line No. | Covered | Statements | |
---|---|---|---|
44 | 1 | 1 | |
45 | 1 | 1 | |
48 | 1 | 1 | |
49 | 1 | 1 | |
53 | unreachable |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 377943908 | 35147470 | 0 | 0 |
DepthKnown_A | 377943908 | 377051522 | 0 | 0 |
RvalidKnown_A | 377943908 | 377051522 | 0 | 0 |
WreadyKnown_A | 377943908 | 377051522 | 0 | 0 |
gen_passthru_fifo.paramCheckPass | 1261 | 1261 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 35147470 | 0 | 0 |
T1 | 210909 | 96398 | 0 | 0 |
T2 | 248165 | 63752 | 0 | 0 |
T3 | 7464 | 629 | 0 | 0 |
T4 | 276938 | 113629 | 0 | 0 |
T10 | 402018 | 23562 | 0 | 0 |
T11 | 3952 | 505 | 0 | 0 |
T12 | 131182 | 8524 | 0 | 0 |
T16 | 3303 | 172 | 0 | 0 |
T17 | 75674 | 20143 | 0 | 0 |
T18 | 1924 | 381 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 377051522 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 377051522 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 377943908 | 377051522 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 1261 | 1261 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T16 | 1 | 1 | 0 | 0 |
T17 | 1 | 1 | 0 | 0 |
T18 | 1 | 1 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 15 | 15 | 100.00 | |
ALWAYS | 69 | 4 | 4 | 100.00 |
CONT_ASSIGN | 81 | 1 | 1 | 100.00 |
CONT_ASSIGN | 82 | 1 | 1 | 100.00 |
CONT_ASSIGN | 100 | 1 | 1 | 100.00 |
CONT_ASSIGN | 101 | 1 | 1 | 100.00 |
CONT_ASSIGN | 108 | 1 | 1 | 100.00 |
ALWAYS | 111 | 2 | 2 | 100.00 |
CONT_ASSIGN | 116 | 1 | 1 | 100.00 |
CONT_ASSIGN | 133 | 1 | 1 | 100.00 |
CONT_ASSIGN | 134 | 1 | 1 | 100.00 |
CONT_ASSIGN | 138 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
69 | 1 | 1 | |
70 | 1 | 1 | |
71 | 1 | 1 | |
72 | 1 | 1 | |
MISSING_ELSE | |||
81 | 1 | 1 | |
82 | 1 | 1 | |
100 | 1 | 1 | |
101 | 1 | 1 | |
108 | 1 | 1 | |
111 | 1 | 1 | |
112 | 1 | 1 | |
MISSING_ELSE | |||
116 | 1 | 1 | |
133 | 1 | 1 | |
134 | 1 | 1 | |
138 | 1 | 1 |
Total | Covered | Percent | |
---|---|---|---|
Conditions | 16 | 11 | 68.75 |
Logical | 16 | 11 | 68.75 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 |
LINE 81 EXPRESSION (((~full_o)) & ((~gen_normal_fifo.under_rst))) -----1----- ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Covered | T1,T2,T3 |
LINE 82 EXPRESSION (((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) -------------1------------ ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Not Covered | |
1 | 1 | Covered | T1,T2,T3 |
LINE 100 EXPRESSION (wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Not Covered | |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 101 EXPRESSION (rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Not Covered | |
1 | 0 | 1 | Covered | T1,T2,T3 |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 138 EXPRESSION (gen_normal_fifo.empty ? (17'(0)) : gen_normal_fifo.rdata_int) ----------1----------
-1- | Status | Tests |
---|---|---|
0 | Covered | T1,T2,T3 |
1 | Covered | T1,T2,T3 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
Branches | 7 | 7 | 100.00 | |
TERNARY | 138 | 2 | 2 | 100.00 |
IF | 69 | 3 | 3 | 100.00 |
IF | 111 | 2 | 2 | 100.00 |
LineNo. Expression -1-: 138 (gen_normal_fifo.empty) ?
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 69 if ((!rst_ni)) -2-: 71 if (gen_normal_fifo.under_rst)
-1- | -2- | Status | Tests |
---|---|---|---|
1 | - | Covered | T1,T2,T3 |
0 | 1 | Covered | T1,T2,T3 |
0 | 0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 111 if (gen_normal_fifo.fifo_incr_wptr)
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Covered | T1,T2,T3 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 5 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 5 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 375846199 | 2928691 | 0 | 0 |
DepthKnown_A | 375846199 | 375036770 | 0 | 0 |
RvalidKnown_A | 375846199 | 375036770 | 0 | 0 |
WreadyKnown_A | 375846199 | 375036770 | 0 | 0 |
gen_normal_fifo.depthShallNotExceedParamDepth | 375846199 | 2928691 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 2928691 | 0 | 0 |
T1 | 210909 | 8494 | 0 | 0 |
T2 | 248165 | 5013 | 0 | 0 |
T3 | 7464 | 72 | 0 | 0 |
T4 | 276938 | 6918 | 0 | 0 |
T10 | 402018 | 2560 | 0 | 0 |
T11 | 3952 | 0 | 0 | 0 |
T12 | 131182 | 0 | 0 | 0 |
T16 | 3303 | 0 | 0 | 0 |
T17 | 75674 | 4954 | 0 | 0 |
T18 | 1924 | 17 | 0 | 0 |
T25 | 0 | 8508 | 0 | 0 |
T29 | 0 | 6 | 0 | 0 |
T69 | 0 | 5 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 375036770 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 375036770 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 375036770 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 2928691 | 0 | 0 |
T1 | 210909 | 8494 | 0 | 0 |
T2 | 248165 | 5013 | 0 | 0 |
T3 | 7464 | 72 | 0 | 0 |
T4 | 276938 | 6918 | 0 | 0 |
T10 | 402018 | 2560 | 0 | 0 |
T11 | 3952 | 0 | 0 | 0 |
T12 | 131182 | 0 | 0 | 0 |
T16 | 3303 | 0 | 0 | 0 |
T17 | 75674 | 4954 | 0 | 0 |
T18 | 1924 | 17 | 0 | 0 |
T25 | 0 | 8508 | 0 | 0 |
T29 | 0 | 6 | 0 | 0 |
T69 | 0 | 5 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 14 | 11 | 78.57 | |
ALWAYS | 69 | 4 | 4 | 100.00 |
CONT_ASSIGN | 81 | 1 | 1 | 100.00 |
CONT_ASSIGN | 82 | 1 | 1 | 100.00 |
CONT_ASSIGN | 100 | 1 | 1 | 100.00 |
CONT_ASSIGN | 101 | 0 | 0 | |
CONT_ASSIGN | 108 | 1 | 0 | 0.00 |
ALWAYS | 111 | 2 | 1 | 50.00 |
CONT_ASSIGN | 116 | 1 | 1 | 100.00 |
CONT_ASSIGN | 133 | 1 | 0 | 0.00 |
CONT_ASSIGN | 134 | 1 | 1 | 100.00 |
CONT_ASSIGN | 138 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
69 | 1 | 1 | |
70 | 1 | 1 | |
71 | 1 | 1 | |
72 | 1 | 1 | |
MISSING_ELSE | |||
81 | 1 | 1 | |
82 | 1 | 1 | |
100 | 1 | 1 | |
101 | unreachable | ||
108 | 0 | 1 | |
111 | 1 | 1 | |
112 | 0 | 1 | |
MISSING_ELSE | |||
116 | 1 | 1 | |
133 | 0 | 1 | |
134 | 1 | 1 | |
138 | 1 | 1 |
Total | Covered | Percent | |
---|---|---|---|
Conditions | 13 | 5 | 38.46 |
Logical | 13 | 5 | 38.46 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 |
LINE 81 EXPRESSION (((~full_o)) & ((~gen_normal_fifo.under_rst))) -----1----- ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Not Covered | |
1 | 0 | Covered | T1,T2,T3 |
1 | 1 | Covered | T1,T2,T3 |
LINE 82 EXPRESSION (((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) -------------1------------ ---------------2--------------
-1- | -2- | Status | Tests |
---|---|---|---|
0 | 1 | Covered | T1,T2,T3 |
1 | 0 | Not Covered | |
1 | 1 | Not Covered |
LINE 100 EXPRESSION (wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Not Covered | |
1 | 1 | 0 | Not Covered | |
1 | 1 | 1 | Not Covered |
LINE 101 EXPRESSION (rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) ----1--- ----2--- ---------------3--------------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Unreachable | |
1 | 0 | 1 | Not Covered | |
1 | 1 | 0 | Unreachable | |
1 | 1 | 1 | Unreachable |
LINE 138 EXPRESSION (gen_normal_fifo.empty ? (5'(0)) : gen_normal_fifo.rdata_int) ----------1----------
-1- | Status | Tests |
---|---|---|
0 | Not Covered | |
1 | Covered | T1,T2,T3 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
Branches | 7 | 5 | 71.43 | |
TERNARY | 138 | 2 | 1 | 50.00 |
IF | 69 | 3 | 3 | 100.00 |
IF | 111 | 2 | 1 | 50.00 |
LineNo. Expression -1-: 138 (gen_normal_fifo.empty) ?
-1- | Status | Tests |
---|---|---|
1 | Covered | T1,T2,T3 |
0 | Not Covered |
LineNo. Expression -1-: 69 if ((!rst_ni)) -2-: 71 if (gen_normal_fifo.under_rst)
-1- | -2- | Status | Tests |
---|---|---|---|
1 | - | Covered | T1,T2,T3 |
0 | 1 | Covered | T1,T2,T3 |
0 | 0 | Covered | T1,T2,T3 |
LineNo. Expression -1-: 111 if (gen_normal_fifo.fifo_incr_wptr)
-1- | Status | Tests |
---|---|---|
1 | Not Covered | |
0 | Covered | T1,T2,T3 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 5 | 5 | 100.00 | 3 | 60.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 5 | 5 | 100.00 | 3 | 60.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
DataKnown_A | 375846199 | 0 | 0 | 0 |
DepthKnown_A | 375846199 | 375036770 | 0 | 0 |
RvalidKnown_A | 375846199 | 375036770 | 0 | 0 |
WreadyKnown_A | 375846199 | 375036770 | 0 | 0 |
gen_normal_fifo.depthShallNotExceedParamDepth | 375846199 | 0 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 0 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 375036770 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 375036770 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 375036770 | 0 | 0 |
T1 | 210909 | 210823 | 0 | 0 |
T2 | 248165 | 238236 | 0 | 0 |
T3 | 7464 | 7381 | 0 | 0 |
T4 | 276938 | 276873 | 0 | 0 |
T10 | 402018 | 402004 | 0 | 0 |
T11 | 3952 | 3260 | 0 | 0 |
T12 | 131182 | 105931 | 0 | 0 |
T16 | 3303 | 3245 | 0 | 0 |
T17 | 75674 | 75576 | 0 | 0 |
T18 | 1924 | 1854 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 375846199 | 0 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |