Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
7884 |
1 |
|
T3 |
219 |
|
T25 |
118 |
|
T20 |
1 |
| others[1] |
1076 |
1 |
|
T26 |
1 |
|
T31 |
18 |
|
T49 |
12 |
| others[2] |
1006 |
1 |
|
T1 |
1 |
|
T23 |
1 |
|
T31 |
20 |
| others[3] |
1828 |
1 |
|
T5 |
1 |
|
T31 |
37 |
|
T49 |
22 |
| false |
563 |
1 |
|
T19 |
1 |
|
T31 |
7 |
|
T49 |
3 |
| true |
1347 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T16 |
1 |
|
T31 |
10 |
|
T124 |
1 |
| others[1] |
228 |
1 |
|
T23 |
1 |
|
T31 |
10 |
|
T21 |
1 |
| others[2] |
252 |
1 |
|
T38 |
1 |
|
T31 |
9 |
|
T219 |
1 |
| others[3] |
427 |
1 |
|
T31 |
18 |
|
T43 |
3 |
|
T130 |
12 |
| false |
116 |
1 |
|
T31 |
8 |
|
T43 |
1 |
|
T130 |
6 |
| true |
12471 |
1 |
|
T1 |
1 |
|
T3 |
219 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
240 |
1 |
|
T31 |
14 |
|
T43 |
2 |
|
T224 |
1 |
| others[1] |
195 |
1 |
|
T38 |
1 |
|
T31 |
7 |
|
T21 |
1 |
| others[2] |
246 |
1 |
|
T23 |
1 |
|
T31 |
11 |
|
T130 |
13 |
| others[3] |
378 |
1 |
|
T6 |
1 |
|
T31 |
13 |
|
T43 |
4 |
| false |
108 |
1 |
|
T31 |
6 |
|
T43 |
1 |
|
T130 |
4 |
| true |
12537 |
1 |
|
T1 |
1 |
|
T3 |
219 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8117 |
1 |
|
T3 |
219 |
|
T25 |
118 |
|
T13 |
2 |
| others[1] |
1249 |
1 |
|
T31 |
16 |
|
T49 |
9 |
|
T43 |
4 |
| others[2] |
1220 |
1 |
|
T1 |
1 |
|
T12 |
1 |
|
T31 |
19 |
| others[3] |
2024 |
1 |
|
T19 |
1 |
|
T26 |
1 |
|
T31 |
36 |
| false |
615 |
1 |
|
T6 |
1 |
|
T31 |
8 |
|
T49 |
3 |
| true |
479 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8050 |
1 |
|
T1 |
1 |
|
T3 |
219 |
|
T25 |
118 |
| others[1] |
1192 |
1 |
|
T19 |
1 |
|
T31 |
16 |
|
T49 |
7 |
| others[2] |
1281 |
1 |
|
T31 |
18 |
|
T49 |
10 |
|
T43 |
2 |
| others[3] |
2083 |
1 |
|
T31 |
37 |
|
T49 |
19 |
|
T43 |
1 |
| false |
648 |
1 |
|
T31 |
8 |
|
T49 |
3 |
|
T43 |
1 |
| true |
450 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
112 |
1 |
|
T16 |
1 |
|
T31 |
2 |
|
T43 |
2 |
| others[1] |
110 |
1 |
|
T31 |
4 |
|
T43 |
2 |
|
T62 |
1 |
| others[2] |
105 |
1 |
|
T31 |
7 |
|
T43 |
1 |
|
T130 |
4 |
| others[3] |
199 |
1 |
|
T6 |
1 |
|
T31 |
11 |
|
T43 |
5 |
| false |
58 |
1 |
|
T31 |
1 |
|
T43 |
1 |
|
T111 |
1 |
| true |
13120 |
1 |
|
T1 |
1 |
|
T3 |
219 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
247 |
1 |
|
T31 |
8 |
|
T43 |
4 |
|
T130 |
11 |
| others[1] |
261 |
1 |
|
T20 |
1 |
|
T31 |
6 |
|
T21 |
1 |
| others[2] |
253 |
1 |
|
T31 |
17 |
|
T43 |
2 |
|
T39 |
1 |
| others[3] |
385 |
1 |
|
T6 |
1 |
|
T26 |
1 |
|
T38 |
1 |
| false |
128 |
1 |
|
T31 |
5 |
|
T43 |
1 |
|
T126 |
1 |
| true |
12430 |
1 |
|
T1 |
1 |
|
T3 |
219 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
7862 |
1 |
|
T3 |
219 |
|
T25 |
118 |
|
T13 |
2 |
| others[1] |
1051 |
1 |
|
T20 |
1 |
|
T31 |
17 |
|
T49 |
14 |
| others[2] |
1041 |
1 |
|
T10 |
1 |
|
T5 |
1 |
|
T31 |
24 |
| others[3] |
1737 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T23 |
1 |
| false |
581 |
1 |
|
T19 |
1 |
|
T38 |
1 |
|
T31 |
4 |
| true |
1432 |
1 |
|
T4 |
1 |
|
T16 |
1 |
|
T26 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T16 |
1 |
|
T26 |
1 |
|
T20 |
1 |
| others[1] |
217 |
1 |
|
T38 |
1 |
|
T31 |
5 |
|
T46 |
1 |
| others[2] |
254 |
1 |
|
T31 |
13 |
|
T43 |
2 |
|
T302 |
1 |
| others[3] |
426 |
1 |
|
T6 |
1 |
|
T31 |
26 |
|
T43 |
3 |
| false |
116 |
1 |
|
T31 |
8 |
|
T43 |
2 |
|
T122 |
1 |
| true |
12449 |
1 |
|
T1 |
1 |
|
T3 |
219 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
236 |
1 |
|
T38 |
1 |
|
T31 |
11 |
|
T130 |
10 |
| others[1] |
224 |
1 |
|
T31 |
5 |
|
T46 |
1 |
|
T130 |
20 |
| others[2] |
244 |
1 |
|
T6 |
1 |
|
T31 |
7 |
|
T122 |
1 |
| others[3] |
396 |
1 |
|
T31 |
18 |
|
T124 |
1 |
|
T43 |
3 |
| false |
112 |
1 |
|
T31 |
7 |
|
T43 |
1 |
|
T130 |
4 |
| true |
12492 |
1 |
|
T1 |
1 |
|
T3 |
219 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
7999 |
1 |
|
T3 |
219 |
|
T25 |
118 |
|
T13 |
2 |
| others[1] |
1265 |
1 |
|
T31 |
25 |
|
T49 |
9 |
|
T43 |
3 |
| others[2] |
1270 |
1 |
|
T1 |
1 |
|
T5 |
1 |
|
T31 |
15 |
| others[3] |
2058 |
1 |
|
T19 |
1 |
|
T31 |
30 |
|
T49 |
23 |
| false |
641 |
1 |
|
T12 |
1 |
|
T31 |
11 |
|
T49 |
7 |
| true |
471 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1210 |
1 |
|
T31 |
25 |
|
T49 |
10 |
|
T43 |
1 |
| others[1] |
1248 |
1 |
|
T1 |
1 |
|
T31 |
20 |
|
T49 |
11 |
| others[2] |
1206 |
1 |
|
T31 |
15 |
|
T49 |
7 |
|
T124 |
1 |
| others[3] |
2150 |
1 |
|
T19 |
1 |
|
T31 |
33 |
|
T49 |
27 |
| false |
619 |
1 |
|
T31 |
8 |
|
T49 |
1 |
|
T43 |
2 |
| true |
451 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
111 |
1 |
|
T31 |
4 |
|
T43 |
2 |
|
T62 |
1 |
| others[1] |
113 |
1 |
|
T31 |
4 |
|
T43 |
2 |
|
T130 |
4 |
| others[2] |
105 |
1 |
|
T31 |
2 |
|
T124 |
1 |
|
T43 |
4 |
| others[3] |
176 |
1 |
|
T31 |
5 |
|
T126 |
1 |
|
T237 |
1 |
| false |
52 |
1 |
|
T31 |
2 |
|
T43 |
3 |
|
T130 |
3 |
| true |
6327 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
223 |
1 |
|
T26 |
1 |
|
T23 |
1 |
|
T31 |
6 |
| others[1] |
247 |
1 |
|
T6 |
1 |
|
T31 |
13 |
|
T122 |
1 |
| others[2] |
247 |
1 |
|
T16 |
1 |
|
T31 |
9 |
|
T43 |
1 |
| others[3] |
404 |
1 |
|
T38 |
1 |
|
T31 |
16 |
|
T43 |
2 |
| false |
122 |
1 |
|
T31 |
2 |
|
T43 |
1 |
|
T130 |
5 |
| true |
5641 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1051 |
1 |
|
T4 |
1 |
|
T12 |
1 |
|
T31 |
18 |
| others[1] |
1084 |
1 |
|
T5 |
1 |
|
T19 |
1 |
|
T31 |
22 |
| others[2] |
1072 |
1 |
|
T31 |
16 |
|
T49 |
14 |
|
T43 |
2 |
| others[3] |
1733 |
1 |
|
T16 |
1 |
|
T38 |
1 |
|
T31 |
31 |
| false |
531 |
1 |
|
T1 |
1 |
|
T20 |
1 |
|
T31 |
14 |
| true |
1413 |
1 |
|
T10 |
1 |
|
T6 |
1 |
|
T26 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
218 |
1 |
|
T31 |
6 |
|
T43 |
1 |
|
T303 |
1 |
| others[1] |
251 |
1 |
|
T31 |
11 |
|
T43 |
1 |
|
T62 |
1 |
| others[2] |
230 |
1 |
|
T23 |
1 |
|
T20 |
1 |
|
T31 |
9 |
| others[3] |
391 |
1 |
|
T31 |
20 |
|
T21 |
1 |
|
T43 |
2 |
| false |
143 |
1 |
|
T31 |
5 |
|
T43 |
1 |
|
T130 |
4 |
| true |
5651 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
226 |
1 |
|
T31 |
8 |
|
T43 |
1 |
|
T122 |
1 |
| others[1] |
214 |
1 |
|
T31 |
12 |
|
T237 |
1 |
|
T130 |
10 |
| others[2] |
225 |
1 |
|
T20 |
1 |
|
T31 |
9 |
|
T124 |
1 |
| others[3] |
369 |
1 |
|
T31 |
21 |
|
T43 |
1 |
|
T62 |
1 |
| false |
121 |
1 |
|
T31 |
3 |
|
T130 |
1 |
|
T227 |
1 |
| true |
5729 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1247 |
1 |
|
T31 |
22 |
|
T49 |
12 |
|
T43 |
1 |
| others[1] |
1272 |
1 |
|
T6 |
1 |
|
T31 |
22 |
|
T49 |
9 |
| others[2] |
1234 |
1 |
|
T1 |
1 |
|
T19 |
1 |
|
T31 |
17 |
| others[3] |
2080 |
1 |
|
T38 |
1 |
|
T31 |
32 |
|
T49 |
23 |
| false |
585 |
1 |
|
T31 |
8 |
|
T49 |
2 |
|
T43 |
1 |
| true |
466 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1268 |
1 |
|
T31 |
23 |
|
T49 |
19 |
|
T161 |
1 |
| others[1] |
1263 |
1 |
|
T19 |
1 |
|
T31 |
18 |
|
T49 |
6 |
| others[2] |
1223 |
1 |
|
T31 |
17 |
|
T49 |
9 |
|
T44 |
1 |
| others[3] |
2085 |
1 |
|
T1 |
1 |
|
T4 |
1 |
|
T31 |
33 |
| false |
595 |
1 |
|
T31 |
10 |
|
T49 |
5 |
|
T44 |
1 |
| true |
450 |
1 |
|
T10 |
1 |
|
T16 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
117 |
1 |
|
T31 |
1 |
|
T43 |
3 |
|
T224 |
2 |
| others[1] |
92 |
1 |
|
T31 |
1 |
|
T43 |
2 |
|
T122 |
1 |
| others[2] |
116 |
1 |
|
T31 |
6 |
|
T43 |
1 |
|
T130 |
3 |
| others[3] |
192 |
1 |
|
T31 |
12 |
|
T124 |
1 |
|
T43 |
5 |
| false |
55 |
1 |
|
T31 |
3 |
|
T371 |
1 |
|
T373 |
1 |
| true |
6312 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T6 |
1 |
|
T31 |
9 |
|
T43 |
4 |
| others[1] |
238 |
1 |
|
T31 |
8 |
|
T21 |
1 |
|
T303 |
1 |
| others[2] |
219 |
1 |
|
T31 |
9 |
|
T130 |
10 |
|
T374 |
1 |
| others[3] |
405 |
1 |
|
T16 |
1 |
|
T23 |
1 |
|
T31 |
16 |
| false |
115 |
1 |
|
T31 |
8 |
|
T43 |
1 |
|
T24 |
1 |
| true |
5673 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1048 |
1 |
|
T4 |
1 |
|
T19 |
1 |
|
T20 |
1 |
| others[1] |
1027 |
1 |
|
T31 |
20 |
|
T49 |
11 |
|
T43 |
2 |
| others[2] |
1021 |
1 |
|
T10 |
1 |
|
T16 |
1 |
|
T38 |
1 |
| others[3] |
1785 |
1 |
|
T5 |
1 |
|
T26 |
1 |
|
T31 |
35 |
| false |
579 |
1 |
|
T1 |
1 |
|
T31 |
11 |
|
T49 |
8 |
| true |
1424 |
1 |
|
T6 |
1 |
|
T23 |
1 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
221 |
1 |
|
T31 |
7 |
|
T122 |
1 |
|
T130 |
10 |
| others[1] |
233 |
1 |
|
T31 |
12 |
|
T37 |
1 |
|
T302 |
1 |
| others[2] |
235 |
1 |
|
T31 |
2 |
|
T46 |
1 |
|
T43 |
3 |
| others[3] |
387 |
1 |
|
T31 |
14 |
|
T43 |
1 |
|
T24 |
1 |
| false |
115 |
1 |
|
T31 |
5 |
|
T124 |
1 |
|
T130 |
4 |
| true |
5693 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
199 |
1 |
|
T31 |
7 |
|
T124 |
1 |
|
T130 |
4 |
| others[1] |
233 |
1 |
|
T38 |
1 |
|
T31 |
9 |
|
T43 |
1 |
| others[2] |
230 |
1 |
|
T31 |
9 |
|
T43 |
1 |
|
T237 |
1 |
| others[3] |
409 |
1 |
|
T20 |
1 |
|
T31 |
21 |
|
T39 |
1 |
| false |
124 |
1 |
|
T31 |
8 |
|
T43 |
1 |
|
T207 |
1 |
| true |
5689 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1201 |
1 |
|
T19 |
1 |
|
T31 |
21 |
|
T49 |
11 |
| others[1] |
1282 |
1 |
|
T31 |
25 |
|
T49 |
6 |
|
T43 |
2 |
| others[2] |
1258 |
1 |
|
T31 |
20 |
|
T49 |
16 |
|
T43 |
3 |
| others[3] |
2037 |
1 |
|
T1 |
1 |
|
T31 |
25 |
|
T49 |
14 |
| false |
634 |
1 |
|
T5 |
1 |
|
T31 |
10 |
|
T49 |
9 |
| true |
472 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1252 |
1 |
|
T31 |
20 |
|
T49 |
5 |
|
T124 |
1 |
| others[1] |
1234 |
1 |
|
T19 |
1 |
|
T31 |
19 |
|
T49 |
12 |
| others[2] |
1298 |
1 |
|
T31 |
16 |
|
T49 |
10 |
|
T43 |
3 |
| others[3] |
2050 |
1 |
|
T1 |
1 |
|
T31 |
34 |
|
T49 |
24 |
| false |
606 |
1 |
|
T31 |
12 |
|
T49 |
5 |
|
T43 |
4 |
| true |
444 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
103 |
1 |
|
T31 |
4 |
|
T43 |
2 |
|
T62 |
1 |
| others[1] |
116 |
1 |
|
T6 |
1 |
|
T20 |
1 |
|
T31 |
2 |
| others[2] |
110 |
1 |
|
T31 |
6 |
|
T43 |
3 |
|
T224 |
1 |
| others[3] |
175 |
1 |
|
T31 |
6 |
|
T21 |
1 |
|
T43 |
2 |
| false |
47 |
1 |
|
T31 |
2 |
|
T43 |
1 |
|
T130 |
2 |
| true |
6333 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
261 |
1 |
|
T31 |
13 |
|
T43 |
1 |
|
T62 |
1 |
| others[1] |
243 |
1 |
|
T5 |
1 |
|
T26 |
1 |
|
T23 |
1 |
| others[2] |
241 |
1 |
|
T16 |
1 |
|
T31 |
10 |
|
T28 |
1 |
| others[3] |
398 |
1 |
|
T20 |
1 |
|
T31 |
14 |
|
T46 |
1 |
| false |
118 |
1 |
|
T38 |
1 |
|
T31 |
7 |
|
T130 |
5 |
| true |
5623 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1050 |
1 |
|
T5 |
1 |
|
T23 |
1 |
|
T31 |
18 |
| others[1] |
1042 |
1 |
|
T4 |
1 |
|
T31 |
11 |
|
T49 |
9 |
| others[2] |
1080 |
1 |
|
T10 |
1 |
|
T31 |
17 |
|
T49 |
8 |
| others[3] |
1804 |
1 |
|
T1 |
1 |
|
T16 |
1 |
|
T19 |
1 |
| false |
524 |
1 |
|
T31 |
18 |
|
T49 |
7 |
|
T56 |
1 |
| true |
1384 |
1 |
|
T6 |
1 |
|
T26 |
1 |
|
T21 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
273 |
1 |
|
T31 |
12 |
|
T43 |
2 |
|
T62 |
1 |
| others[1] |
247 |
1 |
|
T26 |
1 |
|
T23 |
1 |
|
T31 |
4 |
| others[2] |
212 |
1 |
|
T31 |
9 |
|
T43 |
1 |
|
T123 |
1 |
| others[3] |
391 |
1 |
|
T38 |
1 |
|
T31 |
14 |
|
T21 |
1 |
| false |
129 |
1 |
|
T31 |
4 |
|
T28 |
1 |
|
T130 |
5 |
| true |
5632 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
232 |
1 |
|
T31 |
6 |
|
T43 |
1 |
|
T62 |
1 |
| others[1] |
230 |
1 |
|
T31 |
10 |
|
T124 |
1 |
|
T43 |
2 |
| others[2] |
238 |
1 |
|
T31 |
7 |
|
T43 |
1 |
|
T303 |
1 |
| others[3] |
377 |
1 |
|
T31 |
16 |
|
T43 |
1 |
|
T123 |
1 |
| false |
113 |
1 |
|
T20 |
1 |
|
T38 |
1 |
|
T31 |
7 |
| true |
5694 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |