Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1199 |
1 |
|
T31 |
17 |
|
T49 |
13 |
|
T124 |
1 |
| others[1] |
1193 |
1 |
|
T1 |
1 |
|
T19 |
1 |
|
T31 |
12 |
| others[2] |
1213 |
1 |
|
T31 |
22 |
|
T49 |
11 |
|
T43 |
2 |
| others[3] |
2152 |
1 |
|
T31 |
38 |
|
T49 |
17 |
|
T43 |
4 |
| false |
650 |
1 |
|
T31 |
12 |
|
T49 |
6 |
|
T111 |
1 |
| true |
477 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1234 |
1 |
|
T31 |
16 |
|
T49 |
12 |
|
T43 |
6 |
| others[1] |
1205 |
1 |
|
T19 |
1 |
|
T31 |
23 |
|
T49 |
8 |
| others[2] |
1226 |
1 |
|
T31 |
14 |
|
T49 |
6 |
|
T62 |
1 |
| others[3] |
2089 |
1 |
|
T5 |
1 |
|
T26 |
1 |
|
T31 |
34 |
| false |
683 |
1 |
|
T1 |
1 |
|
T31 |
14 |
|
T49 |
5 |
| true |
447 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
119 |
1 |
|
T31 |
4 |
|
T21 |
1 |
|
T43 |
3 |
| others[1] |
109 |
1 |
|
T31 |
3 |
|
T43 |
3 |
|
T123 |
1 |
| others[2] |
114 |
1 |
|
T31 |
1 |
|
T124 |
1 |
|
T224 |
1 |
| others[3] |
197 |
1 |
|
T31 |
8 |
|
T43 |
3 |
|
T111 |
1 |
| false |
55 |
1 |
|
T31 |
2 |
|
T43 |
2 |
|
T126 |
1 |
| true |
6290 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
253 |
1 |
|
T26 |
1 |
|
T31 |
10 |
|
T123 |
1 |
| others[1] |
232 |
1 |
|
T16 |
1 |
|
T38 |
1 |
|
T31 |
11 |
| others[2] |
228 |
1 |
|
T31 |
6 |
|
T43 |
2 |
|
T302 |
1 |
| others[3] |
426 |
1 |
|
T6 |
1 |
|
T31 |
21 |
|
T37 |
1 |
| false |
151 |
1 |
|
T31 |
6 |
|
T224 |
1 |
|
T237 |
1 |
| true |
5594 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1034 |
1 |
|
T6 |
1 |
|
T19 |
1 |
|
T31 |
24 |
| others[1] |
1074 |
1 |
|
T31 |
13 |
|
T49 |
9 |
|
T43 |
4 |
| others[2] |
1030 |
1 |
|
T31 |
22 |
|
T49 |
13 |
|
T21 |
1 |
| others[3] |
1852 |
1 |
|
T1 |
1 |
|
T5 |
1 |
|
T12 |
1 |
| false |
537 |
1 |
|
T26 |
1 |
|
T31 |
12 |
|
T49 |
5 |
| true |
1357 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T31 |
14 |
|
T43 |
1 |
|
T224 |
1 |
| others[1] |
216 |
1 |
|
T38 |
1 |
|
T31 |
8 |
|
T43 |
1 |
| others[2] |
237 |
1 |
|
T31 |
11 |
|
T37 |
1 |
|
T43 |
2 |
| others[3] |
405 |
1 |
|
T26 |
1 |
|
T31 |
18 |
|
T43 |
4 |
| false |
142 |
1 |
|
T31 |
4 |
|
T43 |
1 |
|
T237 |
1 |
| true |
5655 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T31 |
7 |
|
T122 |
1 |
|
T237 |
1 |
| others[1] |
236 |
1 |
|
T20 |
1 |
|
T31 |
12 |
|
T43 |
2 |
| others[2] |
218 |
1 |
|
T23 |
1 |
|
T31 |
7 |
|
T43 |
2 |
| others[3] |
367 |
1 |
|
T31 |
24 |
|
T21 |
1 |
|
T43 |
1 |
| false |
114 |
1 |
|
T31 |
2 |
|
T46 |
1 |
|
T43 |
1 |
| true |
5739 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1248 |
1 |
|
T1 |
1 |
|
T38 |
1 |
|
T31 |
21 |
| others[1] |
1244 |
1 |
|
T31 |
13 |
|
T49 |
15 |
|
T43 |
2 |
| others[2] |
1231 |
1 |
|
T31 |
19 |
|
T49 |
12 |
|
T43 |
3 |
| others[3] |
2035 |
1 |
|
T19 |
1 |
|
T31 |
32 |
|
T49 |
23 |
| false |
672 |
1 |
|
T31 |
16 |
|
T49 |
3 |
|
T44 |
1 |
| true |
454 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1257 |
1 |
|
T31 |
18 |
|
T49 |
9 |
|
T43 |
7 |
| others[1] |
1298 |
1 |
|
T1 |
1 |
|
T31 |
24 |
|
T49 |
13 |
| others[2] |
1169 |
1 |
|
T19 |
1 |
|
T31 |
14 |
|
T49 |
7 |
| others[3] |
2082 |
1 |
|
T26 |
1 |
|
T31 |
37 |
|
T49 |
22 |
| false |
625 |
1 |
|
T31 |
8 |
|
T49 |
5 |
|
T43 |
1 |
| true |
453 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
107 |
1 |
|
T6 |
1 |
|
T31 |
6 |
|
T124 |
1 |
| others[1] |
110 |
1 |
|
T31 |
3 |
|
T43 |
5 |
|
T237 |
1 |
| others[2] |
120 |
1 |
|
T31 |
2 |
|
T43 |
1 |
|
T62 |
1 |
| others[3] |
164 |
1 |
|
T31 |
5 |
|
T224 |
1 |
|
T130 |
6 |
| false |
67 |
1 |
|
T31 |
4 |
|
T43 |
1 |
|
T126 |
1 |
| true |
6316 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
240 |
1 |
|
T31 |
8 |
|
T43 |
1 |
|
T111 |
1 |
| others[1] |
234 |
1 |
|
T31 |
10 |
|
T27 |
1 |
|
T130 |
11 |
| others[2] |
239 |
1 |
|
T31 |
10 |
|
T43 |
1 |
|
T237 |
1 |
| others[3] |
400 |
1 |
|
T16 |
1 |
|
T20 |
1 |
|
T31 |
12 |
| false |
123 |
1 |
|
T31 |
5 |
|
T126 |
1 |
|
T224 |
1 |
| true |
5648 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1068 |
1 |
|
T10 |
1 |
|
T16 |
1 |
|
T19 |
1 |
| others[1] |
1091 |
1 |
|
T4 |
1 |
|
T20 |
1 |
|
T31 |
26 |
| others[2] |
1029 |
1 |
|
T26 |
1 |
|
T31 |
18 |
|
T49 |
18 |
| others[3] |
1762 |
1 |
|
T1 |
1 |
|
T23 |
1 |
|
T38 |
1 |
| false |
511 |
1 |
|
T5 |
1 |
|
T31 |
8 |
|
T49 |
4 |
| true |
1423 |
1 |
|
T6 |
1 |
|
T12 |
1 |
|
T56 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
227 |
1 |
|
T23 |
1 |
|
T38 |
1 |
|
T31 |
12 |
| others[1] |
225 |
1 |
|
T16 |
1 |
|
T31 |
10 |
|
T21 |
1 |
| others[2] |
215 |
1 |
|
T26 |
1 |
|
T31 |
9 |
|
T43 |
1 |
| others[3] |
423 |
1 |
|
T20 |
1 |
|
T31 |
18 |
|
T43 |
2 |
| false |
125 |
1 |
|
T6 |
1 |
|
T31 |
6 |
|
T130 |
5 |
| true |
5669 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
219 |
1 |
|
T16 |
1 |
|
T31 |
12 |
|
T43 |
2 |
| others[1] |
243 |
1 |
|
T31 |
6 |
|
T39 |
1 |
|
T207 |
1 |
| others[2] |
217 |
1 |
|
T38 |
1 |
|
T31 |
9 |
|
T43 |
2 |
| others[3] |
363 |
1 |
|
T20 |
1 |
|
T31 |
18 |
|
T43 |
1 |
| false |
124 |
1 |
|
T31 |
5 |
|
T43 |
1 |
|
T126 |
1 |
| true |
5718 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1247 |
1 |
|
T31 |
22 |
|
T49 |
10 |
|
T43 |
1 |
| others[1] |
1231 |
1 |
|
T19 |
1 |
|
T31 |
18 |
|
T49 |
10 |
| others[2] |
1249 |
1 |
|
T12 |
1 |
|
T31 |
18 |
|
T49 |
7 |
| others[3] |
2030 |
1 |
|
T1 |
1 |
|
T31 |
37 |
|
T49 |
26 |
| false |
654 |
1 |
|
T31 |
6 |
|
T49 |
3 |
|
T71 |
11 |
| true |
473 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1228 |
1 |
|
T31 |
20 |
|
T49 |
7 |
|
T43 |
2 |
| others[1] |
1285 |
1 |
|
T19 |
1 |
|
T31 |
17 |
|
T49 |
14 |
| others[2] |
1205 |
1 |
|
T31 |
17 |
|
T49 |
10 |
|
T43 |
2 |
| others[3] |
2090 |
1 |
|
T1 |
1 |
|
T31 |
37 |
|
T49 |
21 |
| false |
623 |
1 |
|
T31 |
10 |
|
T49 |
4 |
|
T43 |
1 |
| true |
453 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
122 |
1 |
|
T31 |
7 |
|
T43 |
2 |
|
T303 |
1 |
| others[1] |
110 |
1 |
|
T31 |
3 |
|
T43 |
1 |
|
T224 |
1 |
| others[2] |
115 |
1 |
|
T31 |
4 |
|
T124 |
1 |
|
T43 |
4 |
| others[3] |
198 |
1 |
|
T16 |
1 |
|
T31 |
8 |
|
T43 |
4 |
| false |
54 |
1 |
|
T31 |
2 |
|
T130 |
3 |
|
T110 |
1 |
| true |
6285 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
208 |
1 |
|
T31 |
5 |
|
T46 |
1 |
|
T123 |
1 |
| others[1] |
247 |
1 |
|
T31 |
15 |
|
T43 |
1 |
|
T122 |
1 |
| others[2] |
250 |
1 |
|
T31 |
12 |
|
T37 |
1 |
|
T43 |
2 |
| others[3] |
400 |
1 |
|
T16 |
1 |
|
T26 |
1 |
|
T31 |
9 |
| false |
122 |
1 |
|
T31 |
3 |
|
T130 |
9 |
|
T210 |
1 |
| true |
5657 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1085 |
1 |
|
T1 |
1 |
|
T31 |
24 |
|
T49 |
8 |
| others[1] |
1057 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T19 |
1 |
| others[2] |
1040 |
1 |
|
T31 |
18 |
|
T49 |
11 |
|
T44 |
2 |
| others[3] |
1738 |
1 |
|
T16 |
1 |
|
T6 |
1 |
|
T31 |
33 |
| false |
557 |
1 |
|
T31 |
10 |
|
T49 |
5 |
|
T43 |
2 |
| true |
1407 |
1 |
|
T5 |
1 |
|
T26 |
1 |
|
T23 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
223 |
1 |
|
T23 |
1 |
|
T20 |
1 |
|
T31 |
12 |
| others[1] |
237 |
1 |
|
T38 |
1 |
|
T31 |
8 |
|
T46 |
1 |
| others[2] |
259 |
1 |
|
T31 |
9 |
|
T24 |
1 |
|
T28 |
1 |
| others[3] |
388 |
1 |
|
T31 |
18 |
|
T43 |
1 |
|
T62 |
1 |
| false |
118 |
1 |
|
T31 |
5 |
|
T43 |
3 |
|
T130 |
4 |
| true |
5659 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
220 |
1 |
|
T20 |
1 |
|
T31 |
15 |
|
T43 |
1 |
| others[1] |
217 |
1 |
|
T23 |
1 |
|
T31 |
12 |
|
T43 |
1 |
| others[2] |
228 |
1 |
|
T38 |
1 |
|
T31 |
17 |
|
T43 |
1 |
| others[3] |
396 |
1 |
|
T16 |
1 |
|
T31 |
16 |
|
T43 |
1 |
| false |
112 |
1 |
|
T31 |
1 |
|
T43 |
2 |
|
T130 |
6 |
| true |
5711 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1224 |
1 |
|
T1 |
1 |
|
T31 |
23 |
|
T49 |
15 |
| others[1] |
1272 |
1 |
|
T19 |
1 |
|
T12 |
1 |
|
T31 |
14 |
| others[2] |
1222 |
1 |
|
T31 |
21 |
|
T49 |
7 |
|
T43 |
2 |
| others[3] |
2085 |
1 |
|
T31 |
35 |
|
T49 |
15 |
|
T43 |
4 |
| false |
612 |
1 |
|
T31 |
8 |
|
T49 |
9 |
|
T43 |
1 |
| true |
469 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1213 |
1 |
|
T31 |
18 |
|
T49 |
8 |
|
T43 |
4 |
| others[1] |
1284 |
1 |
|
T31 |
26 |
|
T49 |
11 |
|
T43 |
1 |
| others[2] |
1265 |
1 |
|
T31 |
20 |
|
T49 |
12 |
|
T43 |
1 |
| others[3] |
2052 |
1 |
|
T1 |
1 |
|
T31 |
26 |
|
T49 |
18 |
| false |
611 |
1 |
|
T19 |
1 |
|
T31 |
11 |
|
T49 |
7 |
| true |
459 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
87 |
1 |
|
T31 |
4 |
|
T237 |
1 |
|
T130 |
4 |
| others[1] |
116 |
1 |
|
T31 |
1 |
|
T43 |
2 |
|
T62 |
1 |
| others[2] |
109 |
1 |
|
T31 |
4 |
|
T43 |
4 |
|
T39 |
1 |
| others[3] |
176 |
1 |
|
T31 |
5 |
|
T43 |
2 |
|
T224 |
1 |
| false |
52 |
1 |
|
T31 |
1 |
|
T43 |
3 |
|
T130 |
2 |
| true |
6344 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
246 |
1 |
|
T31 |
9 |
|
T43 |
1 |
|
T39 |
1 |
| others[1] |
242 |
1 |
|
T38 |
1 |
|
T31 |
10 |
|
T62 |
1 |
| others[2] |
258 |
1 |
|
T31 |
9 |
|
T43 |
3 |
|
T27 |
1 |
| others[3] |
421 |
1 |
|
T23 |
1 |
|
T31 |
14 |
|
T303 |
1 |
| false |
137 |
1 |
|
T31 |
5 |
|
T122 |
1 |
|
T237 |
1 |
| true |
5580 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
988 |
1 |
|
T31 |
23 |
|
T49 |
12 |
|
T43 |
4 |
| others[1] |
1039 |
1 |
|
T31 |
16 |
|
T49 |
10 |
|
T37 |
1 |
| others[2] |
1029 |
1 |
|
T1 |
1 |
|
T5 |
1 |
|
T19 |
1 |
| others[3] |
1864 |
1 |
|
T31 |
39 |
|
T49 |
16 |
|
T43 |
4 |
| false |
560 |
1 |
|
T31 |
8 |
|
T49 |
8 |
|
T56 |
1 |
| true |
1404 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
211 |
1 |
|
T38 |
1 |
|
T31 |
11 |
|
T224 |
1 |
| others[1] |
228 |
1 |
|
T31 |
13 |
|
T43 |
2 |
|
T130 |
8 |
| others[2] |
253 |
1 |
|
T20 |
1 |
|
T31 |
16 |
|
T43 |
1 |
| others[3] |
401 |
1 |
|
T16 |
1 |
|
T26 |
1 |
|
T31 |
14 |
| false |
107 |
1 |
|
T31 |
2 |
|
T224 |
1 |
|
T130 |
7 |
| true |
5684 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
202 |
1 |
|
T38 |
1 |
|
T31 |
7 |
|
T43 |
1 |
| others[1] |
239 |
1 |
|
T6 |
1 |
|
T31 |
11 |
|
T130 |
13 |
| others[2] |
224 |
1 |
|
T31 |
7 |
|
T43 |
1 |
|
T130 |
8 |
| others[3] |
410 |
1 |
|
T16 |
1 |
|
T31 |
14 |
|
T21 |
1 |
| false |
121 |
1 |
|
T31 |
5 |
|
T43 |
2 |
|
T126 |
1 |
| true |
5688 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1257 |
1 |
|
T31 |
25 |
|
T49 |
12 |
|
T43 |
2 |
| others[1] |
1235 |
1 |
|
T26 |
1 |
|
T31 |
22 |
|
T49 |
9 |
| others[2] |
1185 |
1 |
|
T19 |
1 |
|
T31 |
15 |
|
T49 |
11 |
| others[3] |
2084 |
1 |
|
T1 |
1 |
|
T31 |
30 |
|
T49 |
19 |
| false |
642 |
1 |
|
T31 |
9 |
|
T49 |
5 |
|
T43 |
2 |
| true |
481 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1252 |
1 |
|
T1 |
1 |
|
T31 |
21 |
|
T49 |
10 |
| others[1] |
1223 |
1 |
|
T19 |
1 |
|
T31 |
19 |
|
T49 |
12 |
| others[2] |
1280 |
1 |
|
T31 |
26 |
|
T49 |
9 |
|
T43 |
3 |
| others[3] |
1982 |
1 |
|
T4 |
1 |
|
T31 |
22 |
|
T49 |
17 |
| false |
691 |
1 |
|
T31 |
13 |
|
T49 |
8 |
|
T34 |
1 |
| true |
456 |
1 |
|
T10 |
1 |
|
T16 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
117 |
1 |
|
T31 |
1 |
|
T43 |
5 |
|
T224 |
2 |
| others[1] |
109 |
1 |
|
T31 |
5 |
|
T130 |
3 |
|
T319 |
1 |
| others[2] |
107 |
1 |
|
T31 |
2 |
|
T43 |
3 |
|
T130 |
4 |
| others[3] |
185 |
1 |
|
T31 |
3 |
|
T43 |
1 |
|
T237 |
1 |
| false |
61 |
1 |
|
T31 |
2 |
|
T43 |
2 |
|
T130 |
3 |
| true |
6305 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |