Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.dis.val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.dis.val
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
236 |
1 |
|
T31 |
11 |
|
T39 |
1 |
|
T111 |
1 |
| others[1] |
225 |
1 |
|
T31 |
12 |
|
T63 |
1 |
|
T130 |
12 |
| others[2] |
230 |
1 |
|
T16 |
1 |
|
T20 |
1 |
|
T31 |
9 |
| others[3] |
377 |
1 |
|
T23 |
1 |
|
T31 |
14 |
|
T124 |
1 |
| false |
135 |
1 |
|
T31 |
1 |
|
T126 |
1 |
|
T302 |
1 |
| true |
5681 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1246 |
1 |
|
T31 |
22 |
|
T49 |
10 |
|
T43 |
2 |
| others[1] |
1189 |
1 |
|
T5 |
1 |
|
T31 |
22 |
|
T49 |
16 |
| others[2] |
1249 |
1 |
|
T31 |
13 |
|
T49 |
8 |
|
T43 |
1 |
| others[3] |
2079 |
1 |
|
T1 |
1 |
|
T19 |
1 |
|
T31 |
34 |
| false |
663 |
1 |
|
T31 |
10 |
|
T49 |
7 |
|
T43 |
2 |
| true |
458 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1238 |
1 |
|
T19 |
1 |
|
T31 |
26 |
|
T49 |
10 |
| others[1] |
1245 |
1 |
|
T1 |
1 |
|
T31 |
21 |
|
T49 |
9 |
| others[2] |
1232 |
1 |
|
T31 |
12 |
|
T49 |
10 |
|
T43 |
3 |
| others[3] |
2071 |
1 |
|
T31 |
27 |
|
T49 |
21 |
|
T43 |
4 |
| false |
648 |
1 |
|
T31 |
15 |
|
T49 |
6 |
|
T43 |
1 |
| true |
450 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
122 |
1 |
|
T31 |
7 |
|
T43 |
4 |
|
T130 |
3 |
| others[1] |
99 |
1 |
|
T31 |
4 |
|
T43 |
2 |
|
T130 |
3 |
| others[2] |
127 |
1 |
|
T31 |
5 |
|
T43 |
1 |
|
T62 |
1 |
| others[3] |
169 |
1 |
|
T31 |
7 |
|
T43 |
4 |
|
T224 |
2 |
| false |
59 |
1 |
|
T130 |
1 |
|
T372 |
1 |
|
T110 |
1 |
| true |
6308 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T38 |
1 |
|
T31 |
4 |
|
T46 |
1 |
| others[1] |
241 |
1 |
|
T26 |
1 |
|
T31 |
11 |
|
T124 |
1 |
| others[2] |
240 |
1 |
|
T31 |
10 |
|
T43 |
1 |
|
T62 |
1 |
| others[3] |
414 |
1 |
|
T5 |
1 |
|
T6 |
1 |
|
T31 |
13 |
| false |
136 |
1 |
|
T20 |
1 |
|
T31 |
9 |
|
T43 |
1 |
| true |
5636 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1012 |
1 |
|
T4 |
1 |
|
T31 |
21 |
|
T49 |
10 |
| others[1] |
1041 |
1 |
|
T26 |
1 |
|
T31 |
21 |
|
T49 |
10 |
| others[2] |
1006 |
1 |
|
T19 |
1 |
|
T38 |
1 |
|
T31 |
20 |
| others[3] |
1865 |
1 |
|
T1 |
1 |
|
T5 |
1 |
|
T23 |
1 |
| false |
552 |
1 |
|
T20 |
1 |
|
T31 |
11 |
|
T49 |
5 |
| true |
1408 |
1 |
|
T10 |
1 |
|
T16 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
255 |
1 |
|
T6 |
1 |
|
T31 |
6 |
|
T43 |
1 |
| others[1] |
235 |
1 |
|
T31 |
5 |
|
T24 |
1 |
|
T130 |
12 |
| others[2] |
228 |
1 |
|
T16 |
1 |
|
T26 |
1 |
|
T31 |
11 |
| others[3] |
372 |
1 |
|
T20 |
1 |
|
T31 |
21 |
|
T46 |
1 |
| false |
104 |
1 |
|
T31 |
4 |
|
T21 |
1 |
|
T130 |
1 |
| true |
5690 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
241 |
1 |
|
T31 |
17 |
|
T43 |
1 |
|
T224 |
1 |
| others[1] |
232 |
1 |
|
T31 |
6 |
|
T126 |
1 |
|
T224 |
1 |
| others[2] |
209 |
1 |
|
T16 |
1 |
|
T31 |
9 |
|
T237 |
1 |
| others[3] |
347 |
1 |
|
T31 |
8 |
|
T43 |
1 |
|
T302 |
1 |
| false |
128 |
1 |
|
T31 |
8 |
|
T21 |
1 |
|
T43 |
1 |
| true |
5727 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1243 |
1 |
|
T31 |
18 |
|
T49 |
8 |
|
T43 |
2 |
| others[1] |
1209 |
1 |
|
T31 |
22 |
|
T49 |
8 |
|
T44 |
2 |
| others[2] |
1263 |
1 |
|
T1 |
1 |
|
T31 |
22 |
|
T49 |
13 |
| others[3] |
2039 |
1 |
|
T19 |
1 |
|
T31 |
27 |
|
T49 |
24 |
| false |
660 |
1 |
|
T31 |
12 |
|
T49 |
3 |
|
T161 |
1 |
| true |
470 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1259 |
1 |
|
T31 |
14 |
|
T49 |
13 |
|
T43 |
5 |
| others[1] |
1194 |
1 |
|
T12 |
1 |
|
T31 |
23 |
|
T49 |
9 |
| others[2] |
1238 |
1 |
|
T19 |
1 |
|
T31 |
19 |
|
T49 |
17 |
| others[3] |
2063 |
1 |
|
T1 |
1 |
|
T5 |
1 |
|
T31 |
36 |
| false |
682 |
1 |
|
T31 |
9 |
|
T49 |
6 |
|
T43 |
2 |
| true |
448 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
121 |
1 |
|
T31 |
3 |
|
T43 |
2 |
|
T123 |
1 |
| others[1] |
103 |
1 |
|
T31 |
3 |
|
T43 |
2 |
|
T130 |
4 |
| others[2] |
110 |
1 |
|
T23 |
1 |
|
T31 |
4 |
|
T43 |
4 |
| others[3] |
184 |
1 |
|
T31 |
9 |
|
T43 |
1 |
|
T302 |
1 |
| false |
53 |
1 |
|
T31 |
3 |
|
T43 |
2 |
|
T130 |
3 |
| true |
6313 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
240 |
1 |
|
T31 |
10 |
|
T46 |
1 |
|
T43 |
1 |
| others[1] |
250 |
1 |
|
T23 |
1 |
|
T20 |
1 |
|
T31 |
8 |
| others[2] |
248 |
1 |
|
T31 |
8 |
|
T21 |
1 |
|
T43 |
1 |
| others[3] |
393 |
1 |
|
T6 |
1 |
|
T38 |
1 |
|
T31 |
11 |
| false |
136 |
1 |
|
T31 |
5 |
|
T218 |
1 |
|
T130 |
5 |
| true |
5617 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1090 |
1 |
|
T1 |
1 |
|
T19 |
1 |
|
T31 |
15 |
| others[1] |
1037 |
1 |
|
T5 |
1 |
|
T31 |
24 |
|
T49 |
9 |
| others[2] |
1091 |
1 |
|
T31 |
12 |
|
T49 |
10 |
|
T43 |
6 |
| others[3] |
1706 |
1 |
|
T26 |
1 |
|
T12 |
1 |
|
T31 |
34 |
| false |
561 |
1 |
|
T31 |
16 |
|
T49 |
4 |
|
T161 |
1 |
| true |
1399 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
253 |
1 |
|
T26 |
1 |
|
T20 |
1 |
|
T31 |
9 |
| others[1] |
223 |
1 |
|
T31 |
7 |
|
T39 |
1 |
|
T130 |
7 |
| others[2] |
234 |
1 |
|
T38 |
1 |
|
T31 |
13 |
|
T46 |
1 |
| others[3] |
402 |
1 |
|
T23 |
1 |
|
T31 |
19 |
|
T43 |
1 |
| false |
129 |
1 |
|
T31 |
5 |
|
T122 |
1 |
|
T130 |
7 |
| true |
5643 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T31 |
12 |
|
T43 |
1 |
|
T130 |
10 |
| others[1] |
210 |
1 |
|
T31 |
12 |
|
T43 |
3 |
|
T62 |
1 |
| others[2] |
239 |
1 |
|
T31 |
10 |
|
T46 |
1 |
|
T122 |
1 |
| others[3] |
375 |
1 |
|
T16 |
1 |
|
T6 |
1 |
|
T20 |
1 |
| false |
120 |
1 |
|
T31 |
2 |
|
T130 |
6 |
|
T375 |
1 |
| true |
5730 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1220 |
1 |
|
T31 |
15 |
|
T49 |
8 |
|
T43 |
1 |
| others[1] |
1253 |
1 |
|
T1 |
1 |
|
T31 |
15 |
|
T49 |
9 |
| others[2] |
1208 |
1 |
|
T19 |
1 |
|
T31 |
15 |
|
T49 |
10 |
| others[3] |
2087 |
1 |
|
T4 |
1 |
|
T31 |
40 |
|
T49 |
26 |
| false |
639 |
1 |
|
T31 |
16 |
|
T49 |
3 |
|
T43 |
1 |
| true |
477 |
1 |
|
T10 |
1 |
|
T16 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1178 |
1 |
|
T19 |
1 |
|
T31 |
21 |
|
T49 |
12 |
| others[1] |
1182 |
1 |
|
T31 |
25 |
|
T49 |
10 |
|
T71 |
12 |
| others[2] |
1290 |
1 |
|
T31 |
19 |
|
T49 |
12 |
|
T43 |
6 |
| others[3] |
2118 |
1 |
|
T1 |
1 |
|
T31 |
28 |
|
T49 |
21 |
| false |
658 |
1 |
|
T31 |
8 |
|
T49 |
1 |
|
T161 |
1 |
| true |
458 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
110 |
1 |
|
T43 |
1 |
|
T130 |
3 |
|
T128 |
1 |
| others[1] |
102 |
1 |
|
T31 |
5 |
|
T43 |
3 |
|
T62 |
1 |
| others[2] |
98 |
1 |
|
T31 |
6 |
|
T43 |
5 |
|
T224 |
1 |
| others[3] |
190 |
1 |
|
T31 |
2 |
|
T124 |
1 |
|
T43 |
1 |
| false |
52 |
1 |
|
T31 |
2 |
|
T43 |
1 |
|
T130 |
2 |
| true |
6332 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
238 |
1 |
|
T31 |
9 |
|
T43 |
1 |
|
T123 |
1 |
| others[1] |
244 |
1 |
|
T31 |
12 |
|
T43 |
2 |
|
T111 |
1 |
| others[2] |
237 |
1 |
|
T31 |
7 |
|
T43 |
1 |
|
T302 |
1 |
| others[3] |
416 |
1 |
|
T31 |
16 |
|
T21 |
1 |
|
T43 |
5 |
| false |
132 |
1 |
|
T31 |
6 |
|
T224 |
1 |
|
T130 |
7 |
| true |
5617 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1062 |
1 |
|
T20 |
1 |
|
T31 |
21 |
|
T49 |
13 |
| others[1] |
1060 |
1 |
|
T19 |
1 |
|
T31 |
19 |
|
T49 |
2 |
| others[2] |
1047 |
1 |
|
T16 |
1 |
|
T31 |
16 |
|
T49 |
13 |
| others[3] |
1718 |
1 |
|
T1 |
1 |
|
T26 |
1 |
|
T12 |
1 |
| false |
551 |
1 |
|
T31 |
13 |
|
T49 |
8 |
|
T224 |
1 |
| true |
1446 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
257 |
1 |
|
T31 |
15 |
|
T124 |
1 |
|
T43 |
3 |
| others[1] |
226 |
1 |
|
T23 |
1 |
|
T31 |
9 |
|
T37 |
1 |
| others[2] |
234 |
1 |
|
T6 |
1 |
|
T26 |
1 |
|
T31 |
3 |
| others[3] |
385 |
1 |
|
T16 |
1 |
|
T31 |
18 |
|
T219 |
1 |
| false |
134 |
1 |
|
T31 |
10 |
|
T43 |
1 |
|
T28 |
1 |
| true |
5648 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T31 |
5 |
|
T122 |
1 |
|
T302 |
1 |
| others[1] |
226 |
1 |
|
T16 |
1 |
|
T31 |
8 |
|
T130 |
12 |
| others[2] |
253 |
1 |
|
T23 |
1 |
|
T31 |
13 |
|
T43 |
1 |
| others[3] |
389 |
1 |
|
T6 |
1 |
|
T38 |
1 |
|
T31 |
24 |
| false |
121 |
1 |
|
T31 |
4 |
|
T111 |
1 |
|
T130 |
5 |
| true |
5678 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1207 |
1 |
|
T31 |
22 |
|
T49 |
13 |
|
T43 |
3 |
| others[1] |
1225 |
1 |
|
T31 |
17 |
|
T49 |
13 |
|
T21 |
1 |
| others[2] |
1285 |
1 |
|
T31 |
29 |
|
T49 |
6 |
|
T43 |
3 |
| others[3] |
2064 |
1 |
|
T1 |
1 |
|
T31 |
25 |
|
T49 |
15 |
| false |
653 |
1 |
|
T19 |
1 |
|
T31 |
8 |
|
T49 |
9 |
| true |
450 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1285 |
1 |
|
T31 |
26 |
|
T49 |
13 |
|
T43 |
2 |
| others[1] |
1215 |
1 |
|
T1 |
1 |
|
T31 |
15 |
|
T49 |
13 |
| others[2] |
1252 |
1 |
|
T31 |
16 |
|
T49 |
12 |
|
T43 |
3 |
| others[3] |
2066 |
1 |
|
T31 |
32 |
|
T49 |
13 |
|
T43 |
5 |
| false |
617 |
1 |
|
T19 |
1 |
|
T31 |
12 |
|
T49 |
5 |
| true |
449 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
121 |
1 |
|
T16 |
1 |
|
T31 |
6 |
|
T43 |
1 |
| others[1] |
110 |
1 |
|
T31 |
7 |
|
T43 |
1 |
|
T224 |
1 |
| others[2] |
120 |
1 |
|
T31 |
1 |
|
T43 |
5 |
|
T130 |
8 |
| others[3] |
194 |
1 |
|
T31 |
4 |
|
T43 |
4 |
|
T62 |
1 |
| false |
51 |
1 |
|
T130 |
1 |
|
T112 |
1 |
|
T377 |
1 |
| true |
6288 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T23 |
1 |
|
T31 |
9 |
|
T124 |
1 |
| others[1] |
242 |
1 |
|
T26 |
1 |
|
T31 |
19 |
|
T21 |
1 |
| others[2] |
238 |
1 |
|
T20 |
1 |
|
T31 |
8 |
|
T43 |
1 |
| others[3] |
424 |
1 |
|
T16 |
1 |
|
T6 |
1 |
|
T31 |
17 |
| false |
129 |
1 |
|
T31 |
1 |
|
T130 |
10 |
|
T305 |
1 |
| true |
5627 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1085 |
1 |
|
T38 |
1 |
|
T31 |
23 |
|
T49 |
14 |
| others[1] |
1070 |
1 |
|
T20 |
1 |
|
T31 |
18 |
|
T49 |
11 |
| others[2] |
1021 |
1 |
|
T19 |
1 |
|
T26 |
1 |
|
T31 |
26 |
| others[3] |
1784 |
1 |
|
T1 |
1 |
|
T5 |
1 |
|
T12 |
1 |
| false |
569 |
1 |
|
T31 |
7 |
|
T49 |
2 |
|
T43 |
3 |
| true |
1355 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T31 |
10 |
|
T43 |
1 |
|
T28 |
1 |
| others[1] |
258 |
1 |
|
T31 |
8 |
|
T21 |
1 |
|
T124 |
1 |
| others[2] |
229 |
1 |
|
T6 |
1 |
|
T31 |
9 |
|
T37 |
1 |
| others[3] |
358 |
1 |
|
T20 |
1 |
|
T38 |
1 |
|
T31 |
17 |
| false |
122 |
1 |
|
T31 |
7 |
|
T43 |
1 |
|
T130 |
10 |
| true |
5688 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
231 |
1 |
|
T31 |
6 |
|
T43 |
4 |
|
T237 |
1 |
| others[1] |
241 |
1 |
|
T31 |
10 |
|
T224 |
1 |
|
T302 |
1 |
| others[2] |
216 |
1 |
|
T31 |
12 |
|
T43 |
1 |
|
T130 |
6 |
| others[3] |
381 |
1 |
|
T31 |
14 |
|
T43 |
1 |
|
T62 |
1 |
| false |
127 |
1 |
|
T20 |
1 |
|
T31 |
5 |
|
T207 |
1 |
| true |
5688 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1242 |
1 |
|
T31 |
20 |
|
T49 |
11 |
|
T43 |
2 |
| others[1] |
1229 |
1 |
|
T1 |
1 |
|
T31 |
14 |
|
T49 |
8 |
| others[2] |
1222 |
1 |
|
T31 |
23 |
|
T49 |
12 |
|
T43 |
2 |
| others[3] |
2068 |
1 |
|
T19 |
1 |
|
T31 |
32 |
|
T49 |
18 |
| false |
639 |
1 |
|
T31 |
12 |
|
T49 |
7 |
|
T43 |
2 |
| true |
484 |
1 |
|
T10 |
1 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8 |
1 |
|
T159 |
1 |
|
T160 |
1 |
|
T378 |
1 |
| others[1] |
7 |
1 |
|
T102 |
1 |
|
T181 |
1 |
|
T379 |
1 |
| others[2] |
7 |
1 |
|
T175 |
1 |
|
T380 |
1 |
|
T381 |
1 |
| others[3] |
16 |
1 |
|
T47 |
1 |
|
T188 |
1 |
|
T67 |
1 |
| false |
5 |
1 |
|
T56 |
1 |
|
T382 |
1 |
|
T383 |
1 |
| true |
47 |
1 |
|
T13 |
1 |
|
T146 |
1 |
|
T189 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |