| T1072 |
/workspace/coverage/default/49.flash_ctrl_alert_test.1076269382 |
|
|
Jul 22 05:35:06 PM PDT 24 |
Jul 22 05:35:20 PM PDT 24 |
60831600 ps |
| T1073 |
/workspace/coverage/default/54.flash_ctrl_otp_reset.2088114636 |
|
|
Jul 22 05:35:05 PM PDT 24 |
Jul 22 05:37:19 PM PDT 24 |
40418100 ps |
| T1074 |
/workspace/coverage/default/10.flash_ctrl_hw_read_seed_err.43635546 |
|
|
Jul 22 05:30:09 PM PDT 24 |
Jul 22 05:30:23 PM PDT 24 |
14974300 ps |
| T1075 |
/workspace/coverage/default/10.flash_ctrl_rw.2955508093 |
|
|
Jul 22 05:30:01 PM PDT 24 |
Jul 22 05:40:02 PM PDT 24 |
7291663800 ps |
| T1076 |
/workspace/coverage/default/9.flash_ctrl_intr_rd_slow_flash.4119579737 |
|
|
Jul 22 05:29:47 PM PDT 24 |
Jul 22 05:35:06 PM PDT 24 |
66110689900 ps |
| T1077 |
/workspace/coverage/default/2.flash_ctrl_host_addr_infection.820607147 |
|
|
Jul 22 05:28:24 PM PDT 24 |
Jul 22 05:28:55 PM PDT 24 |
27573100 ps |
| T1078 |
/workspace/coverage/default/44.flash_ctrl_disable.3817702092 |
|
|
Jul 22 05:34:49 PM PDT 24 |
Jul 22 05:35:12 PM PDT 24 |
25528100 ps |
| T1079 |
/workspace/coverage/default/4.flash_ctrl_lcmgr_intg.2589777870 |
|
|
Jul 22 05:27:59 PM PDT 24 |
Jul 22 05:28:12 PM PDT 24 |
84297800 ps |
| T1080 |
/workspace/coverage/default/3.flash_ctrl_otp_reset.4139621782 |
|
|
Jul 22 05:27:00 PM PDT 24 |
Jul 22 05:29:12 PM PDT 24 |
73049100 ps |
| T64 |
/workspace/coverage/default/3.flash_ctrl_phy_ack_consistency.3421918125 |
|
|
Jul 22 05:27:26 PM PDT 24 |
Jul 22 05:27:41 PM PDT 24 |
25440000 ps |
| T59 |
/workspace/coverage/default/2.flash_ctrl_sec_cm.2745919088 |
|
|
Jul 22 05:26:45 PM PDT 24 |
Jul 22 06:46:39 PM PDT 24 |
1151568600 ps |
| T1081 |
/workspace/coverage/default/18.flash_ctrl_rw.440709430 |
|
|
Jul 22 05:32:59 PM PDT 24 |
Jul 22 05:43:31 PM PDT 24 |
23662236100 ps |
| T1082 |
/workspace/coverage/default/1.flash_ctrl_read_word_sweep_serr.3855669690 |
|
|
Jul 22 05:26:19 PM PDT 24 |
Jul 22 05:26:41 PM PDT 24 |
24994900 ps |
| T1083 |
/workspace/coverage/default/0.flash_ctrl_intr_wr_slow_flash.4154950834 |
|
|
Jul 22 05:26:08 PM PDT 24 |
Jul 22 05:30:37 PM PDT 24 |
108237265500 ps |
| T1084 |
/workspace/coverage/default/2.flash_ctrl_rd_buff_evict.4115529961 |
|
|
Jul 22 05:26:33 PM PDT 24 |
Jul 22 05:28:14 PM PDT 24 |
102876900 ps |
| T1085 |
/workspace/coverage/default/32.flash_ctrl_disable.15042461 |
|
|
Jul 22 05:33:55 PM PDT 24 |
Jul 22 05:34:17 PM PDT 24 |
13488600 ps |
| T344 |
/workspace/coverage/default/5.flash_ctrl_mp_regions.961205415 |
|
|
Jul 22 05:28:12 PM PDT 24 |
Jul 22 05:31:42 PM PDT 24 |
4844598400 ps |
| T1086 |
/workspace/coverage/default/0.flash_ctrl_oversize_error.2698297953 |
|
|
Jul 22 05:26:01 PM PDT 24 |
Jul 22 05:29:14 PM PDT 24 |
4775513600 ps |
| T1087 |
/workspace/coverage/default/0.flash_ctrl_phy_host_grant_err.4255686077 |
|
|
Jul 22 05:27:08 PM PDT 24 |
Jul 22 05:27:23 PM PDT 24 |
28399300 ps |
| T1088 |
/workspace/coverage/default/3.flash_ctrl_stress_all.865581621 |
|
|
Jul 22 05:27:17 PM PDT 24 |
Jul 22 05:47:04 PM PDT 24 |
275409600 ps |
| T1089 |
/workspace/coverage/default/7.flash_ctrl_invalid_op.3961957602 |
|
|
Jul 22 05:28:55 PM PDT 24 |
Jul 22 05:30:10 PM PDT 24 |
1699119700 ps |
| T1090 |
/workspace/coverage/default/24.flash_ctrl_intr_rd.3077427221 |
|
|
Jul 22 05:32:59 PM PDT 24 |
Jul 22 05:35:20 PM PDT 24 |
1990853600 ps |
| T1091 |
/workspace/coverage/default/1.flash_ctrl_rw_evict_all_en.2195905495 |
|
|
Jul 22 05:26:27 PM PDT 24 |
Jul 22 05:26:58 PM PDT 24 |
27427900 ps |
| T1092 |
/workspace/coverage/default/58.flash_ctrl_connect.2491229400 |
|
|
Jul 22 05:35:17 PM PDT 24 |
Jul 22 05:35:35 PM PDT 24 |
16131900 ps |
| T1093 |
/workspace/coverage/default/41.flash_ctrl_sec_info_access.500024026 |
|
|
Jul 22 05:34:40 PM PDT 24 |
Jul 22 05:35:45 PM PDT 24 |
1349590000 ps |
| T1094 |
/workspace/coverage/default/4.flash_ctrl_rd_buff_evict.2807973752 |
|
|
Jul 22 05:27:30 PM PDT 24 |
Jul 22 05:29:54 PM PDT 24 |
5726874800 ps |
| T1095 |
/workspace/coverage/default/12.flash_ctrl_rand_ops.1860838951 |
|
|
Jul 22 05:30:29 PM PDT 24 |
Jul 22 05:45:06 PM PDT 24 |
187864400 ps |
| T1096 |
/workspace/coverage/default/42.flash_ctrl_hw_sec_otp.1885509712 |
|
|
Jul 22 05:34:41 PM PDT 24 |
Jul 22 05:35:20 PM PDT 24 |
1701195900 ps |
| T1097 |
/workspace/coverage/default/4.flash_ctrl_error_prog_type.1808941841 |
|
|
Jul 22 05:27:36 PM PDT 24 |
Jul 22 06:21:29 PM PDT 24 |
1016661300 ps |
| T124 |
/workspace/coverage/default/0.flash_ctrl_phy_arb_redun.3597678089 |
|
|
Jul 22 05:26:08 PM PDT 24 |
Jul 22 05:26:27 PM PDT 24 |
905882200 ps |
| T1098 |
/workspace/coverage/default/41.flash_ctrl_disable.2202405040 |
|
|
Jul 22 05:34:39 PM PDT 24 |
Jul 22 05:35:02 PM PDT 24 |
16930700 ps |
| T1099 |
/workspace/coverage/default/25.flash_ctrl_smoke.2367496968 |
|
|
Jul 22 05:32:56 PM PDT 24 |
Jul 22 05:34:36 PM PDT 24 |
89514000 ps |
| T1100 |
/workspace/coverage/default/11.flash_ctrl_invalid_op.553652295 |
|
|
Jul 22 05:30:05 PM PDT 24 |
Jul 22 05:31:33 PM PDT 24 |
1331817100 ps |
| T1101 |
/workspace/coverage/default/62.flash_ctrl_connect.862948734 |
|
|
Jul 22 05:35:17 PM PDT 24 |
Jul 22 05:35:32 PM PDT 24 |
38258000 ps |
| T1102 |
/workspace/coverage/default/4.flash_ctrl_hw_read_seed_err.3633340841 |
|
|
Jul 22 05:27:57 PM PDT 24 |
Jul 22 05:28:11 PM PDT 24 |
15871800 ps |
| T285 |
/workspace/coverage/default/1.flash_ctrl_rd_buff_evict.3317998462 |
|
|
Jul 22 05:26:16 PM PDT 24 |
Jul 22 05:27:56 PM PDT 24 |
139286600 ps |
| T1103 |
/workspace/coverage/default/1.flash_ctrl_oversize_error.2613392035 |
|
|
Jul 22 05:26:33 PM PDT 24 |
Jul 22 05:30:18 PM PDT 24 |
2633171000 ps |
| T1104 |
/workspace/coverage/default/70.flash_ctrl_otp_reset.2635689418 |
|
|
Jul 22 05:35:25 PM PDT 24 |
Jul 22 05:37:19 PM PDT 24 |
74268400 ps |
| T172 |
/workspace/coverage/default/2.flash_ctrl_mid_op_rst.5824609 |
|
|
Jul 22 05:26:37 PM PDT 24 |
Jul 22 05:27:49 PM PDT 24 |
2580500900 ps |
| T1105 |
/workspace/coverage/default/29.flash_ctrl_smoke.3034003409 |
|
|
Jul 22 05:33:25 PM PDT 24 |
Jul 22 05:34:42 PM PDT 24 |
92086200 ps |
| T1106 |
/workspace/coverage/default/21.flash_ctrl_rw_evict_all_en.3129881617 |
|
|
Jul 22 05:32:35 PM PDT 24 |
Jul 22 05:33:07 PM PDT 24 |
29271800 ps |
| T1107 |
/workspace/coverage/default/0.flash_ctrl_hw_rma.1480633195 |
|
|
Jul 22 05:25:47 PM PDT 24 |
Jul 22 05:58:30 PM PDT 24 |
340358540300 ps |
| T126 |
/workspace/coverage/default/3.flash_ctrl_phy_arb_redun.1266642273 |
|
|
Jul 22 05:27:17 PM PDT 24 |
Jul 22 05:27:33 PM PDT 24 |
741550500 ps |
| T1108 |
/workspace/coverage/default/25.flash_ctrl_sec_info_access.4165662591 |
|
|
Jul 22 05:33:03 PM PDT 24 |
Jul 22 05:34:06 PM PDT 24 |
1755393000 ps |
| T66 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.1112048870 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:30 PM PDT 24 |
6362931900 ps |
| T67 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.2146435514 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:26 PM PDT 24 |
114843400 ps |
| T68 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.1982990193 |
|
|
Jul 22 06:18:50 PM PDT 24 |
Jul 22 06:19:12 PM PDT 24 |
177187500 ps |
| T261 |
/workspace/coverage/cover_reg_top/23.flash_ctrl_intr_test.1385658127 |
|
|
Jul 22 06:19:04 PM PDT 24 |
Jul 22 06:19:18 PM PDT 24 |
66574300 ps |
| T103 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.188335774 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:19:17 PM PDT 24 |
189549700 ps |
| T1109 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.2425873192 |
|
|
Jul 22 06:18:36 PM PDT 24 |
Jul 22 06:18:53 PM PDT 24 |
42063200 ps |
| T262 |
/workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.999491813 |
|
|
Jul 22 06:20:04 PM PDT 24 |
Jul 22 06:20:24 PM PDT 24 |
17865600 ps |
| T104 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.3737821089 |
|
|
Jul 22 06:19:08 PM PDT 24 |
Jul 22 06:19:24 PM PDT 24 |
396252000 ps |
| T224 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_errors.3568614854 |
|
|
Jul 22 06:18:55 PM PDT 24 |
Jul 22 06:19:16 PM PDT 24 |
54173600 ps |
| T256 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.3186196603 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:38 PM PDT 24 |
438745200 ps |
| T263 |
/workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.3505993110 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
15321300 ps |
| T1110 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.3399547757 |
|
|
Jul 22 06:19:04 PM PDT 24 |
Jul 22 06:19:22 PM PDT 24 |
49302000 ps |
| T225 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_intg_err.1717776871 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:34:02 PM PDT 24 |
1790866100 ps |
| T257 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.2209468540 |
|
|
Jul 22 06:20:43 PM PDT 24 |
Jul 22 06:21:02 PM PDT 24 |
69854900 ps |
| T258 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_same_csr_outstanding.907098438 |
|
|
Jul 22 06:18:55 PM PDT 24 |
Jul 22 06:19:18 PM PDT 24 |
905455700 ps |
| T301 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.4027112685 |
|
|
Jul 22 06:19:38 PM PDT 24 |
Jul 22 06:20:15 PM PDT 24 |
889281800 ps |
| T227 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.2600526681 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:09 PM PDT 24 |
782778400 ps |
| T1111 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.2642340852 |
|
|
Jul 22 06:19:05 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
35204100 ps |
| T1112 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.1057948458 |
|
|
Jul 22 06:18:50 PM PDT 24 |
Jul 22 06:19:04 PM PDT 24 |
35934500 ps |
| T332 |
/workspace/coverage/cover_reg_top/39.flash_ctrl_intr_test.3015346377 |
|
|
Jul 22 06:19:15 PM PDT 24 |
Jul 22 06:19:31 PM PDT 24 |
27697800 ps |
| T330 |
/workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.790711686 |
|
|
Jul 22 06:19:14 PM PDT 24 |
Jul 22 06:19:29 PM PDT 24 |
162355600 ps |
| T244 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.3470346453 |
|
|
Jul 22 06:18:48 PM PDT 24 |
Jul 22 06:25:11 PM PDT 24 |
255709400 ps |
| T1113 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.2735949062 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:19:12 PM PDT 24 |
26615600 ps |
| T239 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.1732368010 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:19:14 PM PDT 24 |
220697700 ps |
| T226 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.1768728708 |
|
|
Jul 22 06:19:24 PM PDT 24 |
Jul 22 06:26:01 PM PDT 24 |
424398700 ps |
| T1114 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.3493820047 |
|
|
Jul 22 06:18:38 PM PDT 24 |
Jul 22 06:18:55 PM PDT 24 |
24646000 ps |
| T245 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.1394965360 |
|
|
Jul 22 06:18:36 PM PDT 24 |
Jul 22 06:18:49 PM PDT 24 |
24536600 ps |
| T1115 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.3875755326 |
|
|
Jul 22 06:18:46 PM PDT 24 |
Jul 22 06:19:03 PM PDT 24 |
11931600 ps |
| T243 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_intg_err.1587724379 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:25:38 PM PDT 24 |
743080800 ps |
| T240 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_mem_rw_with_rand_reset.4224154856 |
|
|
Jul 22 06:19:32 PM PDT 24 |
Jul 22 06:19:51 PM PDT 24 |
49802700 ps |
| T269 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.489765206 |
|
|
Jul 22 06:18:36 PM PDT 24 |
Jul 22 06:33:51 PM PDT 24 |
3447716300 ps |
| T241 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.1213651750 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:07 PM PDT 24 |
161147900 ps |
| T1116 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.3442471869 |
|
|
Jul 22 06:19:05 PM PDT 24 |
Jul 22 06:19:22 PM PDT 24 |
35755500 ps |
| T1117 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.3761423272 |
|
|
Jul 22 06:19:36 PM PDT 24 |
Jul 22 06:19:50 PM PDT 24 |
14926200 ps |
| T1118 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.4123590622 |
|
|
Jul 22 06:19:04 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
14332300 ps |
| T302 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.1074373243 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:26 PM PDT 24 |
71787200 ps |
| T242 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.2901375833 |
|
|
Jul 22 06:18:51 PM PDT 24 |
Jul 22 06:19:12 PM PDT 24 |
65636300 ps |
| T246 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_partial_access.1921658566 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:04 PM PDT 24 |
32843600 ps |
| T1119 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.2036131709 |
|
|
Jul 22 06:19:32 PM PDT 24 |
Jul 22 06:19:48 PM PDT 24 |
39857100 ps |
| T264 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.4015184065 |
|
|
Jul 22 06:20:42 PM PDT 24 |
Jul 22 06:28:27 PM PDT 24 |
1578727600 ps |
| T333 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.3340879750 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:04 PM PDT 24 |
36827000 ps |
| T1120 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.4102643934 |
|
|
Jul 22 06:18:39 PM PDT 24 |
Jul 22 06:18:54 PM PDT 24 |
29241900 ps |
| T1121 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.566131506 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:06 PM PDT 24 |
103400800 ps |
| T1122 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_csr_rw.2884383954 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:08 PM PDT 24 |
277685500 ps |
| T1123 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.941494023 |
|
|
Jul 22 06:19:24 PM PDT 24 |
Jul 22 06:19:58 PM PDT 24 |
452295300 ps |
| T1124 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.3384529432 |
|
|
Jul 22 06:18:57 PM PDT 24 |
Jul 22 06:19:14 PM PDT 24 |
17129700 ps |
| T1125 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.1623782545 |
|
|
Jul 22 06:18:39 PM PDT 24 |
Jul 22 06:18:57 PM PDT 24 |
131113300 ps |
| T1126 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.1755474021 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:04 PM PDT 24 |
44023300 ps |
| T303 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.593317730 |
|
|
Jul 22 06:20:43 PM PDT 24 |
Jul 22 06:21:01 PM PDT 24 |
102437700 ps |
| T1127 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.1505134165 |
|
|
Jul 22 06:19:38 PM PDT 24 |
Jul 22 06:19:53 PM PDT 24 |
45264600 ps |
| T274 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.1209830601 |
|
|
Jul 22 06:19:09 PM PDT 24 |
Jul 22 06:25:42 PM PDT 24 |
426577800 ps |
| T331 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.1727124510 |
|
|
Jul 22 06:18:55 PM PDT 24 |
Jul 22 06:19:10 PM PDT 24 |
31463400 ps |
| T1128 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_mem_rw_with_rand_reset.3763323428 |
|
|
Jul 22 06:19:05 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
44492200 ps |
| T1129 |
/workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.3717255243 |
|
|
Jul 22 06:19:08 PM PDT 24 |
Jul 22 06:19:23 PM PDT 24 |
26520800 ps |
| T1130 |
/workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.1254410409 |
|
|
Jul 22 06:20:06 PM PDT 24 |
Jul 22 06:20:21 PM PDT 24 |
38878300 ps |
| T1131 |
/workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.1355683114 |
|
|
Jul 22 06:19:12 PM PDT 24 |
Jul 22 06:19:27 PM PDT 24 |
15883300 ps |
| T1132 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.644036240 |
|
|
Jul 22 06:20:43 PM PDT 24 |
Jul 22 06:21:18 PM PDT 24 |
257680500 ps |
| T304 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.2396410063 |
|
|
Jul 22 06:18:57 PM PDT 24 |
Jul 22 06:19:14 PM PDT 24 |
1184540900 ps |
| T265 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.204943556 |
|
|
Jul 22 06:18:46 PM PDT 24 |
Jul 22 06:19:03 PM PDT 24 |
74498100 ps |
| T305 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.1565301290 |
|
|
Jul 22 06:18:59 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
1548055500 ps |
| T1133 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.314881900 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
50283600 ps |
| T259 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_errors.1678339510 |
|
|
Jul 22 06:19:07 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
54055400 ps |
| T1134 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.2768041224 |
|
|
Jul 22 06:20:05 PM PDT 24 |
Jul 22 06:20:19 PM PDT 24 |
64627900 ps |
| T1135 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.3791522289 |
|
|
Jul 22 06:19:05 PM PDT 24 |
Jul 22 06:19:19 PM PDT 24 |
75105100 ps |
| T1136 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.1472903245 |
|
|
Jul 22 06:18:55 PM PDT 24 |
Jul 22 06:19:14 PM PDT 24 |
236511000 ps |
| T368 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.741654075 |
|
|
Jul 22 06:18:39 PM PDT 24 |
Jul 22 06:33:50 PM PDT 24 |
690304800 ps |
| T1137 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.2481347033 |
|
|
Jul 22 06:18:48 PM PDT 24 |
Jul 22 06:19:06 PM PDT 24 |
742384900 ps |
| T1138 |
/workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.2859119862 |
|
|
Jul 22 06:19:27 PM PDT 24 |
Jul 22 06:19:42 PM PDT 24 |
65226600 ps |
| T1139 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.3881408997 |
|
|
Jul 22 06:19:23 PM PDT 24 |
Jul 22 06:19:38 PM PDT 24 |
56062900 ps |
| T364 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.438661308 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:07 PM PDT 24 |
205626800 ps |
| T1140 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.3032884024 |
|
|
Jul 22 06:18:36 PM PDT 24 |
Jul 22 06:18:50 PM PDT 24 |
50900500 ps |
| T260 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.1088903991 |
|
|
Jul 22 06:18:58 PM PDT 24 |
Jul 22 06:19:17 PM PDT 24 |
204741100 ps |
| T1141 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.1302894481 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:07 PM PDT 24 |
86757600 ps |
| T1142 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_intr_test.2206680263 |
|
|
Jul 22 06:18:55 PM PDT 24 |
Jul 22 06:19:10 PM PDT 24 |
33745000 ps |
| T1143 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.2219024601 |
|
|
Jul 22 06:19:05 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
55054900 ps |
| T371 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.833925058 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:31:48 PM PDT 24 |
4278012300 ps |
| T1144 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.1231883303 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
11119300 ps |
| T1145 |
/workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.1097997359 |
|
|
Jul 22 06:19:13 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
185187600 ps |
| T370 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.1649697238 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:26:50 PM PDT 24 |
452493100 ps |
| T1146 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.2580193330 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:26:30 PM PDT 24 |
1705554300 ps |
| T1147 |
/workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.32161651 |
|
|
Jul 22 06:20:05 PM PDT 24 |
Jul 22 06:20:19 PM PDT 24 |
38521100 ps |
| T1148 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_intr_test.3446121808 |
|
|
Jul 22 06:19:08 PM PDT 24 |
Jul 22 06:19:23 PM PDT 24 |
49898100 ps |
| T366 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_intg_err.1272380717 |
|
|
Jul 22 06:20:41 PM PDT 24 |
Jul 22 06:28:21 PM PDT 24 |
965772300 ps |
| T1149 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.2359461111 |
|
|
Jul 22 06:18:48 PM PDT 24 |
Jul 22 06:19:03 PM PDT 24 |
14633100 ps |
| T1150 |
/workspace/coverage/cover_reg_top/36.flash_ctrl_intr_test.1896153948 |
|
|
Jul 22 06:19:14 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
32149700 ps |
| T306 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.1117297055 |
|
|
Jul 22 06:19:26 PM PDT 24 |
Jul 22 06:19:48 PM PDT 24 |
403579200 ps |
| T1151 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_intr_test.2219972575 |
|
|
Jul 22 06:19:24 PM PDT 24 |
Jul 22 06:19:40 PM PDT 24 |
57360400 ps |
| T1152 |
/workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.1069887554 |
|
|
Jul 22 06:19:14 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
25460300 ps |
| T365 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.686765876 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:34:14 PM PDT 24 |
1596685800 ps |
| T1153 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.3558684875 |
|
|
Jul 22 06:18:50 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
167228000 ps |
| T1154 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.3145452852 |
|
|
Jul 22 06:18:37 PM PDT 24 |
Jul 22 06:18:52 PM PDT 24 |
18442700 ps |
| T1155 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.118233020 |
|
|
Jul 22 06:18:46 PM PDT 24 |
Jul 22 06:19:04 PM PDT 24 |
142487300 ps |
| T1156 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_intr_test.829074598 |
|
|
Jul 22 06:18:48 PM PDT 24 |
Jul 22 06:19:02 PM PDT 24 |
50582400 ps |
| T1157 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.1617987927 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:48 PM PDT 24 |
5469934600 ps |
| T247 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_mem_partial_access.1481548329 |
|
|
Jul 22 06:19:00 PM PDT 24 |
Jul 22 06:19:13 PM PDT 24 |
35227400 ps |
| T267 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.3041576266 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:08 PM PDT 24 |
66870600 ps |
| T248 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.10299311 |
|
|
Jul 22 06:18:50 PM PDT 24 |
Jul 22 06:19:04 PM PDT 24 |
19207400 ps |
| T1158 |
/workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.2583385004 |
|
|
Jul 22 06:19:27 PM PDT 24 |
Jul 22 06:19:42 PM PDT 24 |
38102700 ps |
| T1159 |
/workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.4126064518 |
|
|
Jul 22 06:19:12 PM PDT 24 |
Jul 22 06:19:26 PM PDT 24 |
20193100 ps |
| T1160 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.3319228592 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:25 PM PDT 24 |
67720400 ps |
| T372 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.4044067919 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:31:34 PM PDT 24 |
1278659400 ps |
| T1161 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.3551401593 |
|
|
Jul 22 06:19:28 PM PDT 24 |
Jul 22 06:19:46 PM PDT 24 |
84487200 ps |
| T1162 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.2226170439 |
|
|
Jul 22 06:18:54 PM PDT 24 |
Jul 22 06:19:10 PM PDT 24 |
31554100 ps |
| T1163 |
/workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.3315878332 |
|
|
Jul 22 06:19:12 PM PDT 24 |
Jul 22 06:19:27 PM PDT 24 |
43568400 ps |
| T268 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.2591645553 |
|
|
Jul 22 06:18:50 PM PDT 24 |
Jul 22 06:19:11 PM PDT 24 |
73181900 ps |
| T1164 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.3703646720 |
|
|
Jul 22 06:19:08 PM PDT 24 |
Jul 22 06:19:25 PM PDT 24 |
14654800 ps |
| T1165 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.2099113584 |
|
|
Jul 22 06:19:05 PM PDT 24 |
Jul 22 06:19:20 PM PDT 24 |
75641200 ps |
| T1166 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_same_csr_outstanding.1628177186 |
|
|
Jul 22 06:18:46 PM PDT 24 |
Jul 22 06:19:17 PM PDT 24 |
590054100 ps |
| T1167 |
/workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.4262683194 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
33275300 ps |
| T1168 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.552452753 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
80787000 ps |
| T1169 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.2590236520 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:04 PM PDT 24 |
17326300 ps |
| T1170 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.2533262186 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:22 PM PDT 24 |
31207100 ps |
| T1171 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.1909226048 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:30 PM PDT 24 |
2283190100 ps |
| T369 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.1297714623 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:34:09 PM PDT 24 |
2713426100 ps |
| T266 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.3690379227 |
|
|
Jul 22 06:18:45 PM PDT 24 |
Jul 22 06:25:10 PM PDT 24 |
3139697900 ps |
| T1172 |
/workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.2564702266 |
|
|
Jul 22 06:20:05 PM PDT 24 |
Jul 22 06:20:19 PM PDT 24 |
46673500 ps |
| T1173 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.3356993019 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:22 PM PDT 24 |
44622900 ps |
| T271 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_tl_errors.1023240998 |
|
|
Jul 22 06:18:48 PM PDT 24 |
Jul 22 06:19:06 PM PDT 24 |
36871700 ps |
| T1174 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.1636787930 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:35 PM PDT 24 |
3790273100 ps |
| T1175 |
/workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.2832407686 |
|
|
Jul 22 06:19:08 PM PDT 24 |
Jul 22 06:19:24 PM PDT 24 |
26201800 ps |
| T1176 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.2192720920 |
|
|
Jul 22 06:19:07 PM PDT 24 |
Jul 22 06:19:23 PM PDT 24 |
117299900 ps |
| T1177 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.2628005124 |
|
|
Jul 22 06:18:51 PM PDT 24 |
Jul 22 06:19:08 PM PDT 24 |
31053600 ps |
| T1178 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.169272129 |
|
|
Jul 22 06:18:50 PM PDT 24 |
Jul 22 06:19:07 PM PDT 24 |
18873700 ps |
| T1179 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.3348661504 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:19:14 PM PDT 24 |
32978600 ps |
| T1180 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.4028606945 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:05 PM PDT 24 |
28110800 ps |
| T1181 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.3422359514 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:08 PM PDT 24 |
141432300 ps |
| T1182 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.705892872 |
|
|
Jul 22 06:19:21 PM PDT 24 |
Jul 22 06:19:39 PM PDT 24 |
13848800 ps |
| T1183 |
/workspace/coverage/cover_reg_top/7.flash_ctrl_csr_mem_rw_with_rand_reset.203367849 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:09 PM PDT 24 |
37472700 ps |
| T307 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.557244708 |
|
|
Jul 22 06:18:48 PM PDT 24 |
Jul 22 06:19:29 PM PDT 24 |
789900500 ps |
| T1184 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.1956310662 |
|
|
Jul 22 06:18:46 PM PDT 24 |
Jul 22 06:19:01 PM PDT 24 |
79911700 ps |
| T1185 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors.4237747180 |
|
|
Jul 22 06:18:48 PM PDT 24 |
Jul 22 06:19:02 PM PDT 24 |
31510900 ps |
| T1186 |
/workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.3057527229 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:20 PM PDT 24 |
31108900 ps |
| T1187 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.56869892 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:01 PM PDT 24 |
19077500 ps |
| T1188 |
/workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.4190705326 |
|
|
Jul 22 06:19:15 PM PDT 24 |
Jul 22 06:19:30 PM PDT 24 |
25475000 ps |
| T1189 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_intr_test.2478512756 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:20 PM PDT 24 |
59027000 ps |
| T308 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.729302272 |
|
|
Jul 22 06:18:39 PM PDT 24 |
Jul 22 06:18:58 PM PDT 24 |
425807800 ps |
| T1190 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.929980845 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:23 PM PDT 24 |
399704500 ps |
| T1191 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.1215512363 |
|
|
Jul 22 06:18:38 PM PDT 24 |
Jul 22 06:19:25 PM PDT 24 |
45300700 ps |
| T1192 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.1663977529 |
|
|
Jul 22 06:19:58 PM PDT 24 |
Jul 22 06:20:34 PM PDT 24 |
253004800 ps |
| T249 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.4214935477 |
|
|
Jul 22 06:18:37 PM PDT 24 |
Jul 22 06:18:52 PM PDT 24 |
18630200 ps |
| T1193 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.1206974848 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:22 PM PDT 24 |
31535900 ps |
| T1194 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.3756461370 |
|
|
Jul 22 06:18:39 PM PDT 24 |
Jul 22 06:18:56 PM PDT 24 |
34334000 ps |
| T1195 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.3384828583 |
|
|
Jul 22 06:18:45 PM PDT 24 |
Jul 22 06:19:03 PM PDT 24 |
1014538700 ps |
| T1196 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_same_csr_outstanding.2671900517 |
|
|
Jul 22 06:19:04 PM PDT 24 |
Jul 22 06:19:23 PM PDT 24 |
164229700 ps |
| T1197 |
/workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.3539920200 |
|
|
Jul 22 06:19:33 PM PDT 24 |
Jul 22 06:19:49 PM PDT 24 |
30987200 ps |
| T1198 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.4043711267 |
|
|
Jul 22 06:19:03 PM PDT 24 |
Jul 22 06:19:22 PM PDT 24 |
37292400 ps |
| T309 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.2088748049 |
|
|
Jul 22 06:18:39 PM PDT 24 |
Jul 22 06:19:27 PM PDT 24 |
48829500 ps |
| T270 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.2200825547 |
|
|
Jul 22 06:19:08 PM PDT 24 |
Jul 22 06:19:25 PM PDT 24 |
52935100 ps |
| T1199 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.850318673 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:14 PM PDT 24 |
107829200 ps |
| T1200 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.1536550885 |
|
|
Jul 22 06:18:52 PM PDT 24 |
Jul 22 06:19:10 PM PDT 24 |
159208500 ps |
| T1201 |
/workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.597135585 |
|
|
Jul 22 06:19:22 PM PDT 24 |
Jul 22 06:19:38 PM PDT 24 |
173939800 ps |
| T374 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.3270195891 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:34:06 PM PDT 24 |
331648200 ps |
| T1202 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.1657881817 |
|
|
Jul 22 06:19:07 PM PDT 24 |
Jul 22 06:19:25 PM PDT 24 |
32938600 ps |
| T1203 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.4032082621 |
|
|
Jul 22 06:20:05 PM PDT 24 |
Jul 22 06:20:19 PM PDT 24 |
44726300 ps |
| T1204 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.2159344815 |
|
|
Jul 22 06:19:04 PM PDT 24 |
Jul 22 06:19:25 PM PDT 24 |
423886700 ps |
| T1205 |
/workspace/coverage/cover_reg_top/43.flash_ctrl_intr_test.3876543043 |
|
|
Jul 22 06:19:13 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
48255100 ps |
| T1206 |
/workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.1791489499 |
|
|
Jul 22 06:19:14 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
18103300 ps |
| T1207 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.2817374026 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:19:13 PM PDT 24 |
13334600 ps |
| T1208 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_csr_bit_bash.510775886 |
|
|
Jul 22 06:19:32 PM PDT 24 |
Jul 22 06:20:40 PM PDT 24 |
2744359900 ps |
| T272 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.257140379 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:27 PM PDT 24 |
671857400 ps |
| T273 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.2146678117 |
|
|
Jul 22 06:19:07 PM PDT 24 |
Jul 22 06:19:25 PM PDT 24 |
33567600 ps |
| T1209 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.4255326860 |
|
|
Jul 22 06:19:31 PM PDT 24 |
Jul 22 06:19:45 PM PDT 24 |
44357900 ps |
| T310 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_same_csr_outstanding.1300104017 |
|
|
Jul 22 06:18:48 PM PDT 24 |
Jul 22 06:19:11 PM PDT 24 |
455072600 ps |
| T367 |
/workspace/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.3954187237 |
|
|
Jul 22 06:20:05 PM PDT 24 |
Jul 22 06:26:40 PM PDT 24 |
205266200 ps |
| T373 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.2517187313 |
|
|
Jul 22 06:19:07 PM PDT 24 |
Jul 22 06:32:09 PM PDT 24 |
10426220900 ps |
| T1210 |
/workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.2559253153 |
|
|
Jul 22 06:19:07 PM PDT 24 |
Jul 22 06:19:22 PM PDT 24 |
16795300 ps |
| T1211 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.933727408 |
|
|
Jul 22 06:19:09 PM PDT 24 |
Jul 22 06:19:29 PM PDT 24 |
200372500 ps |
| T1212 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.667028600 |
|
|
Jul 22 06:18:39 PM PDT 24 |
Jul 22 06:18:59 PM PDT 24 |
309048000 ps |
| T1213 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.1600292110 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:08 PM PDT 24 |
142901000 ps |
| T1214 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.1363772723 |
|
|
Jul 22 06:18:51 PM PDT 24 |
Jul 22 06:19:12 PM PDT 24 |
124799100 ps |
| T1215 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_tl_errors.464307182 |
|
|
Jul 22 06:19:08 PM PDT 24 |
Jul 22 06:19:29 PM PDT 24 |
55081400 ps |
| T1216 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.1817619230 |
|
|
Jul 22 06:19:04 PM PDT 24 |
Jul 22 06:19:22 PM PDT 24 |
175216200 ps |
| T1217 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.4075925215 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:34 PM PDT 24 |
4902657200 ps |
| T1218 |
/workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.1022617379 |
|
|
Jul 22 06:19:04 PM PDT 24 |
Jul 22 06:19:18 PM PDT 24 |
11732400 ps |
| T1219 |
/workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.2735247108 |
|
|
Jul 22 06:19:05 PM PDT 24 |
Jul 22 06:19:19 PM PDT 24 |
24517300 ps |
| T1220 |
/workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.2482322486 |
|
|
Jul 22 06:19:04 PM PDT 24 |
Jul 22 06:19:23 PM PDT 24 |
53681700 ps |
| T1221 |
/workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.3024577095 |
|
|
Jul 22 06:19:05 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
190883700 ps |
| T1222 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.2635587636 |
|
|
Jul 22 06:18:56 PM PDT 24 |
Jul 22 06:19:13 PM PDT 24 |
147322800 ps |
| T1223 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.136646673 |
|
|
Jul 22 06:18:38 PM PDT 24 |
Jul 22 06:18:55 PM PDT 24 |
34667400 ps |
| T1224 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.3592956914 |
|
|
Jul 22 06:18:54 PM PDT 24 |
Jul 22 06:19:08 PM PDT 24 |
24624200 ps |
| T1225 |
/workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.1739203132 |
|
|
Jul 22 06:18:51 PM PDT 24 |
Jul 22 06:19:08 PM PDT 24 |
38414700 ps |
| T1226 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.2130118634 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:01 PM PDT 24 |
14291200 ps |
| T1227 |
/workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.841674609 |
|
|
Jul 22 06:19:24 PM PDT 24 |
Jul 22 06:19:42 PM PDT 24 |
25087800 ps |
| T1228 |
/workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.3687991018 |
|
|
Jul 22 06:19:07 PM PDT 24 |
Jul 22 06:19:22 PM PDT 24 |
45922200 ps |
| T1229 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.2781478851 |
|
|
Jul 22 06:19:03 PM PDT 24 |
Jul 22 06:19:19 PM PDT 24 |
14056000 ps |
| T1230 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.3232620116 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:26 PM PDT 24 |
102311700 ps |
| T1231 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.2789436431 |
|
|
Jul 22 06:19:08 PM PDT 24 |
Jul 22 06:19:25 PM PDT 24 |
13150800 ps |
| T1232 |
/workspace/coverage/cover_reg_top/20.flash_ctrl_intr_test.4126411834 |
|
|
Jul 22 06:19:06 PM PDT 24 |
Jul 22 06:19:21 PM PDT 24 |
24562400 ps |
| T1233 |
/workspace/coverage/cover_reg_top/2.flash_ctrl_mem_walk.1299132403 |
|
|
Jul 22 06:18:45 PM PDT 24 |
Jul 22 06:18:59 PM PDT 24 |
25230500 ps |
| T1234 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.3678119396 |
|
|
Jul 22 06:19:58 PM PDT 24 |
Jul 22 06:20:47 PM PDT 24 |
4939297800 ps |
| T1235 |
/workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.2772452760 |
|
|
Jul 22 06:20:43 PM PDT 24 |
Jul 22 06:21:01 PM PDT 24 |
67967600 ps |
| T1236 |
/workspace/coverage/cover_reg_top/0.flash_ctrl_tl_errors.2689859587 |
|
|
Jul 22 06:18:37 PM PDT 24 |
Jul 22 06:18:57 PM PDT 24 |
83257800 ps |
| T1237 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.3758753184 |
|
|
Jul 22 06:18:47 PM PDT 24 |
Jul 22 06:19:03 PM PDT 24 |
35113300 ps |
| T1238 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.2195286841 |
|
|
Jul 22 06:19:32 PM PDT 24 |
Jul 22 06:19:46 PM PDT 24 |
47087800 ps |
| T1239 |
/workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.3692430095 |
|
|
Jul 22 06:19:04 PM PDT 24 |
Jul 22 06:19:23 PM PDT 24 |
226987700 ps |
| T1240 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.2847588187 |
|
|
Jul 22 06:18:55 PM PDT 24 |
Jul 22 06:19:12 PM PDT 24 |
110719700 ps |
| T1241 |
/workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.3139209518 |
|
|
Jul 22 06:19:33 PM PDT 24 |
Jul 22 06:19:51 PM PDT 24 |
59628100 ps |
| T1242 |
/workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.290355257 |
|
|
Jul 22 06:19:09 PM PDT 24 |
Jul 22 06:31:54 PM PDT 24 |
668577200 ps |
| T1243 |
/workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.575279727 |
|
|
Jul 22 06:18:55 PM PDT 24 |
Jul 22 06:19:12 PM PDT 24 |
21619000 ps |
| T1244 |
/workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.2851963250 |
|
|
Jul 22 06:20:05 PM PDT 24 |
Jul 22 06:20:18 PM PDT 24 |
19427300 ps |
| T1245 |
/workspace/coverage/cover_reg_top/4.flash_ctrl_intr_test.2445336312 |
|
|
Jul 22 06:18:50 PM PDT 24 |
Jul 22 06:19:05 PM PDT 24 |
34665800 ps |
| T1246 |
/workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.2273029403 |
|
|
Jul 22 06:18:57 PM PDT 24 |
Jul 22 06:19:14 PM PDT 24 |
21997900 ps |
| T1247 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.3614945912 |
|
|
Jul 22 06:18:55 PM PDT 24 |
Jul 22 06:19:13 PM PDT 24 |
98614700 ps |
| T1248 |
/workspace/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.2425416320 |
|
|
Jul 22 06:20:04 PM PDT 24 |
Jul 22 06:20:23 PM PDT 24 |
284079900 ps |
| T1249 |
/workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.3833008180 |
|
|
Jul 22 06:19:13 PM PDT 24 |
Jul 22 06:19:28 PM PDT 24 |
61344700 ps |
| T1250 |
/workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.1822279348 |
|
|
Jul 22 06:18:49 PM PDT 24 |
Jul 22 06:19:35 PM PDT 24 |
75335900 ps |