Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.69	97.12	93.60	98.44		100.00	84.29	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	382389552	3647	0	0
addr_rd_A	382389552	1742	0	0
bank0_info0_page_cfg_0_rd_A	382389552	2903	0	0
bank0_info0_page_cfg_1_rd_A	382389552	2640	0	0
bank0_info0_page_cfg_2_rd_A	382389552	2798	0	0
bank0_info0_page_cfg_3_rd_A	382389552	2660	0	0
bank0_info0_page_cfg_4_rd_A	382389552	1961	0	0
bank0_info0_page_cfg_5_rd_A	382389552	2995	0	0
bank0_info0_page_cfg_6_rd_A	382389552	2403	0	0
bank0_info0_page_cfg_7_rd_A	382389552	2403	0	0
bank0_info0_page_cfg_8_rd_A	382389552	2696	0	0
bank0_info0_page_cfg_9_rd_A	382389552	2967	0	0
bank0_info0_regwen_0_rd_A	382389552	1775	0	0
bank0_info0_regwen_1_rd_A	382389552	1717	0	0
bank0_info0_regwen_2_rd_A	382389552	1852	0	0
bank0_info0_regwen_3_rd_A	382389552	1864	0	0
bank0_info0_regwen_4_rd_A	382389552	1740	0	0
bank0_info0_regwen_5_rd_A	382389552	1183	0	0
bank0_info0_regwen_6_rd_A	382389552	1223	0	0
bank0_info0_regwen_7_rd_A	382389552	1278	0	0
bank0_info0_regwen_8_rd_A	382389552	1744	0	0
bank0_info0_regwen_9_rd_A	382389552	1265	0	0
bank0_info1_page_cfg_rd_A	382389552	2725	0	0
bank0_info1_regwen_rd_A	382389552	1817	0	0
bank0_info2_page_cfg_0_rd_A	382389552	2421	0	0
bank0_info2_page_cfg_1_rd_A	382389552	3017	0	0
bank0_info2_regwen_0_rd_A	382389552	1729	0	0
bank0_info2_regwen_1_rd_A	382389552	1627	0	0
bank1_info0_page_cfg_0_rd_A	382389552	3130	0	0
bank1_info0_page_cfg_1_rd_A	382389552	2239	0	0
bank1_info0_page_cfg_2_rd_A	382389552	2858	0	0
bank1_info0_page_cfg_3_rd_A	382389552	2885	0	0
bank1_info0_page_cfg_4_rd_A	382389552	2160	0	0
bank1_info0_page_cfg_5_rd_A	382389552	2789	0	0
bank1_info0_page_cfg_6_rd_A	382389552	2959	0	0
bank1_info0_page_cfg_7_rd_A	382389552	2148	0	0
bank1_info0_page_cfg_8_rd_A	382389552	2386	0	0
bank1_info0_page_cfg_9_rd_A	382389552	2789	0	0
bank1_info0_regwen_0_rd_A	382389552	1837	0	0
bank1_info0_regwen_1_rd_A	382389552	1824	0	0
bank1_info0_regwen_2_rd_A	382389552	1369	0	0
bank1_info0_regwen_3_rd_A	382389552	1714	0	0
bank1_info0_regwen_4_rd_A	382389552	1757	0	0
bank1_info0_regwen_5_rd_A	382389552	1891	0	0
bank1_info0_regwen_6_rd_A	382389552	1867	0	0
bank1_info0_regwen_7_rd_A	382389552	1737	0	0
bank1_info0_regwen_8_rd_A	382389552	1717	0	0
bank1_info0_regwen_9_rd_A	382389552	1772	0	0
bank1_info1_page_cfg_rd_A	382389552	3103	0	0
bank1_info1_regwen_rd_A	382389552	1738	0	0
bank1_info2_page_cfg_0_rd_A	382389552	2826	0	0
bank1_info2_page_cfg_1_rd_A	382389552	2936	0	0
bank1_info2_regwen_0_rd_A	382389552	1816	0	0
bank1_info2_regwen_1_rd_A	382389552	1878	0	0
bank_cfg_regwen_rd_A	382389552	1672	0	0
default_region_rd_A	382389552	2184	0	0
exec_rd_A	382389552	1634	0	0
fifo_lvl_rd_A	382389552	1873	0	0
fifo_rst_rd_A	382389552	1644	0	0
hw_info_cfg_override_rd_A	382389552	1475	0	0
intr_enable_rd_A	382389552	2470	0	0
mp_region_0_rd_A	382389552	1988	0	0
mp_region_1_rd_A	382389552	1986	0	0
mp_region_2_rd_A	382389552	1845	0	0
mp_region_3_rd_A	382389552	1987	0	0
mp_region_4_rd_A	382389552	1886	0	0
mp_region_5_rd_A	382389552	1503	0	0
mp_region_6_rd_A	382389552	1959	0	0
mp_region_7_rd_A	382389552	2022	0	0
mp_region_cfg_0_rd_A	382389552	3031	0	0
mp_region_cfg_1_rd_A	382389552	2937	0	0
mp_region_cfg_2_rd_A	382389552	2758	0	0
mp_region_cfg_3_rd_A	382389552	2732	0	0
mp_region_cfg_4_rd_A	382389552	3138	0	0
mp_region_cfg_5_rd_A	382389552	2865	0	0
mp_region_cfg_6_rd_A	382389552	2947	0	0
mp_region_cfg_7_rd_A	382389552	2342	0	0
phy_alert_cfg_rd_A	382389552	685	0	0
region_cfg_regwen_0_rd_A	382389552	1758	0	0
region_cfg_regwen_1_rd_A	382389552	1732	0	0
region_cfg_regwen_2_rd_A	382389552	1639	0	0
region_cfg_regwen_3_rd_A	382389552	1262	0	0
region_cfg_regwen_4_rd_A	382389552	1883	0	0
region_cfg_regwen_5_rd_A	382389552	1805	0	0
region_cfg_regwen_6_rd_A	382389552	1824	0	0
region_cfg_regwen_7_rd_A	382389552	1844	0	0
scratch_rd_A	382389552	1862	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	3647	0	0
T72	40364	2	0	0
T73	32427	1	0	0
T210	8277	10	0	0
T211	8605	6	0	0
T212	6485	279	0	0
T213	41628	1	0	0
T234	41525	1	0	0
T235	5002	220	0	0
T236	8128	4	0	0
T237	5044	186	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1742	0	0
T72	40364	34	0	0
T213	41628	17	0	0
T234	41525	40	0	0
T239	8725	18	0	0
T247	3426	3	0	0
T273	40436	47	0	0
T276	72609	64	0	0
T297	4284	2	0	0
T298	20665	39	0	0
T299	22179	60	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2903	0	0
T72	40364	63	0	0
T213	41628	237	0	0
T234	41525	164	0	0
T239	8725	23	0	0
T247	3426	6	0	0
T263	2784	5	0	0
T276	72609	215	0	0
T297	4284	8	0	0
T298	20665	38	0	0
T299	22179	64	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2640	0	0
T72	40364	64	0	0
T213	41628	180	0	0
T234	41525	60	0	0
T239	8725	5	0	0
T247	3426	20	0	0
T263	2784	1	0	0
T273	40436	172	0	0
T276	72609	197	0	0
T298	20665	52	0	0
T299	22179	65	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2798	0	0
T72	40364	54	0	0
T213	41628	162	0	0
T234	41525	86	0	0
T239	8725	15	0	0
T273	40436	242	0	0
T276	72609	162	0	0
T297	4284	10	0	0
T298	20665	35	0	0
T299	22179	26	0	0
T300	154832	228	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2660	0	0
T72	40364	86	0	0
T213	41628	151	0	0
T234	41525	180	0	0
T239	8725	41	0	0
T247	3426	34	0	0
T263	2784	3	0	0
T273	40436	64	0	0
T276	72609	147	0	0
T298	20665	12	0	0
T299	22179	67	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1961	0	0
T72	40364	80	0	0
T213	41628	114	0	0
T234	41525	76	0	0
T239	8725	12	0	0
T247	3426	34	0	0
T273	40436	131	0	0
T276	72609	161	0	0
T297	4284	9	0	0
T298	20665	40	0	0
T299	22179	21	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2995	0	0
T72	40364	102	0	0
T213	41628	158	0	0
T234	41525	184	0	0
T239	8725	18	0	0
T247	3426	10	0	0
T263	2784	6	0	0
T276	72609	206	0	0
T297	4284	6	0	0
T298	20665	61	0	0
T299	22179	52	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2403	0	0
T72	40364	25	0	0
T213	41628	201	0	0
T234	41525	182	0	0
T239	8725	12	0	0
T247	3426	31	0	0
T263	2784	1	0	0
T273	40436	151	0	0
T276	72609	199	0	0
T298	20665	17	0	0
T299	22179	75	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2403	0	0
T72	40364	90	0	0
T213	41628	236	0	0
T234	41525	127	0	0
T239	8725	18	0	0
T247	3426	36	0	0
T273	40436	166	0	0
T276	72609	156	0	0
T297	4284	9	0	0
T298	20665	34	0	0
T299	22179	24	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2696	0	0
T72	40364	136	0	0
T213	41628	105	0	0
T234	41525	120	0	0
T239	8725	8	0	0
T247	3426	6	0	0
T273	40436	186	0	0
T276	72609	150	0	0
T297	4284	4	0	0
T298	20665	54	0	0
T299	22179	52	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2967	0	0
T72	40364	88	0	0
T213	41628	110	0	0
T234	41525	166	0	0
T239	8725	33	0	0
T263	2784	2	0	0
T273	40436	170	0	0
T276	72609	205	0	0
T297	4284	6	0	0
T298	20665	42	0	0
T299	22179	70	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1775	0	0
T72	40364	27	0	0
T213	41628	40	0	0
T234	41525	31	0	0
T239	8725	16	0	0
T247	3426	7	0	0
T273	40436	44	0	0
T276	72609	59	0	0
T297	4284	9	0	0
T298	20665	71	0	0
T299	22179	22	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1717	0	0
T72	40364	17	0	0
T213	41628	38	0	0
T234	41525	21	0	0
T239	8725	3	0	0
T247	3426	1	0	0
T273	40436	38	0	0
T276	72609	48	0	0
T297	4284	3	0	0
T298	20665	50	0	0
T299	22179	45	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1852	0	0
T72	40364	22	0	0
T213	41628	55	0	0
T234	41525	49	0	0
T239	8725	4	0	0
T247	3426	1	0	0
T263	2784	3	0	0
T273	40436	55	0	0
T276	72609	64	0	0
T298	20665	35	0	0
T299	22179	32	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1864	0	0
T72	40364	35	0	0
T213	41628	55	0	0
T234	41525	29	0	0
T239	8725	9	0	0
T247	3426	6	0	0
T263	2784	2	0	0
T276	72609	33	0	0
T297	4284	4	0	0
T298	20665	62	0	0
T299	22179	77	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1740	0	0
T72	40364	22	0	0
T213	41628	33	0	0
T234	41525	31	0	0
T239	8725	7	0	0
T247	3426	5	0	0
T263	2784	4	0	0
T273	40436	33	0	0
T276	72609	74	0	0
T298	20665	37	0	0
T299	22179	19	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1183	0	0
T72	40364	27	0	0
T213	41628	40	0	0
T234	41525	21	0	0
T239	8725	9	0	0
T247	3426	8	0	0
T273	40436	55	0	0
T276	72609	31	0	0
T297	4284	7	0	0
T298	20665	25	0	0
T299	22179	43	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1223	0	0
T72	40364	22	0	0
T213	41628	45	0	0
T234	41525	35	0	0
T247	3426	4	0	0
T273	40436	56	0	0
T276	72609	51	0	0
T297	4284	1	0	0
T298	20665	37	0	0
T299	22179	53	0	0
T300	154832	224	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1278	0	0
T72	40364	28	0	0
T213	41628	37	0	0
T234	41525	51	0	0
T239	8725	12	0	0
T247	3426	3	0	0
T273	40436	13	0	0
T276	72609	40	0	0
T297	4284	3	0	0
T298	20665	79	0	0
T299	22179	38	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1744	0	0
T72	40364	30	0	0
T213	41628	17	0	0
T234	41525	19	0	0
T239	8725	9	0	0
T247	3426	6	0	0
T273	40436	62	0	0
T276	72609	23	0	0
T297	4284	6	0	0
T298	20665	8	0	0
T299	22179	62	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1265	0	0
T72	40364	4	0	0
T213	41628	34	0	0
T234	41525	38	0	0
T239	8725	10	0	0
T247	3426	1	0	0
T273	40436	52	0	0
T276	72609	24	0	0
T298	20665	56	0	0
T299	22179	53	0	0
T300	154832	233	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2725	0	0
T72	40364	65	0	0
T213	41628	124	0	0
T234	41525	118	0	0
T239	8725	23	0	0
T247	3426	21	0	0
T273	40436	139	0	0
T276	72609	192	0	0
T297	4284	14	0	0
T298	20665	1	0	0
T299	22179	10	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1817	0	0
T72	40364	40	0	0
T213	41628	37	0	0
T234	41525	42	0	0
T239	8725	4	0	0
T247	3426	9	0	0
T273	40436	36	0	0
T276	72609	56	0	0
T297	4284	2	0	0
T298	20665	34	0	0
T299	22179	84	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2421	0	0
T72	40364	136	0	0
T213	41628	204	0	0
T234	41525	198	0	0
T239	8725	41	0	0
T247	3426	8	0	0
T273	40436	142	0	0
T276	72609	142	0	0
T297	4284	6	0	0
T298	20665	57	0	0
T299	22179	26	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	3017	0	0
T72	40364	74	0	0
T213	41628	191	0	0
T234	41525	125	0	0
T239	8725	20	0	0
T247	3426	4	0	0
T263	2784	6	0	0
T276	72609	98	0	0
T297	4284	2	0	0
T298	20665	38	0	0
T299	22179	50	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1729	0	0
T72	40364	10	0	0
T213	41628	41	0	0
T234	41525	36	0	0
T239	8725	10	0	0
T247	3426	1	0	0
T263	2784	1	0	0
T276	72609	67	0	0
T297	4284	7	0	0
T298	20665	5	0	0
T299	22179	34	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1627	0	0
T72	40364	17	0	0
T213	41628	31	0	0
T234	41525	24	0	0
T239	8725	5	0	0
T247	3426	2	0	0
T273	40436	54	0	0
T276	72609	30	0	0
T297	4284	1	0	0
T298	20665	11	0	0
T299	22179	48	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	3130	0	0
T72	40364	65	0	0
T213	41628	142	0	0
T234	41525	160	0	0
T239	8725	76	0	0
T247	3426	38	0	0
T263	2784	2	0	0
T273	40436	137	0	0
T276	72609	235	0	0
T298	20665	71	0	0
T299	22179	67	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2239	0	0
T72	40364	71	0	0
T213	41628	245	0	0
T234	41525	74	0	0
T239	8725	3	0	0
T247	3426	37	0	0
T273	40436	161	0	0
T276	72609	120	0	0
T297	4284	3	0	0
T298	20665	40	0	0
T299	22179	50	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2858	0	0
T72	40364	41	0	0
T213	41628	176	0	0
T234	41525	160	0	0
T239	8725	46	0	0
T247	3426	30	0	0
T273	40436	123	0	0
T276	72609	226	0	0
T298	20665	14	0	0
T299	22179	77	0	0
T300	154832	230	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2885	0	0
T72	40364	95	0	0
T213	41628	155	0	0
T234	41525	148	0	0
T239	8725	8	0	0
T247	3426	2	0	0
T273	40436	116	0	0
T276	72609	140	0	0
T297	4284	4	0	0
T298	20665	24	0	0
T299	22179	71	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2160	0	0
T72	40364	93	0	0
T213	41628	156	0	0
T234	41525	131	0	0
T239	8725	23	0	0
T247	3426	4	0	0
T273	40436	129	0	0
T276	72609	130	0	0
T297	4284	3	0	0
T298	20665	54	0	0
T299	22179	33	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2789	0	0
T72	40364	71	0	0
T213	41628	226	0	0
T234	41525	69	0	0
T239	8725	10	0	0
T247	3426	30	0	0
T273	40436	135	0	0
T276	72609	193	0	0
T297	4284	5	0	0
T298	20665	29	0	0
T299	22179	82	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2959	0	0
T72	40364	74	0	0
T213	41628	185	0	0
T234	41525	102	0	0
T247	3426	3	0	0
T273	40436	143	0	0
T276	72609	167	0	0
T297	4284	4	0	0
T298	20665	43	0	0
T299	22179	39	0	0
T300	154832	231	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2148	0	0
T72	40364	51	0	0
T213	41628	80	0	0
T234	41525	81	0	0
T239	8725	16	0	0
T247	3426	3	0	0
T263	2784	8	0	0
T276	72609	236	0	0
T297	4284	7	0	0
T298	20665	10	0	0
T299	22179	21	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2386	0	0
T72	40364	103	0	0
T213	41628	203	0	0
T234	41525	166	0	0
T239	8725	9	0	0
T247	3426	5	0	0
T273	40436	183	0	0
T276	72609	155	0	0
T298	20665	34	0	0
T299	22179	71	0	0
T300	154832	212	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2789	0	0
T72	40364	91	0	0
T213	41628	179	0	0
T234	41525	213	0	0
T239	8725	11	0	0
T247	3426	8	0	0
T263	2784	2	0	0
T273	40436	74	0	0
T276	72609	207	0	0
T298	20665	35	0	0
T299	22179	54	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1837	0	0
T72	40364	54	0	0
T213	41628	36	0	0
T234	41525	46	0	0
T239	8725	7	0	0
T247	3426	8	0	0
T263	2784	5	0	0
T276	72609	36	0	0
T297	4284	9	0	0
T298	20665	30	0	0
T299	22179	63	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1824	0	0
T72	40364	32	0	0
T213	41628	35	0	0
T234	41525	38	0	0
T239	8725	5	0	0
T247	3426	4	0	0
T273	40436	44	0	0
T276	72609	18	0	0
T297	4284	13	0	0
T298	20665	27	0	0
T299	22179	45	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1369	0	0
T72	40364	21	0	0
T213	41628	44	0	0
T234	41525	32	0	0
T239	8725	14	0	0
T247	3426	1	0	0
T273	40436	37	0	0
T276	72609	40	0	0
T297	4284	6	0	0
T298	20665	78	0	0
T299	22179	59	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1714	0	0
T72	40364	15	0	0
T213	41628	40	0	0
T234	41525	47	0	0
T239	8725	16	0	0
T247	3426	8	0	0
T273	40436	33	0	0
T276	72609	36	0	0
T297	4284	13	0	0
T298	20665	9	0	0
T299	22179	54	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1757	0	0
T72	40364	34	0	0
T213	41628	33	0	0
T234	41525	31	0	0
T239	8725	6	0	0
T247	3426	4	0	0
T263	2784	2	0	0
T276	72609	35	0	0
T297	4284	2	0	0
T298	20665	8	0	0
T299	22179	33	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1891	0	0
T72	40364	19	0	0
T213	41628	23	0	0
T234	41525	33	0	0
T239	8725	14	0	0
T247	3426	3	0	0
T263	2784	7	0	0
T273	40436	41	0	0
T276	72609	56	0	0
T298	20665	59	0	0
T299	22179	59	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1867	0	0
T72	40364	21	0	0
T213	41628	43	0	0
T234	41525	40	0	0
T239	8725	6	0	0
T247	3426	1	0	0
T263	2784	4	0	0
T276	72609	41	0	0
T297	4284	11	0	0
T298	20665	57	0	0
T299	22179	95	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1737	0	0
T72	40364	24	0	0
T213	41628	36	0	0
T234	41525	54	0	0
T239	8725	2	0	0
T247	3426	3	0	0
T263	2784	2	0	0
T276	72609	55	0	0
T297	4284	2	0	0
T298	20665	40	0	0
T299	22179	34	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1717	0	0
T72	40364	18	0	0
T213	41628	33	0	0
T234	41525	21	0	0
T239	8725	9	0	0
T247	3426	1	0	0
T273	40436	36	0	0
T276	72609	50	0	0
T297	4284	8	0	0
T298	20665	60	0	0
T299	22179	36	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1772	0	0
T72	40364	19	0	0
T213	41628	40	0	0
T234	41525	50	0	0
T239	8725	12	0	0
T247	3426	8	0	0
T273	40436	33	0	0
T276	72609	49	0	0
T297	4284	8	0	0
T298	20665	28	0	0
T299	22179	46	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	3103	0	0
T72	40364	80	0	0
T213	41628	238	0	0
T234	41525	176	0	0
T239	8725	36	0	0
T247	3426	43	0	0
T263	2784	2	0	0
T276	72609	240	0	0
T297	4284	5	0	0
T298	20665	55	0	0
T299	22179	68	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1738	0	0
T72	40364	16	0	0
T213	41628	46	0	0
T234	41525	41	0	0
T239	8725	16	0	0
T247	3426	1	0	0
T263	2784	9	0	0
T273	40436	44	0	0
T276	72609	26	0	0
T298	20665	32	0	0
T299	22179	45	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2826	0	0
T72	40364	70	0	0
T213	41628	154	0	0
T234	41525	145	0	0
T239	8725	23	0	0
T247	3426	32	0	0
T263	2784	3	0	0
T276	72609	159	0	0
T297	4284	5	0	0
T298	20665	33	0	0
T299	22179	23	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2936	0	0
T72	40364	91	0	0
T213	41628	142	0	0
T234	41525	175	0	0
T239	8725	26	0	0
T247	3426	14	0	0
T273	40436	118	0	0
T276	72609	188	0	0
T297	4284	11	0	0
T298	20665	30	0	0
T299	22179	59	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1816	0	0
T72	40364	4	0	0
T213	41628	47	0	0
T234	41525	40	0	0
T239	8725	3	0	0
T273	40436	40	0	0
T276	72609	55	0	0
T297	4284	4	0	0
T298	20665	43	0	0
T299	22179	34	0	0
T300	154832	196	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1878	0	0
T72	40364	7	0	0
T213	41628	44	0	0
T234	41525	33	0	0
T239	8725	24	0	0
T247	3426	2	0	0
T263	2784	7	0	0
T276	72609	56	0	0
T297	4284	5	0	0
T298	20665	50	0	0
T299	22179	48	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1672	0	0
T72	40364	8	0	0
T213	41628	39	0	0
T234	41525	20	0	0
T239	8725	5	0	0
T247	3426	8	0	0
T273	40436	38	0	0
T276	72609	50	0	0
T297	4284	7	0	0
T298	20665	14	0	0
T299	22179	60	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2184	0	0
T72	40364	59	0	0
T213	41628	183	0	0
T234	41525	115	0	0
T239	8725	3	0	0
T247	3426	15	0	0
T263	2784	5	0	0
T276	72609	156	0	0
T297	4284	9	0	0
T298	20665	58	0	0
T299	22179	38	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1634	0	0
T72	40364	16	0	0
T213	41628	39	0	0
T234	41525	33	0	0
T239	8725	13	0	0
T247	3426	2	0	0
T273	40436	34	0	0
T276	72609	26	0	0
T297	4284	8	0	0
T298	20665	4	0	0
T299	22179	29	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1873	0	0
T72	40364	17	0	0
T213	41628	63	0	0
T234	41525	53	0	0
T239	8725	22	0	0
T247	3426	8	0	0
T273	40436	47	0	0
T276	72609	67	0	0
T297	4284	2	0	0
T298	20665	13	0	0
T299	22179	74	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1644	0	0
T72	40364	6	0	0
T213	41628	42	0	0
T234	41525	34	0	0
T239	8725	2	0	0
T247	3426	8	0	0
T273	40436	45	0	0
T276	72609	67	0	0
T297	4284	9	0	0
T298	20665	22	0	0
T299	22179	7	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1475	0	0
T72	40364	45	0	0
T213	41628	62	0	0
T234	41525	55	0	0
T239	8725	6	0	0
T247	3426	9	0	0
T273	40436	75	0	0
T276	72609	54	0	0
T297	4284	2	0	0
T298	20665	76	0	0
T299	22179	60	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2470	0	0
T72	40364	55	0	0
T213	41628	139	0	0
T234	41525	110	0	0
T239	8725	21	0	0
T247	3426	1	0	0
T263	2784	3	0	0
T276	72609	122	0	0
T297	4284	3	0	0
T298	20665	35	0	0
T299	22179	37	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1988	0	0
T72	40364	35	0	0
T213	41628	78	0	0
T234	41525	53	0	0
T239	8725	6	0	0
T247	3426	6	0	0
T263	2784	5	0	0
T276	72609	63	0	0
T297	4284	5	0	0
T298	20665	36	0	0
T299	22179	22	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1986	0	0
T72	40364	44	0	0
T213	41628	61	0	0
T234	41525	58	0	0
T239	8725	15	0	0
T247	3426	12	0	0
T273	40436	49	0	0
T276	72609	57	0	0
T297	4284	10	0	0
T298	20665	43	0	0
T299	22179	45	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1845	0	0
T72	40364	30	0	0
T213	41628	55	0	0
T234	41525	50	0	0
T239	8725	9	0	0
T247	3426	10	0	0
T273	40436	59	0	0
T276	72609	49	0	0
T298	20665	20	0	0
T299	22179	19	0	0
T300	154832	214	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1987	0	0
T72	40364	42	0	0
T213	41628	42	0	0
T234	41525	57	0	0
T239	8725	14	0	0
T247	3426	5	0	0
T263	2784	3	0	0
T276	72609	67	0	0
T297	4284	1	0	0
T298	20665	19	0	0
T299	22179	66	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1886	0	0
T72	40364	23	0	0
T213	41628	55	0	0
T234	41525	54	0	0
T239	8725	17	0	0
T247	3426	5	0	0
T263	2784	2	0	0
T276	72609	70	0	0
T297	4284	4	0	0
T298	20665	76	0	0
T299	22179	37	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1503	0	0
T72	40364	33	0	0
T213	41628	70	0	0
T234	41525	53	0	0
T239	8725	14	0	0
T247	3426	6	0	0
T273	40436	62	0	0
T276	72609	62	0	0
T297	4284	16	0	0
T298	20665	39	0	0
T299	22179	36	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1959	0	0
T72	40364	26	0	0
T213	41628	61	0	0
T234	41525	66	0	0
T239	8725	6	0	0
T247	3426	3	0	0
T263	2784	3	0	0
T276	72609	49	0	0
T297	4284	10	0	0
T298	20665	41	0	0
T299	22179	19	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2022	0	0
T72	40364	24	0	0
T213	41628	65	0	0
T234	41525	61	0	0
T239	8725	6	0	0
T247	3426	16	0	0
T263	2784	5	0	0
T276	72609	52	0	0
T297	4284	5	0	0
T298	20665	52	0	0
T299	22179	60	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	3031	0	0
T72	40364	100	0	0
T213	41628	185	0	0
T234	41525	156	0	0
T239	8725	19	0	0
T247	3426	38	0	0
T273	40436	245	0	0
T276	72609	217	0	0
T297	4284	5	0	0
T298	20665	23	0	0
T299	22179	63	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2937	0	0
T72	40364	56	0	0
T213	41628	217	0	0
T234	41525	132	0	0
T239	8725	30	0	0
T247	3426	5	0	0
T263	2784	1	0	0
T276	72609	112	0	0
T297	4284	1	0	0
T298	20665	62	0	0
T299	22179	10	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2758	0	0
T72	40364	96	0	0
T213	41628	129	0	0
T234	41525	186	0	0
T239	8725	12	0	0
T247	3426	7	0	0
T263	2784	7	0	0
T276	72609	160	0	0
T297	4284	6	0	0
T298	20665	43	0	0
T299	22179	54	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2732	0	0
T72	40364	49	0	0
T213	41628	114	0	0
T234	41525	182	0	0
T239	8725	39	0	0
T247	3426	21	0	0
T263	2784	4	0	0
T276	72609	114	0	0
T297	4284	8	0	0
T298	20665	41	0	0
T299	22179	1	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	3138	0	0
T72	40364	116	0	0
T213	41628	219	0	0
T234	41525	149	0	0
T239	8725	4	0	0
T247	3426	32	0	0
T263	2784	2	0	0
T273	40436	171	0	0
T276	72609	206	0	0
T298	20665	73	0	0
T299	22179	20	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2865	0	0
T72	40364	46	0	0
T213	41628	269	0	0
T234	41525	127	0	0
T239	8725	34	0	0
T247	3426	37	0	0
T273	40436	109	0	0
T276	72609	174	0	0
T297	4284	11	0	0
T298	20665	39	0	0
T299	22179	31	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2947	0	0
T72	40364	38	0	0
T213	41628	185	0	0
T234	41525	135	0	0
T239	8725	33	0	0
T263	2784	10	0	0
T273	40436	137	0	0
T276	72609	180	0	0
T298	20665	41	0	0
T299	22179	55	0	0
T300	154832	226	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	2342	0	0
T72	40364	108	0	0
T213	41628	139	0	0
T234	41525	35	0	0
T239	8725	6	0	0
T247	3426	14	0	0
T273	40436	102	0	0
T276	72609	222	0	0
T297	4284	7	0	0
T298	20665	63	0	0
T299	22179	45	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	685	0	0
T72	40364	9	0	0
T239	8725	6	0	0
T267	4926	8	0	0
T269	9229	6	0	0
T297	4284	1	0	0
T298	20665	48	0	0
T299	22179	21	0	0
T301	11259	2	0	0
T302	22181	27	0	0
T303	5513	5	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1758	0	0
T72	40364	26	0	0
T213	41628	36	0	0
T234	41525	40	0	0
T239	8725	14	0	0
T247	3426	2	0	0
T273	40436	37	0	0
T276	72609	51	0	0
T297	4284	5	0	0
T298	20665	81	0	0
T299	22179	60	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1732	0	0
T72	40364	8	0	0
T213	41628	37	0	0
T234	41525	27	0	0
T239	8725	13	0	0
T247	3426	5	0	0
T263	2784	4	0	0
T276	72609	31	0	0
T297	4284	8	0	0
T298	20665	55	0	0
T299	22179	50	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1639	0	0
T72	40364	10	0	0
T213	41628	44	0	0
T234	41525	24	0	0
T239	8725	5	0	0
T247	3426	8	0	0
T263	2784	1	0	0
T276	72609	46	0	0
T297	4284	2	0	0
T298	20665	29	0	0
T299	22179	39	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1262	0	0
T72	40364	24	0	0
T213	41628	29	0	0
T234	41525	37	0	0
T239	8725	1	0	0
T247	3426	3	0	0
T263	2784	6	0	0
T276	72609	65	0	0
T297	4284	3	0	0
T298	20665	41	0	0
T299	22179	57	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1883	0	0
T72	40364	13	0	0
T213	41628	33	0	0
T234	41525	38	0	0
T239	8725	14	0	0
T247	3426	8	0	0
T263	2784	1	0	0
T276	72609	27	0	0
T297	4284	4	0	0
T298	20665	56	0	0
T299	22179	45	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1805	0	0
T72	40364	22	0	0
T213	41628	29	0	0
T234	41525	44	0	0
T239	8725	11	0	0
T273	40436	52	0	0
T276	72609	44	0	0
T297	4284	6	0	0
T298	20665	49	0	0
T299	22179	49	0	0
T300	154832	235	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1824	0	0
T72	40364	11	0	0
T213	41628	27	0	0
T234	41525	46	0	0
T239	8725	17	0	0
T247	3426	4	0	0
T263	2784	3	0	0
T276	72609	48	0	0
T297	4284	1	0	0
T298	20665	34	0	0
T299	22179	18	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1844	0	0
T72	40364	29	0	0
T213	41628	55	0	0
T234	41525	41	0	0
T239	8725	12	0	0
T263	2784	6	0	0
T273	40436	33	0	0
T276	72609	42	0	0
T297	4284	2	0	0
T298	20665	58	0	0
T299	22179	41	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	382389552	1862	0	0
T72	40364	13	0	0
T213	41628	24	0	0
T234	41525	37	0	0
T239	8725	11	0	0
T247	3426	5	0	0
T263	2784	3	0	0
T276	72609	18	0	0
T297	4284	11	0	0
T298	20665	35	0	0
T299	22179	68	0	0