SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 97.62 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_lc_escalate_en_cov_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_creator_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_wr_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_nvm_debug_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_owner_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_seed_hw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER |
others[0] | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[1] | 4 | 1 | T380 | 1 | T381 | 1 | T382 | 1 | |||
others[2] | 4 | 1 | T105 | 1 | T383 | 1 | T384 | 1 | |||
others[3] | 3 | 1 | T12 | 1 | T385 | 1 | T386 | 1 | |||
false | 11982 | 1 | T1 | 1 | T2 | 1 | T3 | 2 | |||
true | 5 | 1 | T13 | 1 | T121 | 1 | T122 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 81 | 1 | T39 | 3 | T41 | 1 | T158 | 4 | |||
others[1] | 82 | 1 | T39 | 2 | T41 | 1 | T158 | 2 | |||
others[2] | 80 | 1 | T41 | 4 | T158 | 1 | T387 | 2 | |||
others[3] | 131 | 1 | T39 | 3 | T41 | 3 | T158 | 1 | |||
false | 26969 | 1 | T1 | 1 | T2 | 1 | T4 | 2 | |||
true | 22207 | 1 | T2 | 1 | T3 | 3 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2373 | 1 | T62 | 41 | T49 | 62 | T53 | 23 | |||
others[1] | 2271 | 1 | T62 | 24 | T49 | 36 | T53 | 15 | |||
others[2] | 2478 | 1 | T62 | 30 | T49 | 83 | T53 | 20 | |||
others[3] | 3870 | 1 | T62 | 36 | T49 | 125 | T39 | 2 | |||
false | 6985 | 1 | T1 | 1 | T2 | 1 | T3 | 2 | |||
true | 1588 | 1 | T2 | 1 | T3 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2397 | 1 | T62 | 22 | T49 | 61 | T53 | 15 | |||
others[1] | 2441 | 1 | T62 | 45 | T49 | 83 | T53 | 10 | |||
others[2] | 2250 | 1 | T62 | 29 | T49 | 40 | T39 | 3 | |||
others[3] | 3800 | 1 | T62 | 27 | T49 | 119 | T39 | 1 | |||
false | 7084 | 1 | T1 | 1 | T2 | 1 | T3 | 2 | |||
true | 1584 | 1 | T2 | 1 | T3 | 1 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2325 | 1 | T62 | 26 | T49 | 69 | T53 | 22 | |||
others[1] | 2327 | 1 | T62 | 30 | T49 | 77 | T53 | 20 | |||
others[2] | 2256 | 1 | T62 | 24 | T49 | 65 | T53 | 29 | |||
others[3] | 3908 | 1 | T62 | 40 | T49 | 103 | T53 | 26 | |||
false | 7523 | 1 | T1 | 1 | T2 | 1 | T3 | 2 | |||
true | 40 | 1 | T1 | 1 | T244 | 1 | T132 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 92 | 1 | T39 | 1 | T41 | 4 | T158 | 4 | |||
others[1] | 90 | 1 | T39 | 2 | T41 | 1 | T158 | 2 | |||
others[2] | 73 | 1 | T39 | 1 | T388 | 3 | T300 | 1 | |||
others[3] | 137 | 1 | T39 | 2 | T41 | 2 | T158 | 2 | |||
false | 26982 | 1 | T1 | 1 | T2 | 1 | T4 | 2 | |||
true | 22197 | 1 | T2 | 1 | T3 | 3 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 7554 | 1 | T62 | 93 | T49 | 214 | T53 | 72 | |||
others[1] | 7538 | 1 | T62 | 98 | T49 | 213 | T53 | 73 | |||
others[2] | 7521 | 1 | T62 | 77 | T49 | 202 | T53 | 60 | |||
others[3] | 12674 | 1 | T11 | 3 | T62 | 145 | T49 | 391 | |||
false | 3809 | 1 | T62 | 45 | T49 | 115 | T53 | 27 | |||
true | 18847 | 1 | T1 | 1 | T2 | 1 | T3 | 2 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |