Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.69	97.12	93.60	98.44		100.00	84.29	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	396213681	3839	0	0
addr_rd_A	396213681	1873	0	0
bank0_info0_page_cfg_0_rd_A	396213681	2877	0	0
bank0_info0_page_cfg_1_rd_A	396213681	2482	0	0
bank0_info0_page_cfg_2_rd_A	396213681	2428	0	0
bank0_info0_page_cfg_3_rd_A	396213681	2824	0	0
bank0_info0_page_cfg_4_rd_A	396213681	2813	0	0
bank0_info0_page_cfg_5_rd_A	396213681	2428	0	0
bank0_info0_page_cfg_6_rd_A	396213681	1580	0	0
bank0_info0_page_cfg_7_rd_A	396213681	2100	0	0
bank0_info0_page_cfg_8_rd_A	396213681	2320	0	0
bank0_info0_page_cfg_9_rd_A	396213681	1504	0	0
bank0_info0_regwen_0_rd_A	396213681	1209	0	0
bank0_info0_regwen_1_rd_A	396213681	1626	0	0
bank0_info0_regwen_2_rd_A	396213681	1568	0	0
bank0_info0_regwen_3_rd_A	396213681	1975	0	0
bank0_info0_regwen_4_rd_A	396213681	1449	0	0
bank0_info0_regwen_5_rd_A	396213681	1647	0	0
bank0_info0_regwen_6_rd_A	396213681	1665	0	0
bank0_info0_regwen_7_rd_A	396213681	2183	0	0
bank0_info0_regwen_8_rd_A	396213681	1571	0	0
bank0_info0_regwen_9_rd_A	396213681	2033	0	0
bank0_info1_page_cfg_rd_A	396213681	2034	0	0
bank0_info1_regwen_rd_A	396213681	1591	0	0
bank0_info2_page_cfg_0_rd_A	396213681	2852	0	0
bank0_info2_page_cfg_1_rd_A	396213681	2643	0	0
bank0_info2_regwen_0_rd_A	396213681	1179	0	0
bank0_info2_regwen_1_rd_A	396213681	1181	0	0
bank1_info0_page_cfg_0_rd_A	396213681	2377	0	0
bank1_info0_page_cfg_1_rd_A	396213681	2932	0	0
bank1_info0_page_cfg_2_rd_A	396213681	2158	0	0
bank1_info0_page_cfg_3_rd_A	396213681	2934	0	0
bank1_info0_page_cfg_4_rd_A	396213681	2275	0	0
bank1_info0_page_cfg_5_rd_A	396213681	2770	0	0
bank1_info0_page_cfg_6_rd_A	396213681	1899	0	0
bank1_info0_page_cfg_7_rd_A	396213681	1719	0	0
bank1_info0_page_cfg_8_rd_A	396213681	2285	0	0
bank1_info0_page_cfg_9_rd_A	396213681	2868	0	0
bank1_info0_regwen_0_rd_A	396213681	2047	0	0
bank1_info0_regwen_1_rd_A	396213681	2081	0	0
bank1_info0_regwen_2_rd_A	396213681	1589	0	0
bank1_info0_regwen_3_rd_A	396213681	2175	0	0
bank1_info0_regwen_4_rd_A	396213681	1796	0	0
bank1_info0_regwen_5_rd_A	396213681	1506	0	0
bank1_info0_regwen_6_rd_A	396213681	1231	0	0
bank1_info0_regwen_7_rd_A	396213681	1414	0	0
bank1_info0_regwen_8_rd_A	396213681	1347	0	0
bank1_info0_regwen_9_rd_A	396213681	1502	0	0
bank1_info1_page_cfg_rd_A	396213681	2073	0	0
bank1_info1_regwen_rd_A	396213681	1075	0	0
bank1_info2_page_cfg_0_rd_A	396213681	2996	0	0
bank1_info2_page_cfg_1_rd_A	396213681	2947	0	0
bank1_info2_regwen_0_rd_A	396213681	1764	0	0
bank1_info2_regwen_1_rd_A	396213681	2053	0	0
bank_cfg_regwen_rd_A	396213681	2001	0	0
default_region_rd_A	396213681	2694	0	0
exec_rd_A	396213681	1366	0	0
fifo_lvl_rd_A	396213681	1656	0	0
fifo_rst_rd_A	396213681	2044	0	0
hw_info_cfg_override_rd_A	396213681	1898	0	0
intr_enable_rd_A	396213681	2654	0	0
mp_region_0_rd_A	396213681	2387	0	0
mp_region_1_rd_A	396213681	1681	0	0
mp_region_2_rd_A	396213681	2111	0	0
mp_region_3_rd_A	396213681	1785	0	0
mp_region_4_rd_A	396213681	2254	0	0
mp_region_5_rd_A	396213681	1636	0	0
mp_region_6_rd_A	396213681	2225	0	0
mp_region_7_rd_A	396213681	2137	0	0
mp_region_cfg_0_rd_A	396213681	2610	0	0
mp_region_cfg_1_rd_A	396213681	2107	0	0
mp_region_cfg_2_rd_A	396213681	2464	0	0
mp_region_cfg_3_rd_A	396213681	2763	0	0
mp_region_cfg_4_rd_A	396213681	2323	0	0
mp_region_cfg_5_rd_A	396213681	2235	0	0
mp_region_cfg_6_rd_A	396213681	2291	0	0
mp_region_cfg_7_rd_A	396213681	2413	0	0
phy_alert_cfg_rd_A	396213681	1120	0	0
region_cfg_regwen_0_rd_A	396213681	1503	0	0
region_cfg_regwen_1_rd_A	396213681	2157	0	0
region_cfg_regwen_2_rd_A	396213681	1605	0	0
region_cfg_regwen_3_rd_A	396213681	2035	0	0
region_cfg_regwen_4_rd_A	396213681	1887	0	0
region_cfg_regwen_5_rd_A	396213681	1203	0	0
region_cfg_regwen_6_rd_A	396213681	1593	0	0
region_cfg_regwen_7_rd_A	396213681	1574	0	0
scratch_rd_A	396213681	1054	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	3839	0	0
T72	3582	18	0	0
T122	2957	28	0	0
T123	4076	225	0	0
T125	3056	89	0	0
T209	30012	1	0	0
T210	31721	1	0	0
T211	6303	96	0	0
T221	8169	5	0	0
T222	9525	3	0	0
T223	5768	229	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1873	0	0
T71	5429	10	0	0
T222	9525	10	0	0
T232	17425	15	0	0
T236	9709	11	0	0
T237	6825	11	0	0
T276	21647	42	0	0
T277	37316	26	0	0
T278	4888	9	0	0
T279	9784	10	0	0
T280	9995	16	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2877	0	0
T71	5429	1	0	0
T222	9525	24	0	0
T232	17425	25	0	0
T236	9709	22	0	0
T237	6825	60	0	0
T276	21647	64	0	0
T277	37316	83	0	0
T278	4888	2	0	0
T279	9784	34	0	0
T280	9995	9	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2482	0	0
T71	5429	9	0	0
T222	9525	29	0	0
T232	17425	24	0	0
T236	9709	7	0	0
T237	6825	6	0	0
T276	21647	15	0	0
T277	37316	62	0	0
T278	4888	17	0	0
T279	9784	31	0	0
T280	9995	9	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2428	0	0
T71	5429	3	0	0
T222	9525	10	0	0
T232	17425	25	0	0
T236	9709	26	0	0
T237	6825	7	0	0
T276	21647	42	0	0
T277	37316	88	0	0
T278	4888	8	0	0
T279	9784	39	0	0
T280	9995	16	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2824	0	0
T71	5429	26	0	0
T222	9525	18	0	0
T232	17425	38	0	0
T236	9709	2	0	0
T237	6825	64	0	0
T254	86658	350	0	0
T276	21647	32	0	0
T277	37316	78	0	0
T278	4888	7	0	0
T279	9784	69	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2813	0	0
T71	5429	8	0	0
T222	9525	17	0	0
T232	17425	16	0	0
T237	6825	8	0	0
T254	86658	416	0	0
T276	21647	40	0	0
T277	37316	130	0	0
T278	4888	3	0	0
T279	9784	32	0	0
T280	9995	37	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2428	0	0
T71	5429	8	0	0
T222	9525	34	0	0
T232	17425	8	0	0
T236	9709	12	0	0
T237	6825	45	0	0
T276	21647	64	0	0
T277	37316	143	0	0
T278	4888	10	0	0
T279	9784	32	0	0
T280	9995	10	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1580	0	0
T71	5429	14	0	0
T222	9525	9	0	0
T232	17425	11	0	0
T236	9709	18	0	0
T237	6825	10	0	0
T276	21647	33	0	0
T277	37316	122	0	0
T278	4888	18	0	0
T279	9784	26	0	0
T280	9995	17	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2100	0	0
T71	5429	8	0	0
T222	9525	17	0	0
T232	17425	28	0	0
T236	9709	2	0	0
T237	6825	8	0	0
T276	21647	15	0	0
T277	37316	115	0	0
T278	4888	4	0	0
T279	9784	54	0	0
T280	9995	12	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2320	0	0
T71	5429	6	0	0
T222	9525	35	0	0
T232	17425	14	0	0
T236	9709	18	0	0
T237	6825	62	0	0
T276	21647	77	0	0
T277	37316	91	0	0
T278	4888	1	0	0
T279	9784	47	0	0
T280	9995	14	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1504	0	0
T71	5429	12	0	0
T222	9525	21	0	0
T232	17425	32	0	0
T237	6825	40	0	0
T254	86658	385	0	0
T276	21647	34	0	0
T277	37316	138	0	0
T278	4888	5	0	0
T279	9784	16	0	0
T280	9995	9	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1209	0	0
T71	5429	1	0	0
T222	9525	3	0	0
T232	17425	8	0	0
T236	9709	14	0	0
T237	6825	3	0	0
T254	86658	75	0	0
T276	21647	31	0	0
T277	37316	24	0	0
T278	4888	11	0	0
T279	9784	13	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1626	0	0
T71	5429	12	0	0
T222	9525	13	0	0
T232	17425	23	0	0
T236	9709	4	0	0
T237	6825	17	0	0
T254	86658	51	0	0
T276	21647	46	0	0
T277	37316	36	0	0
T278	4888	3	0	0
T279	9784	9	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1568	0	0
T71	5429	4	0	0
T222	9525	14	0	0
T232	17425	19	0	0
T236	9709	9	0	0
T237	6825	13	0	0
T276	21647	39	0	0
T277	37316	16	0	0
T278	4888	6	0	0
T279	9784	12	0	0
T280	9995	7	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1975	0	0
T71	5429	1	0	0
T222	9525	13	0	0
T232	17425	13	0	0
T236	9709	8	0	0
T237	6825	3	0	0
T276	21647	69	0	0
T277	37316	11	0	0
T278	4888	4	0	0
T279	9784	6	0	0
T280	9995	12	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1449	0	0
T71	5429	5	0	0
T222	9525	10	0	0
T232	17425	7	0	0
T236	9709	4	0	0
T237	6825	9	0	0
T276	21647	26	0	0
T277	37316	24	0	0
T278	4888	16	0	0
T279	9784	21	0	0
T280	9995	3	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1647	0	0
T71	5429	11	0	0
T222	9525	7	0	0
T232	17425	26	0	0
T236	9709	8	0	0
T237	6825	4	0	0
T276	21647	62	0	0
T277	37316	8	0	0
T278	4888	13	0	0
T279	9784	10	0	0
T280	9995	15	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1665	0	0
T71	5429	6	0	0
T222	9525	10	0	0
T232	17425	15	0	0
T236	9709	11	0	0
T237	6825	6	0	0
T276	21647	43	0	0
T277	37316	29	0	0
T278	4888	10	0	0
T279	9784	18	0	0
T280	9995	8	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2183	0	0
T71	5429	6	0	0
T222	9525	9	0	0
T232	17425	25	0	0
T236	9709	3	0	0
T237	6825	15	0	0
T276	21647	23	0	0
T277	37316	36	0	0
T278	4888	7	0	0
T279	9784	16	0	0
T280	9995	6	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1571	0	0
T71	5429	6	0	0
T222	9525	13	0	0
T232	17425	25	0	0
T236	9709	17	0	0
T237	6825	8	0	0
T276	21647	47	0	0
T277	37316	22	0	0
T278	4888	5	0	0
T279	9784	14	0	0
T280	9995	9	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2033	0	0
T71	5429	7	0	0
T222	9525	16	0	0
T232	17425	21	0	0
T236	9709	3	0	0
T237	6825	12	0	0
T276	21647	25	0	0
T277	37316	23	0	0
T278	4888	2	0	0
T279	9784	12	0	0
T280	9995	2	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2034	0	0
T71	5429	25	0	0
T222	9525	11	0	0
T232	17425	15	0	0
T236	9709	15	0	0
T237	6825	51	0	0
T276	21647	28	0	0
T277	37316	64	0	0
T278	4888	9	0	0
T279	9784	14	0	0
T280	9995	1	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1591	0	0
T71	5429	6	0	0
T222	9525	13	0	0
T232	17425	26	0	0
T236	9709	7	0	0
T237	6825	4	0	0
T276	21647	51	0	0
T277	37316	29	0	0
T278	4888	4	0	0
T279	9784	9	0	0
T280	9995	13	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2852	0	0
T71	5429	29	0	0
T222	9525	13	0	0
T232	17425	21	0	0
T236	9709	24	0	0
T237	6825	51	0	0
T276	21647	16	0	0
T277	37316	134	0	0
T278	4888	12	0	0
T279	9784	35	0	0
T280	9995	3	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2643	0	0
T71	5429	26	0	0
T222	9525	3	0	0
T232	17425	49	0	0
T236	9709	17	0	0
T237	6825	32	0	0
T276	21647	30	0	0
T277	37316	130	0	0
T278	4888	12	0	0
T279	9784	45	0	0
T280	9995	12	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1179	0	0
T222	9525	18	0	0
T236	9709	6	0	0
T237	6825	7	0	0
T254	86658	65	0	0
T276	21647	45	0	0
T277	37316	42	0	0
T278	4888	6	0	0
T279	9784	17	0	0
T281	3120	1	0	0
T282	19457	36	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1181	0	0
T71	5429	3	0	0
T222	9525	2	0	0
T232	17425	9	0	0
T236	9709	12	0	0
T237	6825	9	0	0
T276	21647	28	0	0
T277	37316	33	0	0
T278	4888	9	0	0
T279	9784	10	0	0
T280	9995	25	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2377	0	0
T71	5429	4	0	0
T222	9525	10	0	0
T232	17425	24	0	0
T236	9709	6	0	0
T237	6825	74	0	0
T276	21647	67	0	0
T277	37316	85	0	0
T278	4888	4	0	0
T279	9784	24	0	0
T280	9995	3	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2932	0	0
T71	5429	10	0	0
T222	9525	14	0	0
T232	17425	32	0	0
T237	6825	49	0	0
T254	86658	369	0	0
T276	21647	20	0	0
T277	37316	147	0	0
T278	4888	15	0	0
T279	9784	62	0	0
T283	8706	4	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2158	0	0
T71	5429	40	0	0
T222	9525	16	0	0
T232	17425	28	0	0
T236	9709	20	0	0
T237	6825	32	0	0
T276	21647	5	0	0
T277	37316	90	0	0
T278	4888	7	0	0
T279	9784	25	0	0
T280	9995	13	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2934	0	0
T71	5429	16	0	0
T222	9525	14	0	0
T232	17425	18	0	0
T236	9709	3	0	0
T237	6825	53	0	0
T276	21647	58	0	0
T277	37316	110	0	0
T278	4888	4	0	0
T279	9784	49	0	0
T280	9995	2	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2275	0	0
T71	5429	34	0	0
T222	9525	19	0	0
T232	17425	11	0	0
T236	9709	17	0	0
T237	6825	50	0	0
T276	21647	14	0	0
T277	37316	52	0	0
T278	4888	4	0	0
T279	9784	37	0	0
T280	9995	15	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2770	0	0
T71	5429	12	0	0
T222	9525	15	0	0
T232	17425	23	0	0
T237	6825	7	0	0
T254	86658	347	0	0
T276	21647	70	0	0
T277	37316	73	0	0
T278	4888	15	0	0
T279	9784	68	0	0
T280	9995	7	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1899	0	0
T71	5429	26	0	0
T222	9525	21	0	0
T232	17425	15	0	0
T236	9709	30	0	0
T237	6825	14	0	0
T276	21647	55	0	0
T277	37316	110	0	0
T278	4888	2	0	0
T279	9784	64	0	0
T280	9995	14	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1719	0	0
T71	5429	9	0	0
T222	9525	4	0	0
T232	17425	73	0	0
T236	9709	8	0	0
T237	6825	65	0	0
T276	21647	67	0	0
T277	37316	66	0	0
T278	4888	9	0	0
T279	9784	22	0	0
T280	9995	5	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2285	0	0
T71	5429	34	0	0
T222	9525	23	0	0
T232	17425	35	0	0
T236	9709	10	0	0
T237	6825	28	0	0
T276	21647	82	0	0
T277	37316	62	0	0
T278	4888	11	0	0
T279	9784	7	0	0
T280	9995	16	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2868	0	0
T71	5429	14	0	0
T222	9525	11	0	0
T232	17425	21	0	0
T236	9709	5	0	0
T237	6825	9	0	0
T276	21647	12	0	0
T277	37316	66	0	0
T278	4888	2	0	0
T279	9784	63	0	0
T280	9995	12	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2047	0	0
T71	5429	2	0	0
T222	9525	11	0	0
T232	17425	16	0	0
T236	9709	12	0	0
T237	6825	9	0	0
T276	21647	78	0	0
T277	37316	25	0	0
T278	4888	6	0	0
T279	9784	12	0	0
T280	9995	8	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2081	0	0
T71	5429	7	0	0
T222	9525	12	0	0
T232	17425	3	0	0
T236	9709	1	0	0
T237	6825	7	0	0
T276	21647	27	0	0
T277	37316	17	0	0
T278	4888	5	0	0
T279	9784	14	0	0
T280	9995	49	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1589	0	0
T71	5429	7	0	0
T222	9525	17	0	0
T232	17425	24	0	0
T236	9709	10	0	0
T237	6825	5	0	0
T276	21647	64	0	0
T277	37316	13	0	0
T278	4888	7	0	0
T279	9784	19	0	0
T280	9995	5	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2175	0	0
T71	5429	6	0	0
T222	9525	16	0	0
T232	17425	10	0	0
T236	9709	1	0	0
T237	6825	10	0	0
T276	21647	28	0	0
T277	37316	19	0	0
T278	4888	12	0	0
T279	9784	20	0	0
T280	9995	12	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1796	0	0
T71	5429	4	0	0
T222	9525	12	0	0
T232	17425	44	0	0
T236	9709	26	0	0
T237	6825	6	0	0
T276	21647	25	0	0
T277	37316	32	0	0
T278	4888	8	0	0
T279	9784	25	0	0
T280	9995	7	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1506	0	0
T71	5429	5	0	0
T222	9525	3	0	0
T232	17425	12	0	0
T236	9709	19	0	0
T237	6825	10	0	0
T276	21647	33	0	0
T277	37316	33	0	0
T278	4888	16	0	0
T279	9784	17	0	0
T280	9995	11	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1231	0	0
T71	5429	6	0	0
T222	9525	7	0	0
T232	17425	4	0	0
T236	9709	15	0	0
T237	6825	13	0	0
T276	21647	24	0	0
T277	37316	14	0	0
T278	4888	9	0	0
T279	9784	26	0	0
T280	9995	2	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1414	0	0
T71	5429	4	0	0
T222	9525	2	0	0
T232	17425	12	0	0
T236	9709	6	0	0
T237	6825	15	0	0
T254	86658	85	0	0
T276	21647	43	0	0
T277	37316	16	0	0
T278	4888	11	0	0
T279	9784	19	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1347	0	0
T71	5429	1	0	0
T222	9525	14	0	0
T232	17425	11	0	0
T236	9709	14	0	0
T237	6825	3	0	0
T276	21647	17	0	0
T277	37316	22	0	0
T278	4888	8	0	0
T279	9784	14	0	0
T280	9995	22	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1502	0	0
T71	5429	4	0	0
T222	9525	8	0	0
T232	17425	2	0	0
T236	9709	8	0	0
T237	6825	8	0	0
T276	21647	19	0	0
T277	37316	34	0	0
T278	4888	10	0	0
T279	9784	12	0	0
T280	9995	17	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2073	0	0
T71	5429	29	0	0
T222	9525	15	0	0
T232	17425	13	0	0
T236	9709	37	0	0
T237	6825	48	0	0
T276	21647	44	0	0
T277	37316	78	0	0
T278	4888	11	0	0
T279	9784	20	0	0
T280	9995	6	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1075	0	0
T71	5429	3	0	0
T222	9525	13	0	0
T232	17425	38	0	0
T236	9709	9	0	0
T237	6825	14	0	0
T276	21647	24	0	0
T277	37316	41	0	0
T278	4888	7	0	0
T279	9784	13	0	0
T280	9995	1	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2996	0	0
T71	5429	44	0	0
T222	9525	30	0	0
T232	17425	41	0	0
T236	9709	13	0	0
T237	6825	25	0	0
T276	21647	68	0	0
T277	37316	100	0	0
T278	4888	8	0	0
T279	9784	44	0	0
T280	9995	19	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2947	0	0
T71	5429	25	0	0
T222	9525	68	0	0
T232	17425	46	0	0
T236	9709	8	0	0
T237	6825	79	0	0
T276	21647	56	0	0
T277	37316	55	0	0
T278	4888	12	0	0
T279	9784	21	0	0
T280	9995	6	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1764	0	0
T71	5429	12	0	0
T222	9525	10	0	0
T232	17425	30	0	0
T236	9709	20	0	0
T237	6825	3	0	0
T276	21647	39	0	0
T277	37316	17	0	0
T278	4888	8	0	0
T279	9784	23	0	0
T280	9995	18	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2053	0	0
T71	5429	14	0	0
T222	9525	11	0	0
T232	17425	14	0	0
T236	9709	15	0	0
T237	6825	6	0	0
T276	21647	56	0	0
T277	37316	18	0	0
T278	4888	10	0	0
T279	9784	10	0	0
T280	9995	23	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2001	0	0
T71	5429	4	0	0
T222	9525	1	0	0
T232	17425	12	0	0
T236	9709	4	0	0
T237	6825	4	0	0
T276	21647	34	0	0
T277	37316	16	0	0
T278	4888	6	0	0
T279	9784	18	0	0
T280	9995	17	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2694	0	0
T71	5429	5	0	0
T222	9525	11	0	0
T232	17425	25	0	0
T236	9709	2	0	0
T237	6825	31	0	0
T276	21647	40	0	0
T277	37316	51	0	0
T278	4888	7	0	0
T279	9784	46	0	0
T280	9995	9	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1366	0	0
T71	5429	8	0	0
T222	9525	12	0	0
T232	17425	38	0	0
T236	9709	17	0	0
T237	6825	16	0	0
T276	21647	52	0	0
T277	37316	33	0	0
T278	4888	11	0	0
T279	9784	15	0	0
T280	9995	6	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1656	0	0
T71	5429	7	0	0
T222	9525	5	0	0
T232	17425	13	0	0
T236	9709	16	0	0
T254	86658	132	0	0
T276	21647	35	0	0
T277	37316	18	0	0
T278	4888	4	0	0
T279	9784	22	0	0
T280	9995	7	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2044	0	0
T71	5429	5	0	0
T222	9525	3	0	0
T232	17425	12	0	0
T236	9709	8	0	0
T237	6825	10	0	0
T276	21647	65	0	0
T277	37316	8	0	0
T278	4888	8	0	0
T279	9784	11	0	0
T280	9995	7	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1898	0	0
T71	5429	4	0	0
T222	9525	3	0	0
T232	17425	9	0	0
T236	9709	1	0	0
T237	6825	19	0	0
T276	21647	31	0	0
T277	37316	36	0	0
T278	4888	7	0	0
T279	9784	19	0	0
T280	9995	23	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2654	0	0
T71	5429	17	0	0
T222	9525	17	0	0
T232	17425	23	0	0
T236	9709	8	0	0
T237	6825	11	0	0
T254	86658	256	0	0
T276	21647	51	0	0
T277	37316	86	0	0
T278	4888	3	0	0
T279	9784	49	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2387	0	0
T71	5429	5	0	0
T222	9525	8	0	0
T232	17425	30	0	0
T237	6825	12	0	0
T254	86658	146	0	0
T276	21647	73	0	0
T277	37316	41	0	0
T278	4888	12	0	0
T279	9784	27	0	0
T280	9995	28	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1681	0	0
T71	5429	10	0	0
T222	9525	16	0	0
T232	17425	5	0	0
T236	9709	15	0	0
T237	6825	15	0	0
T276	21647	45	0	0
T277	37316	50	0	0
T278	4888	5	0	0
T279	9784	21	0	0
T280	9995	13	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2111	0	0
T71	5429	8	0	0
T222	9525	13	0	0
T232	17425	37	0	0
T236	9709	4	0	0
T237	6825	10	0	0
T276	21647	83	0	0
T277	37316	60	0	0
T278	4888	8	0	0
T279	9784	11	0	0
T280	9995	2	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1785	0	0
T71	5429	7	0	0
T222	9525	19	0	0
T232	17425	29	0	0
T236	9709	27	0	0
T237	6825	14	0	0
T276	21647	32	0	0
T277	37316	52	0	0
T278	4888	5	0	0
T279	9784	24	0	0
T280	9995	10	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2254	0	0
T71	5429	5	0	0
T222	9525	11	0	0
T232	17425	32	0	0
T236	9709	2	0	0
T237	6825	10	0	0
T276	21647	60	0	0
T277	37316	31	0	0
T278	4888	9	0	0
T279	9784	31	0	0
T280	9995	27	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1636	0	0
T71	5429	6	0	0
T222	9525	10	0	0
T232	17425	30	0	0
T236	9709	24	0	0
T237	6825	11	0	0
T254	86658	81	0	0
T276	21647	74	0	0
T277	37316	38	0	0
T278	4888	11	0	0
T279	9784	27	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2225	0	0
T71	5429	11	0	0
T222	9525	8	0	0
T232	17425	36	0	0
T236	9709	13	0	0
T237	6825	13	0	0
T276	21647	83	0	0
T277	37316	26	0	0
T278	4888	14	0	0
T279	9784	16	0	0
T280	9995	7	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2137	0	0
T71	5429	11	0	0
T222	9525	10	0	0
T232	17425	42	0	0
T236	9709	6	0	0
T237	6825	5	0	0
T276	21647	43	0	0
T277	37316	25	0	0
T278	4888	11	0	0
T279	9784	21	0	0
T280	9995	18	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2610	0	0
T71	5429	27	0	0
T222	9525	16	0	0
T232	17425	6	0	0
T236	9709	2	0	0
T237	6825	46	0	0
T276	21647	113	0	0
T277	37316	129	0	0
T278	4888	9	0	0
T279	9784	9	0	0
T280	9995	15	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2107	0	0
T71	5429	37	0	0
T222	9525	24	0	0
T232	17425	23	0	0
T237	6825	39	0	0
T254	86658	376	0	0
T276	21647	54	0	0
T277	37316	150	0	0
T278	4888	12	0	0
T279	9784	55	0	0
T280	9995	38	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2464	0	0
T71	5429	21	0	0
T222	9525	19	0	0
T232	17425	30	0	0
T236	9709	12	0	0
T237	6825	22	0	0
T276	21647	15	0	0
T277	37316	100	0	0
T278	4888	7	0	0
T279	9784	17	0	0
T280	9995	11	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2763	0	0
T71	5429	34	0	0
T222	9525	18	0	0
T232	17425	51	0	0
T237	6825	35	0	0
T254	86658	330	0	0
T276	21647	34	0	0
T277	37316	96	0	0
T278	4888	10	0	0
T279	9784	18	0	0
T280	9995	7	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2323	0	0
T71	5429	40	0	0
T222	9525	19	0	0
T232	17425	25	0	0
T236	9709	18	0	0
T237	6825	9	0	0
T276	21647	41	0	0
T277	37316	45	0	0
T278	4888	5	0	0
T279	9784	23	0	0
T280	9995	16	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2235	0	0
T71	5429	38	0	0
T222	9525	24	0	0
T232	17425	22	0	0
T236	9709	12	0	0
T237	6825	32	0	0
T276	21647	16	0	0
T277	37316	99	0	0
T278	4888	10	0	0
T279	9784	56	0	0
T280	9995	8	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2291	0	0
T71	5429	23	0	0
T222	9525	23	0	0
T232	17425	14	0	0
T236	9709	2	0	0
T237	6825	38	0	0
T276	21647	38	0	0
T277	37316	177	0	0
T278	4888	5	0	0
T279	9784	62	0	0
T280	9995	11	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2413	0	0
T71	5429	48	0	0
T222	9525	16	0	0
T232	17425	11	0	0
T236	9709	5	0	0
T237	6825	39	0	0
T276	21647	25	0	0
T277	37316	50	0	0
T278	4888	7	0	0
T279	9784	45	0	0
T280	9995	16	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1120	0	0
T71	5429	4	0	0
T222	9525	8	0	0
T232	17425	22	0	0
T236	9709	15	0	0
T276	21647	85	0	0
T278	4888	5	0	0
T279	9784	7	0	0
T281	3120	2	0	0
T282	19457	17	0	0
T284	6098	9	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1503	0	0
T71	5429	2	0	0
T222	9525	5	0	0
T232	17425	14	0	0
T237	6825	8	0	0
T254	86658	74	0	0
T276	21647	34	0	0
T277	37316	20	0	0
T278	4888	11	0	0
T279	9784	26	0	0
T280	9995	9	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2157	0	0
T71	5429	9	0	0
T222	9525	3	0	0
T232	17425	16	0	0
T236	9709	4	0	0
T237	6825	3	0	0
T276	21647	60	0	0
T277	37316	27	0	0
T278	4888	4	0	0
T279	9784	26	0	0
T280	9995	7	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1605	0	0
T71	5429	14	0	0
T222	9525	17	0	0
T232	17425	28	0	0
T237	6825	9	0	0
T254	86658	68	0	0
T276	21647	30	0	0
T277	37316	16	0	0
T278	4888	10	0	0
T279	9784	19	0	0
T280	9995	22	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	2035	0	0
T71	5429	2	0	0
T222	9525	14	0	0
T232	17425	22	0	0
T236	9709	11	0	0
T237	6825	8	0	0
T276	21647	16	0	0
T277	37316	22	0	0
T278	4888	9	0	0
T279	9784	13	0	0
T280	9995	3	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1887	0	0
T71	5429	4	0	0
T222	9525	1	0	0
T232	17425	19	0	0
T236	9709	9	0	0
T237	6825	5	0	0
T276	21647	39	0	0
T277	37316	23	0	0
T278	4888	15	0	0
T279	9784	15	0	0
T280	9995	27	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1203	0	0
T71	5429	2	0	0
T222	9525	1	0	0
T232	17425	10	0	0
T237	6825	5	0	0
T254	86658	80	0	0
T276	21647	39	0	0
T277	37316	4	0	0
T278	4888	5	0	0
T279	9784	15	0	0
T280	9995	5	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1593	0	0
T71	5429	4	0	0
T222	9525	5	0	0
T232	17425	35	0	0
T236	9709	7	0	0
T237	6825	5	0	0
T276	21647	69	0	0
T277	37316	6	0	0
T278	4888	8	0	0
T279	9784	31	0	0
T280	9995	6	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1574	0	0
T71	5429	8	0	0
T222	9525	10	0	0
T232	17425	39	0	0
T236	9709	12	0	0
T237	6825	5	0	0
T276	21647	21	0	0
T277	37316	23	0	0
T278	4888	11	0	0
T279	9784	5	0	0
T280	9995	19	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	396213681	1054	0	0
T71	5429	12	0	0
T222	9525	7	0	0
T232	17425	12	0	0
T236	9709	8	0	0
T237	6825	12	0	0
T254	86658	79	0	0
T276	21647	44	0	0
T277	37316	22	0	0
T278	4888	8	0	0
T279	9784	20	0	0