SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_lc_creator_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_escalate_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_wr_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_nvm_debug_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_owner_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_seed_hw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 76 | 1 | T5 | 1 | T38 | 2 | T207 | 1 | |||
others[1] | 82 | 1 | T5 | 3 | T38 | 1 | T207 | 1 | |||
others[2] | 72 | 1 | T5 | 3 | T207 | 2 | T45 | 2 | |||
others[3] | 141 | 1 | T5 | 2 | T38 | 2 | T207 | 1 | |||
false | 30536 | 1 | T1 | 677 | T2 | 1 | T3 | 1 | |||
true | 25676 | 1 | T1 | 622 | T2 | 1 | T3 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2 | 1 | T198 | 1 | T358 | 1 | - | - | |||
others[1] | 4 | 1 | T74 | 1 | T86 | 1 | T359 | 1 | |||
others[2] | 4 | 1 | T76 | 1 | T360 | 1 | T361 | 1 | |||
others[3] | 3 | 1 | T362 | 1 | T363 | 1 | T364 | 1 | |||
false | 13003 | 1 | T1 | 213 | T2 | 1 | T3 | 1 | |||
true | 7 | 1 | T75 | 1 | T42 | 1 | T102 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2687 | 1 | T1 | 67 | T4 | 2 | T5 | 1 | |||
others[1] | 2677 | 1 | T1 | 72 | T5 | 2 | T47 | 81 | |||
others[2] | 2820 | 1 | T1 | 73 | T5 | 2 | T47 | 103 | |||
others[3] | 4515 | 1 | T1 | 118 | T47 | 118 | T36 | 30 | |||
false | 7306 | 1 | T1 | 76 | T2 | 1 | T3 | 1 | |||
true | 1538 | 1 | T2 | 1 | T3 | 1 | T4 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2712 | 1 | T1 | 72 | T4 | 2 | T47 | 81 | |||
others[1] | 2623 | 1 | T1 | 67 | T5 | 1 | T47 | 81 | |||
others[2] | 2715 | 1 | T1 | 61 | T5 | 1 | T47 | 74 | |||
others[3] | 4512 | 1 | T1 | 152 | T47 | 122 | T36 | 34 | |||
false | 7435 | 1 | T1 | 57 | T2 | 1 | T3 | 1 | |||
true | 1530 | 1 | T2 | 1 | T3 | 1 | T4 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2702 | 1 | T1 | 58 | T4 | 2 | T47 | 65 | |||
others[1] | 2729 | 1 | T1 | 75 | T17 | 1 | T47 | 90 | |||
others[2] | 2592 | 1 | T1 | 101 | T4 | 2 | T47 | 86 | |||
others[3] | 4500 | 1 | T1 | 104 | T47 | 117 | T36 | 30 | |||
false | 7809 | 1 | T1 | 68 | T2 | 1 | T3 | 1 | |||
true | 37 | 1 | T18 | 1 | T365 | 1 | T111 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 86 | 1 | T38 | 3 | T207 | 2 | T45 | 3 | |||
others[1] | 87 | 1 | T5 | 3 | T38 | 1 | T207 | 2 | |||
others[2] | 83 | 1 | T5 | 1 | T38 | 1 | T207 | 1 | |||
others[3] | 132 | 1 | T5 | 5 | T38 | 3 | T207 | 3 | |||
false | 30595 | 1 | T1 | 687 | T2 | 1 | T17 | 1 | |||
true | 25366 | 1 | T1 | 636 | T2 | 1 | T3 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 8900 | 1 | T1 | 229 | T4 | 8 | T47 | 244 | |||
others[1] | 8833 | 1 | T1 | 215 | T4 | 7 | T47 | 266 | |||
others[2] | 8778 | 1 | T1 | 221 | T4 | 7 | T47 | 248 | |||
others[3] | 14667 | 1 | T1 | 393 | T4 | 12 | T47 | 416 | |||
false | 4372 | 1 | T1 | 124 | T4 | 5 | T47 | 116 | |||
true | 20965 | 1 | T1 | 425 | T2 | 1 | T3 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |