Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.85	97.12	94.40	98.44		100.00	84.29	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	401511809	4679	0	0
addr_rd_A	401511809	375	0	0
bank0_info0_page_cfg_0_rd_A	401511809	1470	0	0
bank0_info0_page_cfg_1_rd_A	401511809	1431	0	0
bank0_info0_page_cfg_2_rd_A	401511809	1314	0	0
bank0_info0_page_cfg_3_rd_A	401511809	1295	0	0
bank0_info0_page_cfg_4_rd_A	401511809	1374	0	0
bank0_info0_page_cfg_5_rd_A	401511809	1107	0	0
bank0_info0_page_cfg_6_rd_A	401511809	1291	0	0
bank0_info0_page_cfg_7_rd_A	401511809	1306	0	0
bank0_info0_page_cfg_8_rd_A	401511809	1274	0	0
bank0_info0_page_cfg_9_rd_A	401511809	1143	0	0
bank0_info0_regwen_0_rd_A	401511809	424	0	0
bank0_info0_regwen_1_rd_A	401511809	454	0	0
bank0_info0_regwen_2_rd_A	401511809	401	0	0
bank0_info0_regwen_3_rd_A	401511809	488	0	0
bank0_info0_regwen_4_rd_A	401511809	405	0	0
bank0_info0_regwen_5_rd_A	401511809	404	0	0
bank0_info0_regwen_6_rd_A	401511809	420	0	0
bank0_info0_regwen_7_rd_A	401511809	383	0	0
bank0_info0_regwen_8_rd_A	401511809	314	0	0
bank0_info0_regwen_9_rd_A	401511809	439	0	0
bank0_info1_page_cfg_rd_A	401511809	1556	0	0
bank0_info1_regwen_rd_A	401511809	428	0	0
bank0_info2_page_cfg_0_rd_A	401511809	1295	0	0
bank0_info2_page_cfg_1_rd_A	401511809	1284	0	0
bank0_info2_regwen_0_rd_A	401511809	380	0	0
bank0_info2_regwen_1_rd_A	401511809	370	0	0
bank1_info0_page_cfg_0_rd_A	401511809	1292	0	0
bank1_info0_page_cfg_1_rd_A	401511809	1370	0	0
bank1_info0_page_cfg_2_rd_A	401511809	1250	0	0
bank1_info0_page_cfg_3_rd_A	401511809	1283	0	0
bank1_info0_page_cfg_4_rd_A	401511809	1164	0	0
bank1_info0_page_cfg_5_rd_A	401511809	1349	0	0
bank1_info0_page_cfg_6_rd_A	401511809	1465	0	0
bank1_info0_page_cfg_7_rd_A	401511809	1491	0	0
bank1_info0_page_cfg_8_rd_A	401511809	1333	0	0
bank1_info0_page_cfg_9_rd_A	401511809	1178	0	0
bank1_info0_regwen_0_rd_A	401511809	437	0	0
bank1_info0_regwen_1_rd_A	401511809	388	0	0
bank1_info0_regwen_2_rd_A	401511809	380	0	0
bank1_info0_regwen_3_rd_A	401511809	423	0	0
bank1_info0_regwen_4_rd_A	401511809	458	0	0
bank1_info0_regwen_5_rd_A	401511809	463	0	0
bank1_info0_regwen_6_rd_A	401511809	335	0	0
bank1_info0_regwen_7_rd_A	401511809	405	0	0
bank1_info0_regwen_8_rd_A	401511809	446	0	0
bank1_info0_regwen_9_rd_A	401511809	401	0	0
bank1_info1_page_cfg_rd_A	401511809	1313	0	0
bank1_info1_regwen_rd_A	401511809	499	0	0
bank1_info2_page_cfg_0_rd_A	401511809	1267	0	0
bank1_info2_page_cfg_1_rd_A	401511809	1341	0	0
bank1_info2_regwen_0_rd_A	401511809	428	0	0
bank1_info2_regwen_1_rd_A	401511809	418	0	0
bank_cfg_regwen_rd_A	401511809	490	0	0
default_region_rd_A	401511809	1194	0	0
exec_rd_A	401511809	504	0	0
fifo_lvl_rd_A	401511809	476	0	0
fifo_rst_rd_A	401511809	422	0	0
hw_info_cfg_override_rd_A	401511809	601	0	0
intr_enable_rd_A	401511809	1102	0	0
mp_region_0_rd_A	401511809	507	0	0
mp_region_1_rd_A	401511809	528	0	0
mp_region_2_rd_A	401511809	497	0	0
mp_region_3_rd_A	401511809	497	0	0
mp_region_4_rd_A	401511809	612	0	0
mp_region_5_rd_A	401511809	599	0	0
mp_region_6_rd_A	401511809	563	0	0
mp_region_7_rd_A	401511809	679	0	0
mp_region_cfg_0_rd_A	401511809	1474	0	0
mp_region_cfg_1_rd_A	401511809	1337	0	0
mp_region_cfg_2_rd_A	401511809	1307	0	0
mp_region_cfg_3_rd_A	401511809	1204	0	0
mp_region_cfg_4_rd_A	401511809	1550	0	0
mp_region_cfg_5_rd_A	401511809	1347	0	0
mp_region_cfg_6_rd_A	401511809	1311	0	0
mp_region_cfg_7_rd_A	401511809	1039	0	0
phy_alert_cfg_rd_A	401511809	174	0	0
region_cfg_regwen_0_rd_A	401511809	367	0	0
region_cfg_regwen_1_rd_A	401511809	464	0	0
region_cfg_regwen_2_rd_A	401511809	455	0	0
region_cfg_regwen_3_rd_A	401511809	360	0	0
region_cfg_regwen_4_rd_A	401511809	459	0	0
region_cfg_regwen_5_rd_A	401511809	417	0	0
region_cfg_regwen_6_rd_A	401511809	348	0	0
region_cfg_regwen_7_rd_A	401511809	471	0	0
scratch_rd_A	401511809	470	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	4679	0	0
T101	41556	2	0	0
T102	2467	2	0	0
T103	8512	1	0	0
T104	3112	92	0	0
T204	3382	88	0	0
T205	72012	2	0	0
T206	2758	115	0	0
T233	4474	45	0	0
T234	3883	9	0	0
T235	7942	4	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	375	0	0
T101	41556	29	0	0
T103	8512	13	0	0
T251	3835	9	0	0
T262	2720	5	0	0
T293	38792	24	0	0
T294	9180	4	0	0
T295	20064	33	0	0
T296	3294	3	0	0
T297	39533	14	0	0
T298	39893	47	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1470	0	0
T101	41556	166	0	0
T103	8512	25	0	0
T251	3835	3	0	0
T262	2720	7	0	0
T293	38792	74	0	0
T294	9180	30	0	0
T295	20064	72	0	0
T296	3294	25	0	0
T297	39533	91	0	0
T299	10753	17	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1431	0	0
T101	41556	174	0	0
T103	8512	16	0	0
T251	3835	10	0	0
T262	2720	8	0	0
T293	38792	102	0	0
T294	9180	15	0	0
T295	20064	69	0	0
T296	3294	4	0	0
T297	39533	134	0	0
T299	10753	17	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1314	0	0
T101	41556	143	0	0
T103	8512	4	0	0
T251	3835	25	0	0
T262	2720	9	0	0
T293	38792	58	0	0
T294	9180	10	0	0
T295	20064	44	0	0
T296	3294	25	0	0
T297	39533	139	0	0
T299	10753	28	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1295	0	0
T101	41556	170	0	0
T103	8512	22	0	0
T251	3835	31	0	0
T262	2720	1	0	0
T293	38792	57	0	0
T294	9180	11	0	0
T295	20064	51	0	0
T296	3294	27	0	0
T297	39533	67	0	0
T299	10753	17	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1374	0	0
T101	41556	134	0	0
T103	8512	20	0	0
T251	3835	3	0	0
T293	38792	71	0	0
T294	9180	28	0	0
T295	20064	46	0	0
T296	3294	31	0	0
T297	39533	136	0	0
T298	39893	168	0	0
T299	10753	36	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1107	0	0
T101	41556	123	0	0
T103	8512	6	0	0
T251	3835	2	0	0
T262	2720	4	0	0
T293	38792	66	0	0
T294	9180	3	0	0
T295	20064	14	0	0
T296	3294	3	0	0
T297	39533	97	0	0
T299	10753	25	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1291	0	0
T101	41556	170	0	0
T103	8512	38	0	0
T251	3835	4	0	0
T262	2720	7	0	0
T293	38792	119	0	0
T294	9180	23	0	0
T295	20064	32	0	0
T296	3294	31	0	0
T297	39533	62	0	0
T299	10753	17	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1306	0	0
T101	41556	187	0	0
T103	8512	1	0	0
T251	3835	19	0	0
T262	2720	2	0	0
T293	38792	30	0	0
T294	9180	9	0	0
T295	20064	13	0	0
T296	3294	1	0	0
T297	39533	122	0	0
T299	10753	50	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1274	0	0
T101	41556	143	0	0
T103	8512	1	0	0
T251	3835	7	0	0
T262	2720	2	0	0
T293	38792	93	0	0
T294	9180	18	0	0
T295	20064	62	0	0
T296	3294	23	0	0
T297	39533	116	0	0
T299	10753	28	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1143	0	0
T101	41556	145	0	0
T103	8512	36	0	0
T251	3835	23	0	0
T262	2720	1	0	0
T293	38792	88	0	0
T294	9180	37	0	0
T295	20064	52	0	0
T296	3294	6	0	0
T297	39533	54	0	0
T299	10753	23	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	424	0	0
T101	41556	36	0	0
T103	8512	4	0	0
T262	2720	2	0	0
T293	38792	12	0	0
T294	9180	11	0	0
T295	20064	44	0	0
T297	39533	20	0	0
T298	39893	46	0	0
T299	10753	31	0	0
T300	9941	3	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	454	0	0
T101	41556	48	0	0
T103	8512	7	0	0
T251	3835	2	0	0
T262	2720	7	0	0
T293	38792	23	0	0
T294	9180	15	0	0
T295	20064	59	0	0
T297	39533	9	0	0
T298	39893	40	0	0
T299	10753	48	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	401	0	0
T101	41556	21	0	0
T103	8512	1	0	0
T251	3835	2	0	0
T262	2720	2	0	0
T293	38792	19	0	0
T294	9180	8	0	0
T295	20064	68	0	0
T296	3294	4	0	0
T297	39533	12	0	0
T299	10753	9	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	488	0	0
T101	41556	34	0	0
T103	8512	21	0	0
T251	3835	8	0	0
T262	2720	4	0	0
T293	38792	18	0	0
T294	9180	25	0	0
T295	20064	67	0	0
T296	3294	4	0	0
T297	39533	26	0	0
T299	10753	36	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	405	0	0
T101	41556	37	0	0
T103	8512	10	0	0
T251	3835	5	0	0
T262	2720	4	0	0
T293	38792	19	0	0
T294	9180	6	0	0
T295	20064	43	0	0
T296	3294	9	0	0
T297	39533	11	0	0
T299	10753	28	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	404	0	0
T101	41556	42	0	0
T103	8512	4	0	0
T251	3835	8	0	0
T262	2720	3	0	0
T293	38792	27	0	0
T294	9180	8	0	0
T295	20064	11	0	0
T297	39533	26	0	0
T298	39893	37	0	0
T299	10753	14	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	420	0	0
T101	41556	42	0	0
T103	8512	3	0	0
T251	3835	6	0	0
T262	2720	8	0	0
T293	38792	38	0	0
T294	9180	11	0	0
T295	20064	71	0	0
T296	3294	6	0	0
T297	39533	19	0	0
T299	10753	16	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	383	0	0
T101	41556	37	0	0
T103	8512	7	0	0
T251	3835	7	0	0
T293	38792	12	0	0
T294	9180	9	0	0
T295	20064	28	0	0
T296	3294	1	0	0
T297	39533	29	0	0
T298	39893	40	0	0
T299	10753	12	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	314	0	0
T101	41556	31	0	0
T103	8512	16	0	0
T251	3835	4	0	0
T262	2720	9	0	0
T293	38792	19	0	0
T294	9180	12	0	0
T295	20064	2	0	0
T296	3294	4	0	0
T297	39533	22	0	0
T299	10753	2	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	439	0	0
T101	41556	51	0	0
T103	8512	9	0	0
T251	3835	8	0	0
T262	2720	7	0	0
T293	38792	39	0	0
T294	9180	8	0	0
T295	20064	5	0	0
T296	3294	5	0	0
T297	39533	27	0	0
T299	10753	21	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1556	0	0
T101	41556	213	0	0
T103	8512	32	0	0
T251	3835	14	0	0
T262	2720	8	0	0
T293	38792	112	0	0
T294	9180	17	0	0
T295	20064	40	0	0
T296	3294	5	0	0
T297	39533	79	0	0
T299	10753	40	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	428	0	0
T101	41556	39	0	0
T103	8512	1	0	0
T251	3835	4	0	0
T262	2720	8	0	0
T293	38792	15	0	0
T294	9180	11	0	0
T295	20064	70	0	0
T296	3294	8	0	0
T297	39533	13	0	0
T299	10753	26	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1295	0	0
T101	41556	183	0	0
T103	8512	18	0	0
T251	3835	27	0	0
T262	2720	9	0	0
T293	38792	88	0	0
T294	9180	13	0	0
T295	20064	25	0	0
T296	3294	24	0	0
T297	39533	64	0	0
T299	10753	8	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1284	0	0
T101	41556	144	0	0
T103	8512	12	0	0
T251	3835	5	0	0
T293	38792	100	0	0
T294	9180	29	0	0
T295	20064	40	0	0
T296	3294	4	0	0
T297	39533	50	0	0
T298	39893	185	0	0
T299	10753	6	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	380	0	0
T101	41556	34	0	0
T103	8512	1	0	0
T251	3835	2	0	0
T262	2720	1	0	0
T293	38792	23	0	0
T295	20064	18	0	0
T296	3294	3	0	0
T297	39533	24	0	0
T298	39893	31	0	0
T299	10753	30	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	370	0	0
T101	41556	30	0	0
T103	8512	10	0	0
T251	3835	8	0	0
T293	38792	20	0	0
T294	9180	6	0	0
T295	20064	33	0	0
T296	3294	1	0	0
T297	39533	12	0	0
T298	39893	27	0	0
T299	10753	18	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1292	0	0
T101	41556	189	0	0
T103	8512	13	0	0
T251	3835	25	0	0
T262	2720	6	0	0
T293	38792	36	0	0
T294	9180	27	0	0
T295	20064	34	0	0
T297	39533	92	0	0
T298	39893	183	0	0
T299	10753	7	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1370	0	0
T101	41556	112	0	0
T103	8512	24	0	0
T251	3835	15	0	0
T262	2720	1	0	0
T293	38792	78	0	0
T294	9180	13	0	0
T295	20064	49	0	0
T296	3294	34	0	0
T297	39533	71	0	0
T299	10753	38	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1250	0	0
T101	41556	150	0	0
T103	8512	18	0	0
T251	3835	1	0	0
T262	2720	5	0	0
T293	38792	103	0	0
T294	9180	24	0	0
T295	20064	35	0	0
T296	3294	4	0	0
T297	39533	66	0	0
T299	10753	9	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1283	0	0
T101	41556	151	0	0
T103	8512	61	0	0
T251	3835	23	0	0
T262	2720	6	0	0
T293	38792	99	0	0
T294	9180	12	0	0
T295	20064	30	0	0
T296	3294	8	0	0
T297	39533	41	0	0
T299	10753	7	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1164	0	0
T101	41556	132	0	0
T103	8512	7	0	0
T251	3835	28	0	0
T262	2720	4	0	0
T293	38792	80	0	0
T294	9180	13	0	0
T295	20064	28	0	0
T296	3294	6	0	0
T297	39533	61	0	0
T299	10753	30	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1349	0	0
T101	41556	201	0	0
T103	8512	11	0	0
T251	3835	5	0	0
T262	2720	3	0	0
T293	38792	60	0	0
T294	9180	22	0	0
T295	20064	44	0	0
T296	3294	19	0	0
T297	39533	102	0	0
T299	10753	26	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1465	0	0
T101	41556	169	0	0
T103	8512	32	0	0
T251	3835	1	0	0
T262	2720	4	0	0
T293	38792	80	0	0
T294	9180	28	0	0
T295	20064	28	0	0
T296	3294	32	0	0
T297	39533	73	0	0
T299	10753	41	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1491	0	0
T101	41556	233	0	0
T103	8512	13	0	0
T251	3835	21	0	0
T262	2720	8	0	0
T293	38792	44	0	0
T294	9180	7	0	0
T295	20064	26	0	0
T296	3294	40	0	0
T297	39533	106	0	0
T299	10753	16	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1333	0	0
T101	41556	166	0	0
T103	8512	25	0	0
T251	3835	3	0	0
T293	38792	98	0	0
T294	9180	37	0	0
T295	20064	83	0	0
T296	3294	23	0	0
T297	39533	50	0	0
T298	39893	188	0	0
T299	10753	3	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1178	0	0
T101	41556	117	0	0
T103	8512	26	0	0
T251	3835	37	0	0
T262	2720	7	0	0
T293	38792	25	0	0
T294	9180	6	0	0
T295	20064	28	0	0
T296	3294	9	0	0
T297	39533	84	0	0
T299	10753	22	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	437	0	0
T101	41556	32	0	0
T103	8512	15	0	0
T251	3835	2	0	0
T293	38792	17	0	0
T294	9180	16	0	0
T295	20064	48	0	0
T296	3294	4	0	0
T297	39533	23	0	0
T298	39893	29	0	0
T299	10753	40	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	388	0	0
T101	41556	52	0	0
T103	8512	16	0	0
T251	3835	3	0	0
T262	2720	2	0	0
T293	38792	6	0	0
T294	9180	9	0	0
T295	20064	59	0	0
T297	39533	21	0	0
T298	39893	28	0	0
T299	10753	5	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	380	0	0
T101	41556	50	0	0
T103	8512	1	0	0
T251	3835	8	0	0
T262	2720	1	0	0
T293	38792	26	0	0
T294	9180	3	0	0
T295	20064	14	0	0
T296	3294	8	0	0
T297	39533	21	0	0
T299	10753	10	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	423	0	0
T101	41556	42	0	0
T103	8512	14	0	0
T262	2720	8	0	0
T293	38792	24	0	0
T294	9180	6	0	0
T295	20064	34	0	0
T296	3294	6	0	0
T297	39533	22	0	0
T298	39893	34	0	0
T299	10753	30	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	458	0	0
T101	41556	45	0	0
T103	8512	25	0	0
T251	3835	4	0	0
T262	2720	7	0	0
T293	38792	24	0	0
T294	9180	14	0	0
T295	20064	31	0	0
T297	39533	43	0	0
T298	39893	31	0	0
T299	10753	9	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	463	0	0
T101	41556	29	0	0
T103	8512	14	0	0
T262	2720	7	0	0
T293	38792	3	0	0
T294	9180	9	0	0
T295	20064	60	0	0
T296	3294	6	0	0
T297	39533	29	0	0
T298	39893	42	0	0
T299	10753	37	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	335	0	0
T101	41556	29	0	0
T103	8512	13	0	0
T262	2720	8	0	0
T293	38792	7	0	0
T294	9180	13	0	0
T295	20064	9	0	0
T296	3294	1	0	0
T297	39533	11	0	0
T298	39893	32	0	0
T299	10753	14	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	405	0	0
T101	41556	37	0	0
T103	8512	8	0	0
T251	3835	1	0	0
T262	2720	6	0	0
T293	38792	19	0	0
T294	9180	6	0	0
T295	20064	47	0	0
T296	3294	4	0	0
T297	39533	18	0	0
T299	10753	16	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	446	0	0
T101	41556	38	0	0
T103	8512	5	0	0
T251	3835	2	0	0
T262	2720	3	0	0
T293	38792	24	0	0
T294	9180	3	0	0
T295	20064	43	0	0
T296	3294	5	0	0
T297	39533	27	0	0
T299	10753	18	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	401	0	0
T101	41556	29	0	0
T103	8512	14	0	0
T251	3835	2	0	0
T262	2720	8	0	0
T293	38792	22	0	0
T294	9180	3	0	0
T295	20064	41	0	0
T296	3294	1	0	0
T297	39533	20	0	0
T299	10753	23	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1313	0	0
T101	41556	178	0	0
T103	8512	4	0	0
T251	3835	1	0	0
T262	2720	5	0	0
T293	38792	76	0	0
T295	20064	5	0	0
T296	3294	1	0	0
T297	39533	67	0	0
T298	39893	214	0	0
T299	10753	20	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	499	0	0
T101	41556	55	0	0
T103	8512	16	0	0
T251	3835	5	0	0
T262	2720	9	0	0
T293	38792	18	0	0
T294	9180	9	0	0
T295	20064	63	0	0
T296	3294	4	0	0
T297	39533	22	0	0
T299	10753	9	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1267	0	0
T101	41556	146	0	0
T103	8512	16	0	0
T251	3835	31	0	0
T262	2720	3	0	0
T293	38792	93	0	0
T295	20064	65	0	0
T296	3294	5	0	0
T297	39533	81	0	0
T298	39893	115	0	0
T299	10753	31	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1341	0	0
T101	41556	210	0	0
T103	8512	9	0	0
T251	3835	8	0	0
T262	2720	3	0	0
T293	38792	95	0	0
T294	9180	20	0	0
T295	20064	50	0	0
T296	3294	22	0	0
T297	39533	99	0	0
T299	10753	33	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	428	0	0
T101	41556	41	0	0
T103	8512	8	0	0
T251	3835	3	0	0
T262	2720	3	0	0
T293	38792	21	0	0
T294	9180	16	0	0
T295	20064	26	0	0
T296	3294	10	0	0
T297	39533	22	0	0
T299	10753	45	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	418	0	0
T101	41556	23	0	0
T103	8512	7	0	0
T251	3835	7	0	0
T262	2720	2	0	0
T293	38792	9	0	0
T294	9180	12	0	0
T295	20064	78	0	0
T296	3294	1	0	0
T297	39533	4	0	0
T299	10753	38	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	490	0	0
T101	41556	39	0	0
T103	8512	9	0	0
T251	3835	5	0	0
T262	2720	6	0	0
T293	38792	8	0	0
T294	9180	2	0	0
T295	20064	53	0	0
T296	3294	9	0	0
T297	39533	13	0	0
T299	10753	56	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1194	0	0
T101	41556	176	0	0
T103	8512	26	0	0
T251	3835	1	0	0
T262	2720	8	0	0
T293	38792	99	0	0
T294	9180	40	0	0
T295	20064	55	0	0
T296	3294	18	0	0
T297	39533	78	0	0
T299	10753	9	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	504	0	0
T101	41556	28	0	0
T103	8512	5	0	0
T262	2720	4	0	0
T293	38792	17	0	0
T294	9180	21	0	0
T295	20064	71	0	0
T296	3294	6	0	0
T297	39533	29	0	0
T298	39893	49	0	0
T299	10753	28	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	476	0	0
T101	41556	29	0	0
T251	3835	2	0	0
T262	2720	1	0	0
T293	38792	32	0	0
T294	9180	13	0	0
T295	20064	34	0	0
T296	3294	9	0	0
T297	39533	16	0	0
T298	39893	67	0	0
T299	10753	31	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	422	0	0
T101	41556	34	0	0
T103	8512	4	0	0
T251	3835	5	0	0
T262	2720	5	0	0
T293	38792	23	0	0
T294	9180	6	0	0
T295	20064	32	0	0
T296	3294	3	0	0
T297	39533	14	0	0
T299	10753	25	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	601	0	0
T101	41556	71	0	0
T103	8512	11	0	0
T251	3835	13	0	0
T262	2720	1	0	0
T293	38792	38	0	0
T294	9180	4	0	0
T295	20064	40	0	0
T296	3294	4	0	0
T297	39533	24	0	0
T299	10753	36	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1102	0	0
T101	41556	121	0	0
T103	8512	16	0	0
T251	3835	2	0	0
T262	2720	1	0	0
T293	38792	92	0	0
T294	9180	4	0	0
T295	20064	21	0	0
T296	3294	7	0	0
T297	39533	79	0	0
T299	10753	5	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	507	0	0
T101	41556	48	0	0
T103	8512	11	0	0
T251	3835	2	0	0
T262	2720	2	0	0
T293	38792	25	0	0
T294	9180	4	0	0
T295	20064	28	0	0
T296	3294	9	0	0
T297	39533	36	0	0
T299	10753	22	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	528	0	0
T101	41556	70	0	0
T103	8512	1	0	0
T251	3835	2	0	0
T262	2720	4	0	0
T293	38792	32	0	0
T294	9180	16	0	0
T295	20064	48	0	0
T296	3294	9	0	0
T297	39533	15	0	0
T299	10753	5	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	497	0	0
T101	41556	45	0	0
T103	8512	17	0	0
T293	38792	49	0	0
T294	9180	9	0	0
T295	20064	23	0	0
T296	3294	6	0	0
T297	39533	14	0	0
T298	39893	67	0	0
T299	10753	3	0	0
T300	9941	11	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	497	0	0
T101	41556	62	0	0
T103	8512	7	0	0
T251	3835	6	0	0
T262	2720	9	0	0
T293	38792	32	0	0
T294	9180	17	0	0
T295	20064	12	0	0
T296	3294	1	0	0
T297	39533	42	0	0
T299	10753	8	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	612	0	0
T101	41556	70	0	0
T103	8512	12	0	0
T251	3835	5	0	0
T262	2720	5	0	0
T293	38792	28	0	0
T294	9180	13	0	0
T295	20064	36	0	0
T296	3294	12	0	0
T297	39533	14	0	0
T299	10753	19	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	599	0	0
T101	41556	70	0	0
T103	8512	12	0	0
T251	3835	11	0	0
T262	2720	3	0	0
T293	38792	29	0	0
T294	9180	14	0	0
T295	20064	69	0	0
T296	3294	7	0	0
T297	39533	42	0	0
T299	10753	4	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	563	0	0
T101	41556	47	0	0
T103	8512	11	0	0
T251	3835	2	0	0
T262	2720	4	0	0
T293	38792	33	0	0
T294	9180	9	0	0
T295	20064	18	0	0
T296	3294	16	0	0
T297	39533	23	0	0
T299	10753	29	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	679	0	0
T101	41556	85	0	0
T103	8512	10	0	0
T251	3835	11	0	0
T262	2720	6	0	0
T293	38792	48	0	0
T294	9180	6	0	0
T295	20064	51	0	0
T297	39533	63	0	0
T298	39893	86	0	0
T299	10753	16	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1474	0	0
T101	41556	136	0	0
T103	8512	58	0	0
T251	3835	34	0	0
T262	2720	1	0	0
T293	38792	78	0	0
T294	9180	35	0	0
T295	20064	69	0	0
T296	3294	1	0	0
T297	39533	98	0	0
T299	10753	21	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1337	0	0
T101	41556	121	0	0
T103	8512	7	0	0
T262	2720	5	0	0
T293	38792	16	0	0
T294	9180	12	0	0
T295	20064	49	0	0
T296	3294	9	0	0
T297	39533	183	0	0
T298	39893	141	0	0
T299	10753	28	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1307	0	0
T101	41556	120	0	0
T103	8512	33	0	0
T251	3835	27	0	0
T262	2720	6	0	0
T293	38792	92	0	0
T294	9180	48	0	0
T295	20064	7	0	0
T296	3294	29	0	0
T297	39533	115	0	0
T299	10753	24	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1204	0	0
T101	41556	123	0	0
T103	8512	13	0	0
T251	3835	21	0	0
T293	38792	83	0	0
T294	9180	50	0	0
T295	20064	24	0	0
T296	3294	37	0	0
T297	39533	69	0	0
T298	39893	188	0	0
T299	10753	15	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1550	0	0
T101	41556	175	0	0
T103	8512	25	0	0
T251	3835	44	0	0
T262	2720	6	0	0
T293	38792	117	0	0
T294	9180	32	0	0
T295	20064	41	0	0
T296	3294	9	0	0
T297	39533	97	0	0
T299	10753	9	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1347	0	0
T101	41556	152	0	0
T103	8512	17	0	0
T251	3835	2	0	0
T262	2720	1	0	0
T293	38792	101	0	0
T294	9180	46	0	0
T295	20064	36	0	0
T296	3294	7	0	0
T297	39533	109	0	0
T298	39893	198	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1311	0	0
T101	41556	127	0	0
T103	8512	9	0	0
T251	3835	42	0	0
T262	2720	8	0	0
T293	38792	123	0	0
T294	9180	11	0	0
T295	20064	23	0	0
T296	3294	31	0	0
T297	39533	110	0	0
T299	10753	19	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	1039	0	0
T101	41556	151	0	0
T103	8512	7	0	0
T251	3835	33	0	0
T262	2720	3	0	0
T293	38792	42	0	0
T294	9180	42	0	0
T295	20064	39	0	0
T296	3294	9	0	0
T297	39533	95	0	0
T299	10753	21	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	174	0	0
T103	8512	5	0	0
T262	2720	9	0	0
T294	9180	9	0	0
T295	20064	42	0	0
T299	10753	24	0	0
T300	9941	50	0	0
T301	2969	1	0	0
T302	8458	4	0	0
T303	9524	6	0	0
T304	5761	8	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	367	0	0
T101	41556	41	0	0
T103	8512	6	0	0
T262	2720	2	0	0
T293	38792	42	0	0
T294	9180	12	0	0
T296	3294	3	0	0
T297	39533	19	0	0
T298	39893	34	0	0
T299	10753	29	0	0
T305	6505	10	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	464	0	0
T101	41556	37	0	0
T103	8512	19	0	0
T251	3835	3	0	0
T262	2720	2	0	0
T293	38792	10	0	0
T294	9180	13	0	0
T295	20064	52	0	0
T296	3294	8	0	0
T297	39533	19	0	0
T299	10753	31	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	455	0	0
T101	41556	40	0	0
T103	8512	12	0	0
T251	3835	6	0	0
T262	2720	3	0	0
T293	38792	10	0	0
T294	9180	8	0	0
T295	20064	48	0	0
T297	39533	30	0	0
T298	39893	36	0	0
T299	10753	32	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	360	0	0
T101	41556	56	0	0
T103	8512	17	0	0
T251	3835	1	0	0
T262	2720	6	0	0
T293	38792	20	0	0
T294	9180	19	0	0
T295	20064	3	0	0
T297	39533	4	0	0
T298	39893	38	0	0
T299	10753	19	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	459	0	0
T101	41556	26	0	0
T103	8512	13	0	0
T251	3835	2	0	0
T262	2720	9	0	0
T293	38792	27	0	0
T294	9180	6	0	0
T295	20064	53	0	0
T296	3294	9	0	0
T297	39533	20	0	0
T299	10753	44	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	417	0	0
T101	41556	32	0	0
T103	8512	3	0	0
T251	3835	6	0	0
T262	2720	1	0	0
T293	38792	5	0	0
T294	9180	8	0	0
T295	20064	50	0	0
T297	39533	28	0	0
T298	39893	35	0	0
T299	10753	39	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	348	0	0
T101	41556	38	0	0
T103	8512	7	0	0
T251	3835	5	0	0
T293	38792	13	0	0
T294	9180	15	0	0
T295	20064	48	0	0
T297	39533	13	0	0
T298	39893	42	0	0
T299	10753	9	0	0
T300	9941	4	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	471	0	0
T101	41556	50	0	0
T103	8512	6	0	0
T251	3835	6	0	0
T293	38792	35	0	0
T294	9180	4	0	0
T295	20064	77	0	0
T296	3294	8	0	0
T297	39533	16	0	0
T298	39893	45	0	0
T299	10753	23	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	401511809	470	0	0
T101	41556	43	0	0
T103	8512	12	0	0
T251	3835	9	0	0
T262	2720	4	0	0
T293	38792	30	0	0
T294	9180	12	0	0
T295	20064	39	0	0
T297	39533	30	0	0
T298	39893	53	0	0
T299	10753	13	0	0