Unified Coverage Report :: Group :: tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

Group : tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_17/flash_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_cov_0/flash_ctrl_phy_cov_if.sv

---

Summary for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	99	0	99	100.00

Variables for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
read_interval	99	0	99	100.00	100	1	1	0

Summary for Variable read_interval

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	99	0	99	100.00

User Defined Bins for read_interval

Excluded/Illegal bins

NAME	COUNT	STATUS
others	5465862	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
duration[1]	395700	1		T8	5		T11	6		T12	51
duration[2]	888854	1		T1	44		T8	192		T9	5
duration[3]	117670	1		T8	6		T11	7		T12	6
duration[4]	1208053	1		T1	80		T3	63		T5	4
duration[5]	65334	1		T8	11		T31	1		T12	7
duration[6]	423297	1		T3	106		T5	3		T8	12
duration[7]	46398	1		T8	14		T30	3		T52	12
duration[8]	24200	1		T8	11		T25	1		T22	32
duration[9]	30024	1		T8	18		T31	2		T52	16
duration[10]	17319	1		T8	17		T22	32		T30	1
duration[11]	18293	1		T8	12		T30	1		T52	6
duration[12]	16527	1		T8	9		T52	5		T104	18
duration[13]	11623	1		T8	7		T48	2		T52	3
duration[14]	12190	1		T8	6		T52	3		T104	14
duration[15]	9851	1		T8	10		T52	7		T104	5
duration[16]	9310	1		T8	3		T52	5		T104	9
duration[17]	10205	1		T1	2		T3	2		T8	4
duration[18]	7907	1		T8	4		T48	3		T52	6
duration[19]	9049	1		T1	4		T3	7		T8	3
duration[20]	9331	1		T8	6		T31	1		T25	2
duration[21]	8636	1		T1	2		T3	10		T31	1
duration[22]	8925	1		T25	2		T30	62		T67	120
duration[23]	6106	1		T1	3		T3	7		T31	1
duration[24]	7036	1		T3	1		T8	1		T31	1
duration[25]	5594	1		T1	3		T3	6		T31	1
duration[26]	6469	1		T3	1		T31	1		T25	1
duration[27]	3206	1		T1	2		T3	3		T25	3
duration[28]	2860	1		T3	1		T68	3		T54	6
duration[29]	3995	1		T1	2		T31	1		T25	3
duration[30]	2407	1		T3	1		T67	4		T48	14
duration[31]	2455	1		T1	3		T67	11		T48	5
duration[32]	2231	1		T1	1		T67	15		T48	2
duration[33]	2909	1		T1	3		T25	2		T30	15
duration[34]	4065	1		T67	31		T48	1		T68	51
duration[35]	1799	1		T1	2		T25	1		T48	1
duration[36]	1832	1		T1	1		T25	2		T48	14
duration[37]	2363	1		T1	3		T25	1		T104	32
duration[38]	1391	1		T1	1		T25	3		T48	1
duration[39]	1870	1		T1	4		T25	2		T48	7
duration[40]	1561	1		T25	5		T104	31		T68	2
duration[41]	2466	1		T1	5		T48	1		T43	278
duration[42]	18500	1		T1	1		T31	1		T25	5
duration[43]	823	1		T48	1		T240	1		T81	2
duration[44]	274	1		T25	3		T81	2		T90	1
duration[45]	249	1		T25	1		T68	1		T81	2
duration[46]	1846	1		T55	1		T81	1		T262	2
duration[47]	185	1		T1	1		T55	1		T59	1
duration[48]	1506	1		T48	1		T55	2		T125	2
duration[49]	236	1		T1	1		T55	1		T54	3
duration[50]	161185	1		T48	4		T125	2		T60	2
duration[51]	255432	1		T1	1		T31	1		T48	4
duration[52]	18799	1		T54	2		T125	5		T60	12
duration[53]	207748	1		T1	1		T54	3		T125	2
duration[54]	9542	1		T12	1		T48	1		T68	1
duration[55]	8274	1		T1	2		T12	2		T30	1
duration[56]	1176	1		T55	1		T68	1		T54	7
duration[57]	4842	1		T55	1		T32	2		T54	119
duration[58]	3001	1		T12	3		T55	1		T68	1
duration[59]	1279	1		T1	1		T55	1		T54	5
duration[60]	2107	1		T55	2		T54	52		T125	11
duration[61]	1982	1		T1	1		T48	1		T55	1
duration[62]	1220	1		T30	1		T55	2		T54	8
duration[63]	2621	1		T1	1		T55	1		T54	23
duration[64]	2750	1		T25	1		T30	2		T54	8
duration[65]	1334	1		T1	1		T55	1		T54	1
duration[66]	4001	1		T25	1		T30	1		T48	1
duration[67]	1199	1		T1	1		T55	2		T54	7
duration[68]	3888	1		T30	1		T48	1		T59	1
duration[69]	830	1		T1	1		T55	3		T54	11
duration[70]	1676	1		T30	2		T48	1		T55	1
duration[71]	569	1		T1	3		T55	1		T54	4
duration[72]	7554	1		T55	1		T54	7		T60	2
duration[73]	400	1		T1	1		T55	1		T54	3
duration[74]	1635	1		T55	1		T59	1		T54	3
duration[75]	298	1		T1	1		T55	2		T54	4
duration[76]	1089	1		T55	1		T54	7		T60	1
duration[77]	230	1		T1	1		T55	1		T125	2
duration[78]	299	1		T55	1		T68	1		T54	2
duration[79]	224	1		T1	1		T55	2		T54	2
duration[80]	1682	1		T55	1		T68	1		T59	1
duration[81]	178	1		T1	1		T48	1		T55	1
duration[82]	149	1		T68	2		T90	1		T223	1
duration[83]	114	1		T1	1		T48	1		T282	1
duration[84]	151	1		T48	1		T55	2		T54	1
duration[85]	117	1		T1	1		T319	2		T413	1
duration[86]	91	1		T55	2		T90	1		T464	4
duration[87]	90	1		T1	2		T55	2		T223	1
duration[88]	98	1		T5	1		T55	2		T223	1
duration[89]	77	1		T48	1		T55	4		T54	1
duration[90]	97	1		T54	1		T90	1		T262	1
duration[91]	82	1		T90	1		T262	1		T255	1
duration[92]	90	1		T1	1		T3	1		T55	2
duration[93]	118	1		T11	1		T12	1		T30	1
duration[94]	166	1		T31	1		T55	2		T104	1
duration[95]	74	1		T55	2		T68	1		T465	1
duration[96]	76	1		T61	1		T103	1		T80	1
duration[97]	74	1		T55	2		T59	1		T39	1
duration[98]	85	1		T55	3		T57	4		T202	1
duration[99]	76	1		T55	2		T90	1		T262	1