Line Coverage for Module :
flash_ctrl_info_cfg ( parameter Bank=0,InfoSel=0,gen_info_priv[0].CurAddr=0,gen_info_priv[1].CurAddr=1,gen_info_priv[2].CurAddr=2,gen_info_priv[3].CurAddr=3,gen_info_priv[4].CurAddr=4,gen_info_priv[5].CurAddr=5,gen_info_priv[6].CurAddr=6,gen_info_priv[7].CurAddr=7,gen_info_priv[8].CurAddr=8,gen_info_priv[9].CurAddr=9 )
Line Coverage for Module self-instances :
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 14 | 100.00 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 103 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 107 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 111 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 116 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 1/1 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
Tests: T1 T2 T3
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 1/1 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
Tests: T1 T2 T3
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 1/1 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
Tests: T1 T2 T3
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 1/1 assign unused_cfgs = cfgs_i[i];
Tests: T1 T2 T3
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 7/7 assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3
Line Coverage for Module :
flash_ctrl_info_cfg ( parameter Bank=0,InfoSel=1,gen_info_priv[0].CurAddr=512,gen_info_priv[1].CurAddr=513,gen_info_priv[2].CurAddr=514,gen_info_priv[3].CurAddr=515,gen_info_priv[4].CurAddr=516,gen_info_priv[5].CurAddr=517,gen_info_priv[6].CurAddr=518,gen_info_priv[7].CurAddr=519,gen_info_priv[8].CurAddr=520,gen_info_priv[9].CurAddr=521 + Bank=1,InfoSel=1,gen_info_priv[0].CurAddr=768,gen_info_priv[1].CurAddr=769,gen_info_priv[2].CurAddr=770,gen_info_priv[3].CurAddr=771,gen_info_priv[4].CurAddr=772,gen_info_priv[5].CurAddr=773,gen_info_priv[6].CurAddr=774,gen_info_priv[7].CurAddr=775,gen_info_priv[8].CurAddr=776,gen_info_priv[9].CurAddr=777 )
Line Coverage for Module self-instances :
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 5 | 35.71 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 127 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 0/8 ==> assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 assign unused_cfgs = cfgs_i[i];
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 1/2 ==> assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3
121 end
122 end
123
124 // if bank does not contain seed pages, tie off the privilege signals
125 if (SeedBank != Bank || SeedInfoSel != InfoSel) begin : gen_tieoffs
126 info_page_cfg_t unused_pg_cfg;
127 1/1 assign unused_pg_cfg = creator_seed_qual^owner_seed_qual^isolate_qual;
Tests: T1 T2 T3
Line Coverage for Module :
flash_ctrl_info_cfg ( parameter Bank=0,InfoSel=2,gen_info_priv[0].CurAddr=1024,gen_info_priv[1].CurAddr=1025,gen_info_priv[2].CurAddr=1026,gen_info_priv[3].CurAddr=1027,gen_info_priv[4].CurAddr=1028,gen_info_priv[5].CurAddr=1029,gen_info_priv[6].CurAddr=1030,gen_info_priv[7].CurAddr=1031,gen_info_priv[8].CurAddr=1032,gen_info_priv[9].CurAddr=1033 + Bank=1,InfoSel=2,gen_info_priv[0].CurAddr=1280,gen_info_priv[1].CurAddr=1281,gen_info_priv[2].CurAddr=1282,gen_info_priv[3].CurAddr=1283,gen_info_priv[4].CurAddr=1284,gen_info_priv[5].CurAddr=1285,gen_info_priv[6].CurAddr=1286,gen_info_priv[7].CurAddr=1287,gen_info_priv[8].CurAddr=1288,gen_info_priv[9].CurAddr=1289 )
Line Coverage for Module self-instances :
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 6 | 42.86 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 127 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 0/7 ==> assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 assign unused_cfgs = cfgs_i[i];
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 2/3 ==> assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3 | T1 T2 T3
121 end
122 end
123
124 // if bank does not contain seed pages, tie off the privilege signals
125 if (SeedBank != Bank || SeedInfoSel != InfoSel) begin : gen_tieoffs
126 info_page_cfg_t unused_pg_cfg;
127 1/1 assign unused_pg_cfg = creator_seed_qual^owner_seed_qual^isolate_qual;
Tests: T1 T2 T3
Line Coverage for Module :
flash_ctrl_info_cfg ( parameter Bank=1,InfoSel=0,gen_info_priv[0].CurAddr=256,gen_info_priv[1].CurAddr=257,gen_info_priv[2].CurAddr=258,gen_info_priv[3].CurAddr=259,gen_info_priv[4].CurAddr=260,gen_info_priv[5].CurAddr=261,gen_info_priv[6].CurAddr=262,gen_info_priv[7].CurAddr=263,gen_info_priv[8].CurAddr=264,gen_info_priv[9].CurAddr=265 )
Line Coverage for Module self-instances :
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 14 | 100.00 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 127 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 assign unused_cfgs = cfgs_i[i];
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 10/10 assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3
121 end
122 end
123
124 // if bank does not contain seed pages, tie off the privilege signals
125 if (SeedBank != Bank || SeedInfoSel != InfoSel) begin : gen_tieoffs
126 info_page_cfg_t unused_pg_cfg;
127 1/1 assign unused_pg_cfg = creator_seed_qual^owner_seed_qual^isolate_qual;
Tests: T1 T2 T3
Assert Coverage for Module :
flash_ctrl_info_cfg
Assertion Details
InfoNoBiggerThanData_A
| Name | Attempts | Real Successes | Failures | Incomplete |
| Total |
6312 |
6312 |
0 |
0 |
| T1 |
6 |
6 |
0 |
0 |
| T2 |
6 |
6 |
0 |
0 |
| T3 |
6 |
6 |
0 |
0 |
| T4 |
6 |
6 |
0 |
0 |
| T10 |
6 |
6 |
0 |
0 |
| T11 |
6 |
6 |
0 |
0 |
| T12 |
6 |
6 |
0 |
0 |
| T17 |
6 |
6 |
0 |
0 |
| T18 |
6 |
6 |
0 |
0 |
| T19 |
6 |
6 |
0 |
0 |
Line Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[0].gen_info_priv_type[1].u_info_cfg
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 5 | 35.71 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 127 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 0/8 ==> assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 assign unused_cfgs = cfgs_i[i];
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 1/2 ==> assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3
121 end
122 end
123
124 // if bank does not contain seed pages, tie off the privilege signals
125 if (SeedBank != Bank || SeedInfoSel != InfoSel) begin : gen_tieoffs
126 info_page_cfg_t unused_pg_cfg;
127 1/1 assign unused_pg_cfg = creator_seed_qual^owner_seed_qual^isolate_qual;
Tests: T1 T2 T3
Assert Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[0].gen_info_priv_type[1].u_info_cfg
Assertion Details
InfoNoBiggerThanData_A
| Name | Attempts | Real Successes | Failures | Incomplete |
| Total |
1052 |
1052 |
0 |
0 |
| T1 |
1 |
1 |
0 |
0 |
| T2 |
1 |
1 |
0 |
0 |
| T3 |
1 |
1 |
0 |
0 |
| T4 |
1 |
1 |
0 |
0 |
| T10 |
1 |
1 |
0 |
0 |
| T11 |
1 |
1 |
0 |
0 |
| T12 |
1 |
1 |
0 |
0 |
| T17 |
1 |
1 |
0 |
0 |
| T18 |
1 |
1 |
0 |
0 |
| T19 |
1 |
1 |
0 |
0 |
Line Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[1].gen_info_priv_type[1].u_info_cfg
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 5 | 35.71 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 127 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 0/8 ==> assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 assign unused_cfgs = cfgs_i[i];
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 1/2 ==> assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3
121 end
122 end
123
124 // if bank does not contain seed pages, tie off the privilege signals
125 if (SeedBank != Bank || SeedInfoSel != InfoSel) begin : gen_tieoffs
126 info_page_cfg_t unused_pg_cfg;
127 1/1 assign unused_pg_cfg = creator_seed_qual^owner_seed_qual^isolate_qual;
Tests: T1 T2 T3
Assert Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[1].gen_info_priv_type[1].u_info_cfg
Assertion Details
InfoNoBiggerThanData_A
| Name | Attempts | Real Successes | Failures | Incomplete |
| Total |
1052 |
1052 |
0 |
0 |
| T1 |
1 |
1 |
0 |
0 |
| T2 |
1 |
1 |
0 |
0 |
| T3 |
1 |
1 |
0 |
0 |
| T4 |
1 |
1 |
0 |
0 |
| T10 |
1 |
1 |
0 |
0 |
| T11 |
1 |
1 |
0 |
0 |
| T12 |
1 |
1 |
0 |
0 |
| T17 |
1 |
1 |
0 |
0 |
| T18 |
1 |
1 |
0 |
0 |
| T19 |
1 |
1 |
0 |
0 |
Line Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[0].gen_info_priv_type[2].u_info_cfg
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 6 | 42.86 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 127 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 0/7 ==> assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 assign unused_cfgs = cfgs_i[i];
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 2/3 ==> assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3 | T1 T2 T3
121 end
122 end
123
124 // if bank does not contain seed pages, tie off the privilege signals
125 if (SeedBank != Bank || SeedInfoSel != InfoSel) begin : gen_tieoffs
126 info_page_cfg_t unused_pg_cfg;
127 1/1 assign unused_pg_cfg = creator_seed_qual^owner_seed_qual^isolate_qual;
Tests: T1 T2 T3
Assert Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[0].gen_info_priv_type[2].u_info_cfg
Assertion Details
InfoNoBiggerThanData_A
| Name | Attempts | Real Successes | Failures | Incomplete |
| Total |
1052 |
1052 |
0 |
0 |
| T1 |
1 |
1 |
0 |
0 |
| T2 |
1 |
1 |
0 |
0 |
| T3 |
1 |
1 |
0 |
0 |
| T4 |
1 |
1 |
0 |
0 |
| T10 |
1 |
1 |
0 |
0 |
| T11 |
1 |
1 |
0 |
0 |
| T12 |
1 |
1 |
0 |
0 |
| T17 |
1 |
1 |
0 |
0 |
| T18 |
1 |
1 |
0 |
0 |
| T19 |
1 |
1 |
0 |
0 |
Line Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[1].gen_info_priv_type[2].u_info_cfg
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 6 | 42.86 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 99 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 127 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 0/7 ==> assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 assign unused_cfgs = cfgs_i[i];
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 2/3 ==> assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3 | T1 T2 T3
121 end
122 end
123
124 // if bank does not contain seed pages, tie off the privilege signals
125 if (SeedBank != Bank || SeedInfoSel != InfoSel) begin : gen_tieoffs
126 info_page_cfg_t unused_pg_cfg;
127 1/1 assign unused_pg_cfg = creator_seed_qual^owner_seed_qual^isolate_qual;
Tests: T1 T2 T3
Assert Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[1].gen_info_priv_type[2].u_info_cfg
Assertion Details
InfoNoBiggerThanData_A
| Name | Attempts | Real Successes | Failures | Incomplete |
| Total |
1052 |
1052 |
0 |
0 |
| T1 |
1 |
1 |
0 |
0 |
| T2 |
1 |
1 |
0 |
0 |
| T3 |
1 |
1 |
0 |
0 |
| T4 |
1 |
1 |
0 |
0 |
| T10 |
1 |
1 |
0 |
0 |
| T11 |
1 |
1 |
0 |
0 |
| T12 |
1 |
1 |
0 |
0 |
| T17 |
1 |
1 |
0 |
0 |
| T18 |
1 |
1 |
0 |
0 |
| T19 |
1 |
1 |
0 |
0 |
Line Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[0].gen_info_priv_type[0].u_info_cfg
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 14 | 100.00 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 103 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 107 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 111 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 116 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 1/1 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
Tests: T1 T2 T3
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 1/1 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
Tests: T1 T2 T3
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 1/1 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
Tests: T1 T2 T3
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 1/1 assign unused_cfgs = cfgs_i[i];
Tests: T1 T2 T3
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 7/7 assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3
Assert Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[0].gen_info_priv_type[0].u_info_cfg
Assertion Details
InfoNoBiggerThanData_A
| Name | Attempts | Real Successes | Failures | Incomplete |
| Total |
1052 |
1052 |
0 |
0 |
| T1 |
1 |
1 |
0 |
0 |
| T2 |
1 |
1 |
0 |
0 |
| T3 |
1 |
1 |
0 |
0 |
| T4 |
1 |
1 |
0 |
0 |
| T10 |
1 |
1 |
0 |
0 |
| T11 |
1 |
1 |
0 |
0 |
| T12 |
1 |
1 |
0 |
0 |
| T17 |
1 |
1 |
0 |
0 |
| T18 |
1 |
1 |
0 |
0 |
| T19 |
1 |
1 |
0 |
0 |
Line Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[1].gen_info_priv_type[0].u_info_cfg
| Line No. | Total | Covered | Percent |
|---|
| TOTAL | | 14 | 14 | 100.00 |
| CONT_ASSIGN | 52 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 62 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 72 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 120 | 1 | 1 | 100.00 |
| CONT_ASSIGN | 127 | 1 | 1 | 100.00 |
51
52 1/1 assign creator_seed_qual = '{
Tests: T1 T2 T3
53 en: creator_en,
54 rd_en: creator_en,
55 prog_en: creator_en,
56 erase_en: creator_en,
57 scramble_en: MuBi4True,
58 ecc_en: MuBi4True,
59 he_en : MuBi4True
60 };
61
62 1/1 assign owner_seed_qual = '{
Tests: T1 T2 T3
63 en: owner_en,
64 rd_en: owner_en,
65 prog_en: owner_en,
66 erase_en: owner_en,
67 scramble_en: MuBi4True,
68 ecc_en: MuBi4True,
69 he_en : MuBi4True
70 };
71
72 1/1 assign isolate_qual = '{
Tests: T1 T2 T3
73 en: MuBi4True,
74 rd_en: mubi4_bool_to_mubi(iso_flash_rd_en_i),
75 prog_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
76 erase_en: mubi4_bool_to_mubi(iso_flash_wr_en_i),
77 scramble_en: MuBi4True,
78 ecc_en: MuBi4True,
79 he_en : MuBi4True
80 };
81
82 // The code below uses page_addr_t to represent a page inside an Info partition, but a page_addr_t
83 // is really designed a page inside a Data partition (the "addr" field has width BankW + PageW,
84 // not BankW + InfoPageW). This will work just fine so long as InfoPageW <= PageW, but we should
85 // check that's always true.
86 `ASSERT_INIT(InfoNoBiggerThanData_A, InfoPageW <= PageW)
87
88 for (genvar i = 0; i < InfosPerBank; i++) begin : gen_info_priv
89
90 localparam logic [InfoPageW-1:0] CurPage = i;
91 localparam page_addr_t CurAddr = '{sel: InfoSel, addr: {Bank, PageW'(CurPage)}};
92
93 if (i > InfoTypeSize[InfoSel]) begin : gen_invalid_region
94 assign cfgs_o[i] = CfgInfoDisable;
95
96 // For info types that have fewer pages than the maximum, not the full config (cfgs_i[i] for i
97 // greater than InfoTypeSize[InfoSel]) is used.
98 info_page_cfg_t unused_cfgs;
99 assign unused_cfgs = cfgs_i[i];
100
101 // if match creator, only allow access when creator privilege is set
102 end else if (CurAddr == SeedInfoPageSel[CreatorSeedIdx]) begin : gen_creator
103 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], creator_seed_qual);
104
105 // if match owner, only allow access when owner privilege is set
106 end else if (CurAddr == SeedInfoPageSel[OwnerSeedIdx]) begin : gen_owner
107 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], owner_seed_qual);
108
109 // if match isolated partition, only allow read when provision privilege is set
110 end else if (CurAddr == IsolatedPageSel) begin : gen_isolated_page
111 assign cfgs_o[i] = info_cfg_qual(cfgs_i[i], isolate_qual);
112
113 // since certain fields will always be 0'd out based on mubi values,
114 // the software input will look like it is unused to lint
115 info_page_cfg_t unused_cfgs;
116 assign unused_cfgs = cfgs_i[i];
117
118 // if other, just passthrough configuration
119 end else begin : gen_normal
120 10/10 assign cfgs_o[i] = cfgs_i[i];
Tests: T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3 | T1 T2 T3
121 end
122 end
123
124 // if bank does not contain seed pages, tie off the privilege signals
125 if (SeedBank != Bank || SeedInfoSel != InfoSel) begin : gen_tieoffs
126 info_page_cfg_t unused_pg_cfg;
127 1/1 assign unused_pg_cfg = creator_seed_qual^owner_seed_qual^isolate_qual;
Tests: T1 T2 T3
Assert Coverage for Instance : tb.dut.u_region_cfg.gen_info_priv_bank[1].gen_info_priv_type[0].u_info_cfg
Assertion Details
InfoNoBiggerThanData_A
| Name | Attempts | Real Successes | Failures | Incomplete |
| Total |
1052 |
1052 |
0 |
0 |
| T1 |
1 |
1 |
0 |
0 |
| T2 |
1 |
1 |
0 |
0 |
| T3 |
1 |
1 |
0 |
0 |
| T4 |
1 |
1 |
0 |
0 |
| T10 |
1 |
1 |
0 |
0 |
| T11 |
1 |
1 |
0 |
0 |
| T12 |
1 |
1 |
0 |
0 |
| T17 |
1 |
1 |
0 |
0 |
| T18 |
1 |
1 |
0 |
0 |
| T19 |
1 |
1 |
0 |
0 |