Unified Coverage Report :: Module :: flash_ctrl_core_csr_assert_fpv

Module : flash_ctrl_core_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_11/flash_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_flash_ctrl_csr_assert_0/flash_ctrl_core_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.flash_ctrl_core_csr_assert	100.00						100.00

---

Module Instance : tb.dut.flash_ctrl_core_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.69	97.12	93.60	98.44		100.00	84.29	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : flash_ctrl_core_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	87	87	100.00	87	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	87	87	100.00	87	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	391419083	4570	0	0
addr_rd_A	391419083	1298	0	0
bank0_info0_page_cfg_0_rd_A	391419083	2542	0	0
bank0_info0_page_cfg_1_rd_A	391419083	2666	0	0
bank0_info0_page_cfg_2_rd_A	391419083	2488	0	0
bank0_info0_page_cfg_3_rd_A	391419083	2334	0	0
bank0_info0_page_cfg_4_rd_A	391419083	2434	0	0
bank0_info0_page_cfg_5_rd_A	391419083	2770	0	0
bank0_info0_page_cfg_6_rd_A	391419083	2655	0	0
bank0_info0_page_cfg_7_rd_A	391419083	2517	0	0
bank0_info0_page_cfg_8_rd_A	391419083	2382	0	0
bank0_info0_page_cfg_9_rd_A	391419083	2841	0	0
bank0_info0_regwen_0_rd_A	391419083	1394	0	0
bank0_info0_regwen_1_rd_A	391419083	1423	0	0
bank0_info0_regwen_2_rd_A	391419083	1410	0	0
bank0_info0_regwen_3_rd_A	391419083	1427	0	0
bank0_info0_regwen_4_rd_A	391419083	1348	0	0
bank0_info0_regwen_5_rd_A	391419083	1343	0	0
bank0_info0_regwen_6_rd_A	391419083	1184	0	0
bank0_info0_regwen_7_rd_A	391419083	1469	0	0
bank0_info0_regwen_8_rd_A	391419083	1332	0	0
bank0_info0_regwen_9_rd_A	391419083	1278	0	0
bank0_info1_page_cfg_rd_A	391419083	2475	0	0
bank0_info1_regwen_rd_A	391419083	1298	0	0
bank0_info2_page_cfg_0_rd_A	391419083	2536	0	0
bank0_info2_page_cfg_1_rd_A	391419083	2765	0	0
bank0_info2_regwen_0_rd_A	391419083	1458	0	0
bank0_info2_regwen_1_rd_A	391419083	1333	0	0
bank1_info0_page_cfg_0_rd_A	391419083	2699	0	0
bank1_info0_page_cfg_1_rd_A	391419083	2374	0	0
bank1_info0_page_cfg_2_rd_A	391419083	2253	0	0
bank1_info0_page_cfg_3_rd_A	391419083	2656	0	0
bank1_info0_page_cfg_4_rd_A	391419083	2437	0	0
bank1_info0_page_cfg_5_rd_A	391419083	2432	0	0
bank1_info0_page_cfg_6_rd_A	391419083	2358	0	0
bank1_info0_page_cfg_7_rd_A	391419083	2714	0	0
bank1_info0_page_cfg_8_rd_A	391419083	2551	0	0
bank1_info0_page_cfg_9_rd_A	391419083	2712	0	0
bank1_info0_regwen_0_rd_A	391419083	1346	0	0
bank1_info0_regwen_1_rd_A	391419083	1379	0	0
bank1_info0_regwen_2_rd_A	391419083	1262	0	0
bank1_info0_regwen_3_rd_A	391419083	1185	0	0
bank1_info0_regwen_4_rd_A	391419083	1323	0	0
bank1_info0_regwen_5_rd_A	391419083	1335	0	0
bank1_info0_regwen_6_rd_A	391419083	1482	0	0
bank1_info0_regwen_7_rd_A	391419083	1413	0	0
bank1_info0_regwen_8_rd_A	391419083	1541	0	0
bank1_info0_regwen_9_rd_A	391419083	1467	0	0
bank1_info1_page_cfg_rd_A	391419083	2517	0	0
bank1_info1_regwen_rd_A	391419083	1370	0	0
bank1_info2_page_cfg_0_rd_A	391419083	2452	0	0
bank1_info2_page_cfg_1_rd_A	391419083	2380	0	0
bank1_info2_regwen_0_rd_A	391419083	1323	0	0
bank1_info2_regwen_1_rd_A	391419083	1294	0	0
bank_cfg_regwen_rd_A	391419083	1363	0	0
default_region_rd_A	391419083	2459	0	0
exec_rd_A	391419083	1388	0	0
fifo_lvl_rd_A	391419083	1646	0	0
fifo_rst_rd_A	391419083	1361	0	0
hw_info_cfg_override_rd_A	391419083	1625	0	0
intr_enable_rd_A	391419083	2479	0	0
mp_region_0_rd_A	391419083	1660	0	0
mp_region_1_rd_A	391419083	1604	0	0
mp_region_2_rd_A	391419083	1517	0	0
mp_region_3_rd_A	391419083	1636	0	0
mp_region_4_rd_A	391419083	1359	0	0
mp_region_5_rd_A	391419083	1580	0	0
mp_region_6_rd_A	391419083	1806	0	0
mp_region_7_rd_A	391419083	1586	0	0
mp_region_cfg_0_rd_A	391419083	2608	0	0
mp_region_cfg_1_rd_A	391419083	2589	0	0
mp_region_cfg_2_rd_A	391419083	2533	0	0
mp_region_cfg_3_rd_A	391419083	2725	0	0
mp_region_cfg_4_rd_A	391419083	2567	0	0
mp_region_cfg_5_rd_A	391419083	2750	0	0
mp_region_cfg_6_rd_A	391419083	2645	0	0
mp_region_cfg_7_rd_A	391419083	2469	0	0
phy_alert_cfg_rd_A	391419083	191	0	0
region_cfg_regwen_0_rd_A	391419083	1351	0	0
region_cfg_regwen_1_rd_A	391419083	1379	0	0
region_cfg_regwen_2_rd_A	391419083	1379	0	0
region_cfg_regwen_3_rd_A	391419083	1239	0	0
region_cfg_regwen_4_rd_A	391419083	1350	0	0
region_cfg_regwen_5_rd_A	391419083	1269	0	0
region_cfg_regwen_6_rd_A	391419083	1384	0	0
region_cfg_regwen_7_rd_A	391419083	1476	0	0
scratch_rd_A	391419083	1425	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	4570	0	0
T76	2814	27	0	0
T129	3527	152	0	0
T130	3826	8	0	0
T131	3136	24	0	0
T132	4715	345	0	0
T223	5438	337	0	0
T224	5556	237	0	0
T225	2131	2	0	0
T226	5345	313	0	0
T227	4152	4	0	0

addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1298	0	0
T75	6235	7	0	0
T281	5235	11	0	0
T282	6130	2	0	0
T283	5672	3	0	0
T284	9529	16	0	0
T285	292020	267	0	0
T286	4292	10	0	0
T287	18735	20	0	0
T288	3644	3	0	0
T289	19719	58	0	0

bank0_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2542	0	0
T75	6235	67	0	0
T235	5585	21	0	0
T281	5235	6	0	0
T282	6130	11	0	0
T283	5672	16	0	0
T284	9529	13	0	0
T285	292020	266	0	0
T286	4292	13	0	0
T287	18735	32	0	0
T288	3644	10	0	0

bank0_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2666	0	0
T75	6235	26	0	0
T235	5585	21	0	0
T281	5235	4	0	0
T282	6130	25	0	0
T283	5672	9	0	0
T284	9529	42	0	0
T285	292020	290	0	0
T286	4292	4	0	0
T287	18735	29	0	0
T290	5733	8	0	0

bank0_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2488	0	0
T75	6235	24	0	0
T235	5585	33	0	0
T281	5235	7	0	0
T282	6130	3	0	0
T283	5672	13	0	0
T284	9529	62	0	0
T285	292020	227	0	0
T287	18735	60	0	0
T288	3644	19	0	0
T290	5733	6	0	0

bank0_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2334	0	0
T75	6235	39	0	0
T235	5585	7	0	0
T281	5235	7	0	0
T282	6130	28	0	0
T283	5672	35	0	0
T284	9529	36	0	0
T285	292020	221	0	0
T286	4292	2	0	0
T287	18735	38	0	0
T290	5733	10	0	0

bank0_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2434	0	0
T75	6235	17	0	0
T235	5585	6	0	0
T281	5235	14	0	0
T282	6130	30	0	0
T283	5672	10	0	0
T284	9529	8	0	0
T285	292020	244	0	0
T286	4292	2	0	0
T287	18735	48	0	0
T290	5733	9	0	0

bank0_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2770	0	0
T75	6235	21	0	0
T235	5585	19	0	0
T281	5235	6	0	0
T282	6130	21	0	0
T283	5672	25	0	0
T284	9529	46	0	0
T285	292020	259	0	0
T286	4292	17	0	0
T287	18735	7	0	0
T290	5733	16	0	0

bank0_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2655	0	0
T75	6235	35	0	0
T235	5585	5	0	0
T281	5235	5	0	0
T282	6130	2	0	0
T283	5672	16	0	0
T284	9529	36	0	0
T285	292020	228	0	0
T286	4292	1	0	0
T287	18735	54	0	0
T290	5733	35	0	0

bank0_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2517	0	0
T75	6235	9	0	0
T235	5585	8	0	0
T281	5235	6	0	0
T282	6130	15	0	0
T283	5672	11	0	0
T284	9529	61	0	0
T285	292020	248	0	0
T286	4292	3	0	0
T287	18735	37	0	0
T290	5733	41	0	0

bank0_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2382	0	0
T75	6235	10	0	0
T281	5235	13	0	0
T282	6130	6	0	0
T283	5672	33	0	0
T284	9529	19	0	0
T285	292020	201	0	0
T286	4292	3	0	0
T287	18735	41	0	0
T288	3644	14	0	0
T290	5733	3	0	0

bank0_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2841	0	0
T75	6235	19	0	0
T235	5585	18	0	0
T281	5235	10	0	0
T282	6130	18	0	0
T283	5672	35	0	0
T284	9529	52	0	0
T285	292020	274	0	0
T287	18735	39	0	0
T288	3644	17	0	0
T290	5733	3	0	0

bank0_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1394	0	0
T75	6235	9	0	0
T235	5585	1	0	0
T281	5235	6	0	0
T282	6130	8	0	0
T283	5672	10	0	0
T284	9529	14	0	0
T285	292020	230	0	0
T287	18735	67	0	0
T288	3644	4	0	0
T289	19719	34	0	0

bank0_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1423	0	0
T75	6235	2	0	0
T235	5585	6	0	0
T281	5235	1	0	0
T282	6130	9	0	0
T283	5672	2	0	0
T284	9529	10	0	0
T285	292020	227	0	0
T286	4292	16	0	0
T287	18735	65	0	0
T290	5733	13	0	0

bank0_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1410	0	0
T75	6235	5	0	0
T235	5585	2	0	0
T258	5287	13	0	0
T281	5235	3	0	0
T283	5672	1	0	0
T284	9529	16	0	0
T285	292020	264	0	0
T286	4292	9	0	0
T287	18735	36	0	0
T288	3644	6	0	0

bank0_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1427	0	0
T75	6235	2	0	0
T235	5585	2	0	0
T281	5235	5	0	0
T283	5672	10	0	0
T284	9529	23	0	0
T285	292020	249	0	0
T286	4292	1	0	0
T287	18735	65	0	0
T288	3644	3	0	0
T290	5733	17	0	0

bank0_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1348	0	0
T75	6235	10	0	0
T235	5585	5	0	0
T258	5287	3	0	0
T281	5235	12	0	0
T282	6130	5	0	0
T283	5672	10	0	0
T284	9529	15	0	0
T285	292020	222	0	0
T286	4292	4	0	0
T287	18735	48	0	0

bank0_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1343	0	0
T75	6235	8	0	0
T258	5287	3	0	0
T281	5235	12	0	0
T282	6130	2	0	0
T283	5672	10	0	0
T284	9529	19	0	0
T285	292020	248	0	0
T286	4292	4	0	0
T287	18735	74	0	0
T290	5733	1	0	0

bank0_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1184	0	0
T75	6235	1	0	0
T235	5585	1	0	0
T281	5235	12	0	0
T283	5672	14	0	0
T284	9529	10	0	0
T285	292020	177	0	0
T286	4292	5	0	0
T287	18735	15	0	0
T288	3644	4	0	0
T290	5733	5	0	0

bank0_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1469	0	0
T75	6235	1	0	0
T235	5585	8	0	0
T281	5235	3	0	0
T282	6130	13	0	0
T283	5672	17	0	0
T284	9529	15	0	0
T285	292020	342	0	0
T287	18735	51	0	0
T288	3644	3	0	0
T289	19719	54	0	0

bank0_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1332	0	0
T75	6235	13	0	0
T281	5235	17	0	0
T283	5672	7	0	0
T284	9529	18	0	0
T285	292020	266	0	0
T286	4292	9	0	0
T287	18735	2	0	0
T288	3644	5	0	0
T289	19719	39	0	0
T290	5733	5	0	0

bank0_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1278	0	0
T75	6235	2	0	0
T281	5235	15	0	0
T282	6130	3	0	0
T283	5672	8	0	0
T284	9529	13	0	0
T285	292020	262	0	0
T287	18735	12	0	0
T288	3644	3	0	0
T289	19719	28	0	0
T290	5733	3	0	0

bank0_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2475	0	0
T75	6235	20	0	0
T281	5235	10	0	0
T282	6130	1	0	0
T283	5672	32	0	0
T284	9529	47	0	0
T285	292020	229	0	0
T286	4292	2	0	0
T287	18735	40	0	0
T288	3644	25	0	0
T290	5733	31	0	0

bank0_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1298	0	0
T75	6235	13	0	0
T235	5585	3	0	0
T258	5287	8	0	0
T281	5235	13	0	0
T282	6130	1	0	0
T283	5672	10	0	0
T284	9529	15	0	0
T285	292020	255	0	0
T287	18735	21	0	0
T290	5733	8	0	0

bank0_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2536	0	0
T75	6235	8	0	0
T235	5585	18	0	0
T281	5235	7	0	0
T282	6130	19	0	0
T283	5672	2	0	0
T284	9529	34	0	0
T285	292020	288	0	0
T286	4292	7	0	0
T287	18735	54	0	0
T290	5733	15	0	0

bank0_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2765	0	0
T75	6235	11	0	0
T235	5585	15	0	0
T281	5235	11	0	0
T282	6130	13	0	0
T283	5672	29	0	0
T284	9529	34	0	0
T285	292020	273	0	0
T286	4292	7	0	0
T287	18735	44	0	0
T290	5733	4	0	0

bank0_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1458	0	0
T235	5585	11	0	0
T258	5287	7	0	0
T281	5235	11	0	0
T282	6130	3	0	0
T283	5672	7	0	0
T284	9529	15	0	0
T285	292020	308	0	0
T287	18735	25	0	0
T288	3644	4	0	0
T290	5733	8	0	0

bank0_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1333	0	0
T75	6235	8	0	0
T281	5235	7	0	0
T282	6130	9	0	0
T283	5672	14	0	0
T284	9529	25	0	0
T285	292020	247	0	0
T286	4292	7	0	0
T287	18735	23	0	0
T288	3644	4	0	0
T290	5733	6	0	0

bank1_info0_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2699	0	0
T75	6235	15	0	0
T235	5585	4	0	0
T281	5235	8	0	0
T282	6130	14	0	0
T283	5672	13	0	0
T284	9529	52	0	0
T285	292020	305	0	0
T286	4292	1	0	0
T287	18735	83	0	0
T290	5733	7	0	0

bank1_info0_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2374	0	0
T75	6235	2	0	0
T235	5585	5	0	0
T281	5235	7	0	0
T282	6130	14	0	0
T283	5672	6	0	0
T284	9529	20	0	0
T285	292020	263	0	0
T287	18735	33	0	0
T288	3644	5	0	0
T290	5733	11	0	0

bank1_info0_page_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2253	0	0
T75	6235	3	0	0
T235	5585	14	0	0
T281	5235	11	0	0
T282	6130	18	0	0
T283	5672	43	0	0
T284	9529	17	0	0
T285	292020	261	0	0
T287	18735	7	0	0
T288	3644	26	0	0
T290	5733	2	0	0

bank1_info0_page_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2656	0	0
T75	6235	6	0	0
T235	5585	10	0	0
T281	5235	5	0	0
T282	6130	12	0	0
T283	5672	39	0	0
T284	9529	48	0	0
T285	292020	275	0	0
T286	4292	4	0	0
T287	18735	29	0	0
T290	5733	26	0	0

bank1_info0_page_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2437	0	0
T75	6235	11	0	0
T235	5585	37	0	0
T281	5235	3	0	0
T282	6130	7	0	0
T283	5672	11	0	0
T284	9529	70	0	0
T285	292020	272	0	0
T286	4292	8	0	0
T287	18735	7	0	0
T290	5733	8	0	0

bank1_info0_page_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2432	0	0
T75	6235	23	0	0
T235	5585	9	0	0
T281	5235	11	0	0
T282	6130	3	0	0
T283	5672	8	0	0
T284	9529	25	0	0
T285	292020	276	0	0
T287	18735	49	0	0
T288	3644	6	0	0
T290	5733	9	0	0

bank1_info0_page_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2358	0	0
T75	6235	3	0	0
T235	5585	8	0	0
T281	5235	17	0	0
T282	6130	16	0	0
T283	5672	37	0	0
T284	9529	31	0	0
T285	292020	294	0	0
T286	4292	10	0	0
T287	18735	22	0	0
T290	5733	24	0	0

bank1_info0_page_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2714	0	0
T75	6235	26	0	0
T235	5585	10	0	0
T281	5235	13	0	0
T282	6130	26	0	0
T283	5672	41	0	0
T284	9529	62	0	0
T285	292020	265	0	0
T286	4292	5	0	0
T287	18735	34	0	0
T290	5733	4	0	0

bank1_info0_page_cfg_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2551	0	0
T75	6235	27	0	0
T235	5585	29	0	0
T281	5235	11	0	0
T282	6130	4	0	0
T283	5672	20	0	0
T284	9529	54	0	0
T285	292020	290	0	0
T286	4292	5	0	0
T287	18735	47	0	0
T290	5733	28	0	0

bank1_info0_page_cfg_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2712	0	0
T75	6235	8	0	0
T258	5287	1	0	0
T281	5235	8	0	0
T282	6130	13	0	0
T283	5672	40	0	0
T284	9529	48	0	0
T285	292020	271	0	0
T287	18735	78	0	0
T288	3644	27	0	0
T290	5733	4	0	0

bank1_info0_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1346	0	0
T75	6235	4	0	0
T235	5585	4	0	0
T258	5287	2	0	0
T281	5235	12	0	0
T283	5672	2	0	0
T284	9529	9	0	0
T285	292020	271	0	0
T287	18735	11	0	0
T289	19719	51	0	0
T291	5437	2	0	0

bank1_info0_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1379	0	0
T75	6235	3	0	0
T235	5585	5	0	0
T281	5235	9	0	0
T282	6130	2	0	0
T283	5672	10	0	0
T284	9529	13	0	0
T285	292020	242	0	0
T286	4292	1	0	0
T287	18735	1	0	0
T289	19719	55	0	0

bank1_info0_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1262	0	0
T75	6235	7	0	0
T235	5585	5	0	0
T258	5287	5	0	0
T281	5235	1	0	0
T283	5672	13	0	0
T284	9529	22	0	0
T285	292020	298	0	0
T286	4292	5	0	0
T287	18735	36	0	0
T290	5733	1	0	0

bank1_info0_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1185	0	0
T75	6235	6	0	0
T235	5585	8	0	0
T258	5287	9	0	0
T281	5235	7	0	0
T283	5672	5	0	0
T284	9529	13	0	0
T285	292020	235	0	0
T287	18735	23	0	0
T289	19719	31	0	0
T290	5733	5	0	0

bank1_info0_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1323	0	0
T75	6235	7	0	0
T281	5235	10	0	0
T282	6130	1	0	0
T283	5672	9	0	0
T284	9529	21	0	0
T285	292020	263	0	0
T286	4292	5	0	0
T287	18735	55	0	0
T289	19719	15	0	0
T292	309204	520	0	0

bank1_info0_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1335	0	0
T235	5585	6	0	0
T258	5287	2	0	0
T281	5235	9	0	0
T282	6130	3	0	0
T283	5672	12	0	0
T284	9529	7	0	0
T285	292020	276	0	0
T286	4292	12	0	0
T287	18735	59	0	0
T289	19719	19	0	0

bank1_info0_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1482	0	0
T235	5585	5	0	0
T258	5287	11	0	0
T281	5235	9	0	0
T282	6130	13	0	0
T283	5672	11	0	0
T284	9529	19	0	0
T285	292020	299	0	0
T287	18735	67	0	0
T288	3644	9	0	0
T290	5733	2	0	0

bank1_info0_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1413	0	0
T235	5585	3	0	0
T258	5287	8	0	0
T281	5235	7	0	0
T283	5672	4	0	0
T284	9529	20	0	0
T285	292020	231	0	0
T286	4292	1	0	0
T287	18735	19	0	0
T289	19719	61	0	0
T290	5733	14	0	0

bank1_info0_regwen_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1541	0	0
T75	6235	3	0	0
T258	5287	1	0	0
T281	5235	14	0	0
T282	6130	9	0	0
T283	5672	12	0	0
T284	9529	15	0	0
T285	292020	330	0	0
T286	4292	6	0	0
T287	18735	48	0	0
T290	5733	5	0	0

bank1_info0_regwen_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1467	0	0
T75	6235	5	0	0
T281	5235	10	0	0
T282	6130	12	0	0
T283	5672	6	0	0
T284	9529	23	0	0
T285	292020	354	0	0
T286	4292	9	0	0
T287	18735	44	0	0
T289	19719	45	0	0
T290	5733	6	0	0

bank1_info1_page_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2517	0	0
T75	6235	29	0	0
T235	5585	3	0	0
T281	5235	2	0	0
T282	6130	4	0	0
T283	5672	36	0	0
T284	9529	66	0	0
T285	292020	227	0	0
T286	4292	9	0	0
T287	18735	91	0	0
T290	5733	17	0	0

bank1_info1_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1370	0	0
T258	5287	2	0	0
T281	5235	3	0	0
T282	6130	2	0	0
T283	5672	14	0	0
T284	9529	22	0	0
T285	292020	247	0	0
T287	18735	46	0	0
T288	3644	1	0	0
T289	19719	68	0	0
T290	5733	14	0	0

bank1_info2_page_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2452	0	0
T235	5585	9	0	0
T258	5287	19	0	0
T281	5235	4	0	0
T282	6130	8	0	0
T283	5672	40	0	0
T284	9529	33	0	0
T285	292020	262	0	0
T286	4292	9	0	0
T287	18735	57	0	0
T290	5733	29	0	0

bank1_info2_page_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2380	0	0
T235	5585	50	0	0
T258	5287	1	0	0
T281	5235	6	0	0
T282	6130	10	0	0
T283	5672	39	0	0
T284	9529	23	0	0
T285	292020	223	0	0
T286	4292	5	0	0
T287	18735	30	0	0
T290	5733	23	0	0

bank1_info2_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1323	0	0
T235	5585	18	0	0
T258	5287	2	0	0
T281	5235	10	0	0
T282	6130	5	0	0
T283	5672	3	0	0
T284	9529	15	0	0
T285	292020	253	0	0
T286	4292	1	0	0
T287	18735	49	0	0
T288	3644	8	0	0

bank1_info2_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1294	0	0
T75	6235	13	0	0
T281	5235	8	0	0
T282	6130	4	0	0
T283	5672	14	0	0
T284	9529	10	0	0
T285	292020	223	0	0
T286	4292	9	0	0
T287	18735	7	0	0
T288	3644	4	0	0
T290	5733	13	0	0

bank_cfg_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1363	0	0
T235	5585	3	0	0
T258	5287	5	0	0
T281	5235	6	0	0
T283	5672	4	0	0
T284	9529	20	0	0
T285	292020	288	0	0
T286	4292	5	0	0
T287	18735	37	0	0
T289	19719	30	0	0
T290	5733	9	0	0

default_region_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2459	0	0
T75	6235	11	0	0
T258	5287	9	0	0
T281	5235	4	0	0
T282	6130	12	0	0
T283	5672	8	0	0
T284	9529	31	0	0
T285	292020	339	0	0
T287	18735	26	0	0
T289	19719	20	0	0
T290	5733	16	0	0

exec_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1388	0	0
T75	6235	4	0	0
T235	5585	5	0	0
T281	5235	8	0	0
T282	6130	6	0	0
T283	5672	11	0	0
T284	9529	24	0	0
T285	292020	293	0	0
T287	18735	39	0	0
T288	3644	1	0	0
T290	5733	10	0	0

fifo_lvl_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1646	0	0
T75	6235	2	0	0
T258	5287	14	0	0
T281	5235	8	0	0
T282	6130	6	0	0
T283	5672	18	0	0
T284	9529	22	0	0
T285	292020	319	0	0
T287	18735	40	0	0
T288	3644	16	0	0
T289	19719	26	0	0

fifo_rst_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1361	0	0
T75	6235	9	0	0
T235	5585	4	0	0
T281	5235	2	0	0
T282	6130	3	0	0
T283	5672	2	0	0
T284	9529	21	0	0
T285	292020	275	0	0
T287	18735	46	0	0
T288	3644	9	0	0
T290	5733	3	0	0

hw_info_cfg_override_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1625	0	0
T75	6235	1	0	0
T235	5585	9	0	0
T281	5235	9	0	0
T282	6130	20	0	0
T283	5672	8	0	0
T284	9529	24	0	0
T285	292020	262	0	0
T286	4292	2	0	0
T287	18735	69	0	0
T290	5733	10	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2479	0	0
T75	6235	4	0	0
T235	5585	9	0	0
T281	5235	8	0	0
T282	6130	6	0	0
T283	5672	14	0	0
T284	9529	18	0	0
T285	292020	275	0	0
T286	4292	12	0	0
T287	18735	33	0	0
T290	5733	24	0	0

mp_region_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1660	0	0
T75	6235	5	0	0
T235	5585	12	0	0
T281	5235	9	0	0
T282	6130	14	0	0
T283	5672	14	0	0
T284	9529	19	0	0
T285	292020	260	0	0
T286	4292	4	0	0
T287	18735	58	0	0
T290	5733	6	0	0

mp_region_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1604	0	0
T75	6235	3	0	0
T235	5585	6	0	0
T281	5235	1	0	0
T283	5672	4	0	0
T284	9529	28	0	0
T285	292020	267	0	0
T286	4292	10	0	0
T287	18735	66	0	0
T288	3644	3	0	0
T290	5733	4	0	0

mp_region_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1517	0	0
T258	5287	1	0	0
T283	5672	18	0	0
T284	9529	5	0	0
T285	292020	281	0	0
T286	4292	9	0	0
T287	18735	17	0	0
T288	3644	7	0	0
T289	19719	24	0	0
T290	5733	8	0	0
T291	5437	16	0	0

mp_region_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1636	0	0
T75	6235	6	0	0
T235	5585	2	0	0
T281	5235	7	0	0
T282	6130	2	0	0
T283	5672	14	0	0
T284	9529	21	0	0
T285	292020	274	0	0
T286	4292	7	0	0
T287	18735	51	0	0
T290	5733	6	0	0

mp_region_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1359	0	0
T235	5585	5	0	0
T281	5235	16	0	0
T282	6130	1	0	0
T283	5672	1	0	0
T284	9529	14	0	0
T285	292020	287	0	0
T286	4292	6	0	0
T287	18735	16	0	0
T289	19719	42	0	0
T290	5733	3	0	0

mp_region_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1580	0	0
T75	6235	1	0	0
T235	5585	7	0	0
T258	5287	4	0	0
T281	5235	6	0	0
T282	6130	9	0	0
T283	5672	11	0	0
T284	9529	22	0	0
T285	292020	258	0	0
T287	18735	16	0	0
T289	19719	26	0	0

mp_region_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1806	0	0
T75	6235	10	0	0
T235	5585	4	0	0
T281	5235	8	0	0
T282	6130	9	0	0
T283	5672	8	0	0
T284	9529	28	0	0
T285	292020	328	0	0
T286	4292	4	0	0
T287	18735	44	0	0
T290	5733	10	0	0

mp_region_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1586	0	0
T75	6235	17	0	0
T235	5585	9	0	0
T281	5235	10	0	0
T282	6130	1	0	0
T283	5672	4	0	0
T284	9529	8	0	0
T285	292020	295	0	0
T286	4292	2	0	0
T287	18735	43	0	0
T290	5733	16	0	0

mp_region_cfg_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2608	0	0
T75	6235	3	0	0
T235	5585	11	0	0
T281	5235	13	0	0
T282	6130	17	0	0
T283	5672	10	0	0
T284	9529	61	0	0
T285	292020	322	0	0
T286	4292	10	0	0
T287	18735	53	0	0
T290	5733	14	0	0

mp_region_cfg_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2589	0	0
T75	6235	8	0	0
T235	5585	16	0	0
T281	5235	7	0	0
T282	6130	17	0	0
T283	5672	16	0	0
T284	9529	43	0	0
T285	292020	231	0	0
T286	4292	3	0	0
T287	18735	26	0	0
T290	5733	24	0	0

mp_region_cfg_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2533	0	0
T75	6235	2	0	0
T235	5585	20	0	0
T281	5235	11	0	0
T282	6130	6	0	0
T283	5672	33	0	0
T284	9529	42	0	0
T285	292020	210	0	0
T287	18735	48	0	0
T288	3644	24	0	0
T290	5733	14	0	0

mp_region_cfg_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2725	0	0
T235	5585	26	0	0
T281	5235	14	0	0
T282	6130	23	0	0
T283	5672	30	0	0
T284	9529	49	0	0
T285	292020	232	0	0
T286	4292	7	0	0
T287	18735	97	0	0
T288	3644	5	0	0
T290	5733	4	0	0

mp_region_cfg_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2567	0	0
T75	6235	3	0	0
T235	5585	8	0	0
T258	5287	16	0	0
T282	6130	19	0	0
T283	5672	10	0	0
T284	9529	74	0	0
T285	292020	289	0	0
T286	4292	8	0	0
T287	18735	61	0	0
T290	5733	13	0	0

mp_region_cfg_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2750	0	0
T75	6235	18	0	0
T235	5585	14	0	0
T281	5235	4	0	0
T282	6130	7	0	0
T283	5672	28	0	0
T284	9529	50	0	0
T285	292020	248	0	0
T287	18735	64	0	0
T288	3644	9	0	0
T290	5733	30	0	0

mp_region_cfg_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2645	0	0
T75	6235	17	0	0
T235	5585	12	0	0
T281	5235	6	0	0
T282	6130	15	0	0
T283	5672	35	0	0
T284	9529	44	0	0
T285	292020	258	0	0
T286	4292	6	0	0
T287	18735	48	0	0
T290	5733	8	0	0

mp_region_cfg_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	2469	0	0
T75	6235	29	0	0
T235	5585	12	0	0
T281	5235	7	0	0
T282	6130	60	0	0
T283	5672	13	0	0
T284	9529	14	0	0
T285	292020	266	0	0
T286	4292	2	0	0
T287	18735	8	0	0
T290	5733	21	0	0

phy_alert_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	191	0	0
T258	5287	1	0	0
T281	5235	11	0	0
T284	9529	18	0	0
T286	4292	5	0	0
T287	18735	14	0	0
T289	19719	42	0	0
T291	5437	1	0	0
T293	19626	13	0	0
T294	9919	11	0	0
T295	5243	8	0	0

region_cfg_regwen_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1351	0	0
T75	6235	1	0	0
T281	5235	3	0	0
T282	6130	2	0	0
T283	5672	18	0	0
T284	9529	13	0	0
T285	292020	223	0	0
T286	4292	6	0	0
T287	18735	22	0	0
T288	3644	6	0	0
T290	5733	7	0	0

region_cfg_regwen_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1379	0	0
T281	5235	10	0	0
T282	6130	6	0	0
T283	5672	10	0	0
T284	9529	19	0	0
T285	292020	292	0	0
T286	4292	12	0	0
T287	18735	32	0	0
T289	19719	45	0	0
T290	5733	2	0	0
T291	5437	1	0	0

region_cfg_regwen_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1379	0	0
T235	5585	5	0	0
T258	5287	6	0	0
T281	5235	8	0	0
T282	6130	7	0	0
T283	5672	9	0	0
T284	9529	24	0	0
T285	292020	239	0	0
T287	18735	15	0	0
T288	3644	4	0	0
T290	5733	6	0	0

region_cfg_regwen_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1239	0	0
T75	6235	5	0	0
T235	5585	8	0	0
T281	5235	4	0	0
T283	5672	5	0	0
T284	9529	10	0	0
T285	292020	253	0	0
T286	4292	2	0	0
T287	18735	30	0	0
T288	3644	1	0	0
T290	5733	8	0	0

region_cfg_regwen_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1350	0	0
T235	5585	3	0	0
T281	5235	7	0	0
T282	6130	5	0	0
T283	5672	7	0	0
T284	9529	23	0	0
T285	292020	316	0	0
T287	18735	28	0	0
T288	3644	6	0	0
T289	19719	37	0	0
T291	5437	1	0	0

region_cfg_regwen_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1269	0	0
T75	6235	4	0	0
T235	5585	1	0	0
T281	5235	5	0	0
T282	6130	4	0	0
T283	5672	8	0	0
T284	9529	17	0	0
T285	292020	289	0	0
T287	18735	36	0	0
T289	19719	14	0	0
T291	5437	9	0	0

region_cfg_regwen_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1384	0	0
T75	6235	2	0	0
T258	5287	5	0	0
T282	6130	8	0	0
T283	5672	9	0	0
T284	9529	14	0	0
T285	292020	264	0	0
T287	18735	81	0	0
T289	19719	59	0	0
T290	5733	5	0	0
T291	5437	2	0	0

region_cfg_regwen_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1476	0	0
T75	6235	4	0	0
T235	5585	1	0	0
T258	5287	7	0	0
T281	5235	2	0	0
T283	5672	17	0	0
T284	9529	15	0	0
T285	292020	286	0	0
T287	18735	55	0	0
T288	3644	6	0	0
T290	5733	11	0	0

scratch_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	391419083	1425	0	0
T75	6235	3	0	0
T235	5585	4	0	0
T258	5287	3	0	0
T281	5235	11	0	0
T283	5672	14	0	0
T284	9529	33	0	0
T285	292020	280	0	0
T286	4292	7	0	0
T287	18735	31	0	0
T290	5733	8	0	0