| T288 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_prog_rma_wipe_err.569569625 |
|
|
Oct 15 08:41:36 AM UTC 24 |
Oct 15 08:42:56 AM UTC 24 |
10044830400 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rma_err.3475228348 |
|
|
Oct 15 08:26:47 AM UTC 24 |
Oct 15 08:43:05 AM UTC 24 |
39763190000 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_derr_detect.1752049784 |
|
|
Oct 15 08:39:26 AM UTC 24 |
Oct 15 08:43:18 AM UTC 24 |
3135878300 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_rd.3201830160 |
|
|
Oct 15 08:39:56 AM UTC 24 |
Oct 15 08:43:29 AM UTC 24 |
6557928100 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_stress_all.769675297 |
|
|
Oct 15 08:41:05 AM UTC 24 |
Oct 15 08:43:49 AM UTC 24 |
27695500 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_sec_otp.1362833825 |
|
|
Oct 15 08:41:52 AM UTC 24 |
Oct 15 08:44:05 AM UTC 24 |
6944344400 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_invalid_op.1771815978 |
|
|
Oct 15 08:42:14 AM UTC 24 |
Oct 15 08:44:09 AM UTC 24 |
8994352900 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_integrity.2400903675 |
|
|
Oct 15 08:34:15 AM UTC 24 |
Oct 15 08:44:26 AM UTC 24 |
9200619700 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_prog_reset.2282972762 |
|
|
Oct 15 08:44:11 AM UTC 24 |
Oct 15 08:44:34 AM UTC 24 |
71763600 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_mp_regions.303010459 |
|
|
Oct 15 08:32:04 AM UTC 24 |
Oct 15 08:44:36 AM UTC 24 |
9941253300 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_stress_all.1604132054 |
|
|
Oct 15 08:26:08 AM UTC 24 |
Oct 15 08:44:50 AM UTC 24 |
3197592000 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_hw_rma_reset.3983777343 |
|
|
Oct 15 08:31:48 AM UTC 24 |
Oct 15 08:44:51 AM UTC 24 |
40118513800 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro.3694644022 |
|
|
Oct 15 08:42:39 AM UTC 24 |
Oct 15 08:44:51 AM UTC 24 |
1127182600 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro_serr.1152769520 |
|
|
Oct 15 08:42:42 AM UTC 24 |
Oct 15 08:45:00 AM UTC 24 |
2038671800 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_smoke.1023698945 |
|
|
Oct 15 08:41:44 AM UTC 24 |
Oct 15 08:45:00 AM UTC 24 |
41546700 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_evict.2390663808 |
|
|
Oct 15 08:44:27 AM UTC 24 |
Oct 15 08:45:01 AM UTC 24 |
104141700 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_wo.2310197493 |
|
|
Oct 15 08:42:23 AM UTC 24 |
Oct 15 08:45:05 AM UTC 24 |
7849425400 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro_derr.1254932254 |
|
|
Oct 15 08:42:58 AM UTC 24 |
Oct 15 08:45:09 AM UTC 24 |
7175698600 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_rd.4048186889 |
|
|
Oct 15 08:43:19 AM UTC 24 |
Oct 15 08:45:14 AM UTC 24 |
563140000 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_connect.2209571933 |
|
|
Oct 15 08:44:52 AM UTC 24 |
Oct 15 08:45:15 AM UTC 24 |
54381100 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_evict_all_en.37668058 |
|
|
Oct 15 08:44:35 AM UTC 24 |
Oct 15 08:45:16 AM UTC 24 |
28964600 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_mp_regions.4273798732 |
|
|
Oct 15 08:42:01 AM UTC 24 |
Oct 15 08:45:22 AM UTC 24 |
8090625100 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_read_seed_err.1757887082 |
|
|
Oct 15 08:45:01 AM UTC 24 |
Oct 15 08:45:23 AM UTC 24 |
36637300 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_lcmgr_intg.3730474686 |
|
|
Oct 15 08:45:01 AM UTC 24 |
Oct 15 08:45:25 AM UTC 24 |
15660400 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_alert_test.2687430534 |
|
|
Oct 15 08:45:06 AM UTC 24 |
Oct 15 08:45:26 AM UTC 24 |
70796700 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_derr.1020573141 |
|
|
Oct 15 08:43:05 AM UTC 24 |
Oct 15 08:45:26 AM UTC 24 |
1586536900 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_disable.4219583612 |
|
|
Oct 15 08:44:51 AM UTC 24 |
Oct 15 08:45:30 AM UTC 24 |
22145300 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_wr.3880343108 |
|
|
Oct 15 08:43:30 AM UTC 24 |
Oct 15 08:45:31 AM UTC 24 |
2966136900 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_otp_reset.280103836 |
|
|
Oct 15 08:42:00 AM UTC 24 |
Oct 15 08:45:31 AM UTC 24 |
149722200 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_re_evict.1374990093 |
|
|
Oct 15 08:44:38 AM UTC 24 |
Oct 15 08:45:32 AM UTC 24 |
193166900 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_sec_info_access.3686352681 |
|
|
Oct 15 08:44:52 AM UTC 24 |
Oct 15 08:46:08 AM UTC 24 |
330925500 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_fetch_code.252040956 |
|
|
Oct 15 08:45:26 AM UTC 24 |
Oct 15 08:46:12 AM UTC 24 |
536330100 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_phy_arb.2559989532 |
|
|
Oct 15 08:41:48 AM UTC 24 |
Oct 15 08:46:46 AM UTC 24 |
200467700 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_smoke.3098373860 |
|
|
Oct 15 08:45:10 AM UTC 24 |
Oct 15 08:46:49 AM UTC 24 |
71307900 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_invalid_op.1195354888 |
|
|
Oct 15 08:45:32 AM UTC 24 |
Oct 15 08:47:03 AM UTC 24 |
1744970400 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_stress_all.3862954630 |
|
|
Oct 15 08:30:32 AM UTC 24 |
Oct 15 08:47:13 AM UTC 24 |
636524200 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_wr_slow_flash.3426861724 |
|
|
Oct 15 08:44:05 AM UTC 24 |
Oct 15 08:47:13 AM UTC 24 |
96885214300 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_serr.1423167690 |
|
|
Oct 15 08:42:47 AM UTC 24 |
Oct 15 08:47:21 AM UTC 24 |
2111083100 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_rd_slow_flash.463246206 |
|
|
Oct 15 08:43:49 AM UTC 24 |
Oct 15 08:47:35 AM UTC 24 |
7353496700 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro.1293192751 |
|
|
Oct 15 08:45:33 AM UTC 24 |
Oct 15 08:47:49 AM UTC 24 |
1111870700 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_otp_reset.330310620 |
|
|
Oct 15 08:45:23 AM UTC 24 |
Oct 15 08:47:51 AM UTC 24 |
42960100 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_prog_rma_wipe_err.4286018882 |
|
|
Oct 15 08:45:02 AM UTC 24 |
Oct 15 08:47:58 AM UTC 24 |
10012033700 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_prog_reset.768547632 |
|
|
Oct 15 08:47:49 AM UTC 24 |
Oct 15 08:48:15 AM UTC 24 |
160216000 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_rd_slow_flash.1838616158 |
|
|
Oct 15 08:40:06 AM UTC 24 |
Oct 15 08:48:19 AM UTC 24 |
12717664200 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_sec_otp.221322460 |
|
|
Oct 15 08:45:18 AM UTC 24 |
Oct 15 08:48:25 AM UTC 24 |
6639638600 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_erase_suspend.2460917654 |
|
|
Oct 15 08:36:56 AM UTC 24 |
Oct 15 08:48:30 AM UTC 24 |
33371616400 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro_serr.1271169383 |
|
|
Oct 15 08:46:13 AM UTC 24 |
Oct 15 08:48:39 AM UTC 24 |
2136622500 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro_derr.2633883619 |
|
|
Oct 15 08:46:50 AM UTC 24 |
Oct 15 08:48:39 AM UTC 24 |
483379700 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_wr.175925302 |
|
|
Oct 15 08:47:14 AM UTC 24 |
Oct 15 08:48:50 AM UTC 24 |
10446988600 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_evict.1127924940 |
|
|
Oct 15 08:47:51 AM UTC 24 |
Oct 15 08:48:51 AM UTC 24 |
46159700 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_evict_all_en.1002532424 |
|
|
Oct 15 08:47:59 AM UTC 24 |
Oct 15 08:48:51 AM UTC 24 |
29502300 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_disable.1719709576 |
|
|
Oct 15 08:48:20 AM UTC 24 |
Oct 15 08:48:58 AM UTC 24 |
26190900 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_connect.1817333382 |
|
|
Oct 15 08:48:31 AM UTC 24 |
Oct 15 08:48:58 AM UTC 24 |
16866200 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_lcmgr_intg.3355572567 |
|
|
Oct 15 08:48:40 AM UTC 24 |
Oct 15 08:49:04 AM UTC 24 |
15649500 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_read_seed_err.883505569 |
|
|
Oct 15 08:48:40 AM UTC 24 |
Oct 15 08:49:04 AM UTC 24 |
15502500 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_win.3312230334 |
|
|
Oct 15 08:27:41 AM UTC 24 |
Oct 15 08:49:04 AM UTC 24 |
1905314600 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_re_evict.1701939715 |
|
|
Oct 15 08:48:16 AM UTC 24 |
Oct 15 08:49:06 AM UTC 24 |
118607300 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_wo.3374776260 |
|
|
Oct 15 08:45:32 AM UTC 24 |
Oct 15 08:49:21 AM UTC 24 |
2321271600 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_alert_test.641810457 |
|
|
Oct 15 08:48:51 AM UTC 24 |
Oct 15 08:49:21 AM UTC 24 |
112142300 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_serr.1899237860 |
|
|
Oct 15 08:46:47 AM UTC 24 |
Oct 15 08:49:39 AM UTC 24 |
13388422100 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_sec_info_access.3086341764 |
|
|
Oct 15 08:48:26 AM UTC 24 |
Oct 15 08:49:41 AM UTC 24 |
1642981200 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_fetch_code.210685388 |
|
|
Oct 15 08:49:21 AM UTC 24 |
Oct 15 08:50:08 AM UTC 24 |
2535460700 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_sec_otp.3028104582 |
|
|
Oct 15 08:49:05 AM UTC 24 |
Oct 15 08:50:27 AM UTC 24 |
6044190800 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_prog_rma_wipe_err.3793119703 |
|
|
Oct 15 08:48:51 AM UTC 24 |
Oct 15 08:50:28 AM UTC 24 |
10034638900 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw.2009703713 |
|
|
Oct 15 08:42:39 AM UTC 24 |
Oct 15 08:50:32 AM UTC 24 |
5426722700 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_wr_slow_flash.1413874519 |
|
|
Oct 15 08:47:36 AM UTC 24 |
Oct 15 08:50:38 AM UTC 24 |
89088446200 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_invalid_op.1352967797 |
|
|
Oct 15 08:49:41 AM UTC 24 |
Oct 15 08:50:57 AM UTC 24 |
1557978000 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_prog_win.3429139321 |
|
|
Oct 15 08:32:19 AM UTC 24 |
Oct 15 08:51:07 AM UTC 24 |
807030900 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_rd.163522850 |
|
|
Oct 15 08:47:14 AM UTC 24 |
Oct 15 08:51:14 AM UTC 24 |
10514763400 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_derr.960833590 |
|
|
Oct 15 08:47:05 AM UTC 24 |
Oct 15 08:51:21 AM UTC 24 |
1897807900 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_hw_rma.657150528 |
|
|
Oct 15 08:17:09 AM UTC 24 |
Oct 15 08:51:22 AM UTC 24 |
878870777500 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_phy_arb.1082675348 |
|
|
Oct 15 08:45:15 AM UTC 24 |
Oct 15 08:51:40 AM UTC 24 |
5395309500 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro.2809098156 |
|
|
Oct 15 08:50:28 AM UTC 24 |
Oct 15 08:52:32 AM UTC 24 |
464316700 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_otp_reset.1426656518 |
|
|
Oct 15 08:49:06 AM UTC 24 |
Oct 15 08:52:17 AM UTC 24 |
277712800 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_rd_slow_flash.3811692393 |
|
|
Oct 15 08:47:22 AM UTC 24 |
Oct 15 08:52:29 AM UTC 24 |
49963727300 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_serr.303073883 |
|
|
Oct 15 08:50:33 AM UTC 24 |
Oct 15 08:52:29 AM UTC 24 |
1090876000 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_rma_reset.3978003532 |
|
|
Oct 15 08:37:00 AM UTC 24 |
Oct 15 08:52:35 AM UTC 24 |
160188500000 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr.3366018906 |
|
|
Oct 15 08:51:22 AM UTC 24 |
Oct 15 08:52:57 AM UTC 24 |
2223519600 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_wo.4135668436 |
|
|
Oct 15 08:50:09 AM UTC 24 |
Oct 15 08:53:04 AM UTC 24 |
3894205000 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_smoke.1865494123 |
|
|
Oct 15 08:48:52 AM UTC 24 |
Oct 15 08:53:08 AM UTC 24 |
41677100 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_re_evict.932590746 |
|
|
Oct 15 08:52:33 AM UTC 24 |
Oct 15 08:53:11 AM UTC 24 |
63885700 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_disable.3045588780 |
|
|
Oct 15 08:52:37 AM UTC 24 |
Oct 15 08:53:14 AM UTC 24 |
22088800 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_evict_all_en.2420698567 |
|
|
Oct 15 08:52:29 AM UTC 24 |
Oct 15 08:53:15 AM UTC 24 |
81761000 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_lcmgr_intg.3469031966 |
|
|
Oct 15 08:53:05 AM UTC 24 |
Oct 15 08:53:23 AM UTC 24 |
47703100 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_read_seed_err.605239369 |
|
|
Oct 15 08:53:09 AM UTC 24 |
Oct 15 08:53:33 AM UTC 24 |
15557000 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_connect.3212435933 |
|
|
Oct 15 08:53:02 AM UTC 24 |
Oct 15 08:53:35 AM UTC 24 |
27064900 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_alert_test.554862375 |
|
|
Oct 15 08:53:15 AM UTC 24 |
Oct 15 08:53:39 AM UTC 24 |
156283000 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_derr.827605392 |
|
|
Oct 15 08:50:57 AM UTC 24 |
Oct 15 08:53:41 AM UTC 24 |
621784500 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_serr.3874653086 |
|
|
Oct 15 08:50:39 AM UTC 24 |
Oct 15 08:54:10 AM UTC 24 |
3294221300 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_sec_info_access.3696061122 |
|
|
Oct 15 08:52:58 AM UTC 24 |
Oct 15 08:54:23 AM UTC 24 |
409349200 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd.3732255124 |
|
|
Oct 15 08:51:16 AM UTC 24 |
Oct 15 08:54:27 AM UTC 24 |
9591397600 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw.2449610203 |
|
|
Oct 15 08:46:09 AM UTC 24 |
Oct 15 08:54:35 AM UTC 24 |
8727093400 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_prog_reset.647552596 |
|
|
Oct 15 08:52:17 AM UTC 24 |
Oct 15 08:54:43 AM UTC 24 |
2440169000 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_phy_arb.4083739410 |
|
|
Oct 15 08:53:34 AM UTC 24 |
Oct 15 08:54:48 AM UTC 24 |
105141300 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_prog_rma_wipe_err.867428943 |
|
|
Oct 15 08:53:12 AM UTC 24 |
Oct 15 08:55:07 AM UTC 24 |
10015425200 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_fetch_code.3459880435 |
|
|
Oct 15 08:54:24 AM UTC 24 |
Oct 15 08:55:11 AM UTC 24 |
1534683200 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_derr.3002347780 |
|
|
Oct 15 08:51:09 AM UTC 24 |
Oct 15 08:55:16 AM UTC 24 |
1769249100 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rma_err.784427584 |
|
|
Oct 15 08:31:09 AM UTC 24 |
Oct 15 08:55:56 AM UTC 24 |
89652707000 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_hw_rma.258970022 |
|
|
Oct 15 08:22:52 AM UTC 24 |
Oct 15 08:55:59 AM UTC 24 |
340574452200 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_sec_otp.44303185 |
|
|
Oct 15 08:53:36 AM UTC 24 |
Oct 15 08:56:02 AM UTC 24 |
5278152700 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_invalid_op.946553202 |
|
|
Oct 15 08:54:44 AM UTC 24 |
Oct 15 08:56:25 AM UTC 24 |
2202908100 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_rma_reset.2051934299 |
|
|
Oct 15 08:42:00 AM UTC 24 |
Oct 15 08:56:32 AM UTC 24 |
80140381200 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_mp_regions.1270356747 |
|
|
Oct 15 08:49:07 AM UTC 24 |
Oct 15 08:56:52 AM UTC 24 |
26444729000 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_phy_arb.1549949488 |
|
|
Oct 15 08:48:59 AM UTC 24 |
Oct 15 08:56:57 AM UTC 24 |
385210400 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd_slow_flash.3844058114 |
|
|
Oct 15 08:51:23 AM UTC 24 |
Oct 15 08:56:59 AM UTC 24 |
9873373900 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw.1696328967 |
|
|
Oct 15 08:50:29 AM UTC 24 |
Oct 15 08:57:00 AM UTC 24 |
6160757100 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr_slow_flash.1538481227 |
|
|
Oct 15 08:51:41 AM UTC 24 |
Oct 15 08:57:01 AM UTC 24 |
34696776200 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_prog_win.4182884836 |
|
|
Oct 15 08:42:03 AM UTC 24 |
Oct 15 08:57:12 AM UTC 24 |
311257200 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_smoke.1832129734 |
|
|
Oct 15 08:53:15 AM UTC 24 |
Oct 15 08:57:15 AM UTC 24 |
47690200 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_rma.3951093007 |
|
|
Oct 15 08:27:19 AM UTC 24 |
Oct 15 08:57:15 AM UTC 24 |
167231401100 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_mp_regions.3658770172 |
|
|
Oct 15 08:54:11 AM UTC 24 |
Oct 15 08:57:17 AM UTC 24 |
2083193900 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_otp_reset.2078564359 |
|
|
Oct 15 08:53:42 AM UTC 24 |
Oct 15 08:57:18 AM UTC 24 |
153054500 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_prog_reset.2861229984 |
|
|
Oct 15 08:57:01 AM UTC 24 |
Oct 15 08:57:25 AM UTC 24 |
32985800 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro.2730863485 |
|
|
Oct 15 08:55:08 AM UTC 24 |
Oct 15 08:57:27 AM UTC 24 |
1068183400 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_wo.3635633397 |
|
|
Oct 15 08:54:48 AM UTC 24 |
Oct 15 08:57:31 AM UTC 24 |
3854404700 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_connect.1437846764 |
|
|
Oct 15 08:57:18 AM UTC 24 |
Oct 15 08:57:37 AM UTC 24 |
14177100 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_stress_all.2381443346 |
|
|
Oct 15 08:36:03 AM UTC 24 |
Oct 15 08:57:38 AM UTC 24 |
3316179100 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_read_seed_err.284309867 |
|
|
Oct 15 08:57:26 AM UTC 24 |
Oct 15 08:57:42 AM UTC 24 |
48433800 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_disable.1680750492 |
|
|
Oct 15 08:57:16 AM UTC 24 |
Oct 15 08:57:44 AM UTC 24 |
25925100 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict_all_en.2998282870 |
|
|
Oct 15 08:57:02 AM UTC 24 |
Oct 15 08:57:47 AM UTC 24 |
250446100 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_lcmgr_intg.1732597384 |
|
|
Oct 15 08:57:19 AM UTC 24 |
Oct 15 08:57:47 AM UTC 24 |
26100900 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_serr.4189842455 |
|
|
Oct 15 08:55:17 AM UTC 24 |
Oct 15 08:57:49 AM UTC 24 |
581335600 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict.3255206464 |
|
|
Oct 15 08:57:01 AM UTC 24 |
Oct 15 08:57:57 AM UTC 24 |
120748600 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_alert_test.3504035362 |
|
|
Oct 15 08:57:32 AM UTC 24 |
Oct 15 08:58:00 AM UTC 24 |
265450100 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_re_evict.1562743040 |
|
|
Oct 15 08:57:13 AM UTC 24 |
Oct 15 08:58:05 AM UTC 24 |
189446500 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr.496255540 |
|
|
Oct 15 08:56:33 AM UTC 24 |
Oct 15 08:58:20 AM UTC 24 |
4415802200 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_sec_info_access.174237086 |
|
|
Oct 15 08:57:16 AM UTC 24 |
Oct 15 08:58:20 AM UTC 24 |
2619107200 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_mp_regions.2929481915 |
|
|
Oct 15 08:45:25 AM UTC 24 |
Oct 15 08:58:35 AM UTC 24 |
81589457900 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_fetch_code.1249068295 |
|
|
Oct 15 08:57:59 AM UTC 24 |
Oct 15 08:58:45 AM UTC 24 |
603348400 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_derr.2420520638 |
|
|
Oct 15 08:56:00 AM UTC 24 |
Oct 15 08:58:54 AM UTC 24 |
1307111000 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd.1003852915 |
|
|
Oct 15 08:56:26 AM UTC 24 |
Oct 15 08:58:58 AM UTC 24 |
527703700 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_derr.1459561543 |
|
|
Oct 15 08:56:02 AM UTC 24 |
Oct 15 08:59:18 AM UTC 24 |
1825773600 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_prog_type.2566674135 |
|
|
Oct 15 08:23:27 AM UTC 24 |
Oct 15 08:59:24 AM UTC 24 |
1929817100 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_prog_rma_wipe_err.2264037874 |
|
|
Oct 15 08:57:28 AM UTC 24 |
Oct 15 08:59:37 AM UTC 24 |
10039326500 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_serr.3242559832 |
|
|
Oct 15 08:55:57 AM UTC 24 |
Oct 15 08:59:40 AM UTC 24 |
1459960400 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd_slow_flash.887971465 |
|
|
Oct 15 08:56:53 AM UTC 24 |
Oct 15 08:59:52 AM UTC 24 |
5918977400 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_mp_regions.3356281500 |
|
|
Oct 15 08:57:50 AM UTC 24 |
Oct 15 08:59:54 AM UTC 24 |
1705597800 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_win.4261767535 |
|
|
Oct 15 08:37:26 AM UTC 24 |
Oct 15 09:00:08 AM UTC 24 |
817000400 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_invalid_op.2476218835 |
|
|
Oct 15 08:58:21 AM UTC 24 |
Oct 15 09:00:14 AM UTC 24 |
3493356700 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_rma_reset.3558384484 |
|
|
Oct 15 08:45:23 AM UTC 24 |
Oct 15 09:00:14 AM UTC 24 |
40120836700 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro.1336131464 |
|
|
Oct 15 08:58:37 AM UTC 24 |
Oct 15 09:00:29 AM UTC 24 |
2231040700 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_prog_reset.4100512431 |
|
|
Oct 15 09:00:09 AM UTC 24 |
Oct 15 09:00:34 AM UTC 24 |
92086100 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_otp_reset.753947342 |
|
|
Oct 15 08:57:48 AM UTC 24 |
Oct 15 09:00:38 AM UTC 24 |
78458800 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict_all_en.1145345108 |
|
|
Oct 15 09:00:15 AM UTC 24 |
Oct 15 09:00:50 AM UTC 24 |
31481000 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_disable.1495221078 |
|
|
Oct 15 09:00:35 AM UTC 24 |
Oct 15 09:01:05 AM UTC 24 |
28817100 ps |
| T372 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict.629916761 |
|
|
Oct 15 09:00:15 AM UTC 24 |
Oct 15 09:01:07 AM UTC 24 |
71293000 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_connect.943204756 |
|
|
Oct 15 09:00:50 AM UTC 24 |
Oct 15 09:01:15 AM UTC 24 |
24041800 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_re_evict.3407505349 |
|
|
Oct 15 09:00:30 AM UTC 24 |
Oct 15 09:01:15 AM UTC 24 |
75422900 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr.2771864526 |
|
|
Oct 15 08:59:41 AM UTC 24 |
Oct 15 09:01:15 AM UTC 24 |
4017793900 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr_slow_flash.4019327394 |
|
|
Oct 15 08:56:57 AM UTC 24 |
Oct 15 09:01:25 AM UTC 24 |
44534371000 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_lcmgr_intg.2811520155 |
|
|
Oct 15 09:01:06 AM UTC 24 |
Oct 15 09:01:27 AM UTC 24 |
45619600 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_smoke.4260815087 |
|
|
Oct 15 08:57:37 AM UTC 24 |
Oct 15 09:01:28 AM UTC 24 |
690326600 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_wo.1751949482 |
|
|
Oct 15 08:58:21 AM UTC 24 |
Oct 15 09:01:31 AM UTC 24 |
21203954500 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_derr.1827376721 |
|
|
Oct 15 08:59:19 AM UTC 24 |
Oct 15 09:01:36 AM UTC 24 |
2347731600 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_read_seed_err.3164915259 |
|
|
Oct 15 09:01:07 AM UTC 24 |
Oct 15 09:01:38 AM UTC 24 |
18670000 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_alert_test.4008298094 |
|
|
Oct 15 09:01:16 AM UTC 24 |
Oct 15 09:01:39 AM UTC 24 |
71550600 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_serr.1844905712 |
|
|
Oct 15 08:58:55 AM UTC 24 |
Oct 15 09:01:39 AM UTC 24 |
2567927000 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_sec_otp.1705201180 |
|
|
Oct 15 08:57:44 AM UTC 24 |
Oct 15 09:01:41 AM UTC 24 |
3061673700 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_serr.2881463619 |
|
|
Oct 15 08:58:59 AM UTC 24 |
Oct 15 09:02:28 AM UTC 24 |
1143389800 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_rma_reset.3520816497 |
|
|
Oct 15 08:49:05 AM UTC 24 |
Oct 15 09:02:28 AM UTC 24 |
40127428100 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_sec_info_access.3312578253 |
|
|
Oct 15 09:00:39 AM UTC 24 |
Oct 15 09:02:36 AM UTC 24 |
922410400 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd_slow_flash.1359761470 |
|
|
Oct 15 08:59:53 AM UTC 24 |
Oct 15 09:03:02 AM UTC 24 |
11485880300 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_sec_otp.3596557912 |
|
|
Oct 15 09:01:29 AM UTC 24 |
Oct 15 09:03:02 AM UTC 24 |
2731648500 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_derr.397048670 |
|
|
Oct 15 08:59:25 AM UTC 24 |
Oct 15 09:03:07 AM UTC 24 |
1490910100 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd.3820869838 |
|
|
Oct 15 08:59:38 AM UTC 24 |
Oct 15 09:03:18 AM UTC 24 |
2352970600 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_invalid_op.3336503779 |
|
|
Oct 15 09:01:39 AM UTC 24 |
Oct 15 09:03:27 AM UTC 24 |
3703574900 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_prog_rma_wipe_err.1694395977 |
|
|
Oct 15 09:01:16 AM UTC 24 |
Oct 15 09:03:27 AM UTC 24 |
10018178700 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_prog_reset.2230092649 |
|
|
Oct 15 09:03:02 AM UTC 24 |
Oct 15 09:03:28 AM UTC 24 |
68951600 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_phy_arb.788722403 |
|
|
Oct 15 08:57:42 AM UTC 24 |
Oct 15 09:03:36 AM UTC 24 |
57840000 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_ro.3045261187 |
|
|
Oct 15 09:01:43 AM UTC 24 |
Oct 15 09:03:48 AM UTC 24 |
1265826600 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw_evict.3945794906 |
|
|
Oct 15 09:03:04 AM UTC 24 |
Oct 15 09:03:57 AM UTC 24 |
49758100 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_connect.374202383 |
|
|
Oct 15 09:03:28 AM UTC 24 |
Oct 15 09:03:58 AM UTC 24 |
14625100 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_lcmgr_intg.3729908277 |
|
|
Oct 15 09:03:33 AM UTC 24 |
Oct 15 09:03:58 AM UTC 24 |
27422500 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_read_seed_err.766850900 |
|
|
Oct 15 09:03:37 AM UTC 24 |
Oct 15 09:04:05 AM UTC 24 |
15760200 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw_evict_all_en.1794251067 |
|
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Oct 15 09:03:08 AM UTC 24 |
Oct 15 09:04:06 AM UTC 24 |
102045900 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_re_evict.3291422970 |
|
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Oct 15 09:03:19 AM UTC 24 |
Oct 15 09:04:15 AM UTC 24 |
76357000 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_disable.2523230712 |
|
|
Oct 15 09:03:28 AM UTC 24 |
Oct 15 09:04:15 AM UTC 24 |
11852200 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_alert_test.976658928 |
|
|
Oct 15 09:03:57 AM UTC 24 |
Oct 15 09:04:28 AM UTC 24 |
122966900 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_smoke.2704863759 |
|
|
Oct 15 09:01:17 AM UTC 24 |
Oct 15 09:04:29 AM UTC 24 |
62349300 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr_slow_flash.114693126 |
|
|
Oct 15 08:59:55 AM UTC 24 |
Oct 15 09:04:32 AM UTC 24 |
70765906800 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_intr_rd.2352452391 |
|
|
Oct 15 09:02:29 AM UTC 24 |
Oct 15 09:04:40 AM UTC 24 |
2807714700 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw.3049269361 |
|
|
Oct 15 08:55:13 AM UTC 24 |
Oct 15 09:04:57 AM UTC 24 |
17353725100 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_otp_reset.4143362461 |
|
|
Oct 15 09:01:37 AM UTC 24 |
Oct 15 09:05:01 AM UTC 24 |
41163100 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_intr_rd_slow_flash.4281558607 |
|
|
Oct 15 09:02:37 AM UTC 24 |
Oct 15 09:05:01 AM UTC 24 |
13658192800 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_sec_info_access.2127034463 |
|
|
Oct 15 09:03:28 AM UTC 24 |
Oct 15 09:05:15 AM UTC 24 |
8948831500 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_invalid_op.1638044009 |
|
|
Oct 15 09:04:30 AM UTC 24 |
Oct 15 09:05:34 AM UTC 24 |
7851665100 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rand_ops.4059437984 |
|
|
Oct 15 08:45:14 AM UTC 24 |
Oct 15 09:05:34 AM UTC 24 |
4731886200 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_prog_reset.3169333551 |
|
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Oct 15 09:05:16 AM UTC 24 |
Oct 15 09:05:41 AM UTC 24 |
37742700 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_sec_otp.2113982757 |
|
|
Oct 15 09:04:07 AM UTC 24 |
Oct 15 09:05:47 AM UTC 24 |
22249320900 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_smoke.1162086800 |
|
|
Oct 15 09:03:59 AM UTC 24 |
Oct 15 09:05:49 AM UTC 24 |
33176100 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_wo.874793484 |
|
|
Oct 15 09:01:40 AM UTC 24 |
Oct 15 09:05:51 AM UTC 24 |
11327411100 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_prog_rma_wipe_err.4160156641 |
|
|
Oct 15 09:03:48 AM UTC 24 |
Oct 15 09:06:09 AM UTC 24 |
10020729400 ps |
| T129 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_disable.4202594417 |
|
|
Oct 15 09:05:48 AM UTC 24 |
Oct 15 09:06:15 AM UTC 24 |
22016800 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_connect.3980417336 |
|
|
Oct 15 09:05:52 AM UTC 24 |
Oct 15 09:06:20 AM UTC 24 |
47825300 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw_evict_all_en.296841417 |
|
|
Oct 15 09:05:35 AM UTC 24 |
Oct 15 09:06:23 AM UTC 24 |
56047700 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_ro.2012586202 |
|
|
Oct 15 09:04:41 AM UTC 24 |
Oct 15 09:06:25 AM UTC 24 |
1048463600 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw_evict.3118783048 |
|
|
Oct 15 09:05:35 AM UTC 24 |
Oct 15 09:06:28 AM UTC 24 |
72676800 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_lcmgr_intg.3807353625 |
|
|
Oct 15 09:06:10 AM UTC 24 |
Oct 15 09:06:34 AM UTC 24 |
37385100 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_re_evict.322610826 |
|
|
Oct 15 09:05:42 AM UTC 24 |
Oct 15 09:06:38 AM UTC 24 |
238186400 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_read_seed_err.1594159660 |
|
|
Oct 15 09:06:15 AM UTC 24 |
Oct 15 09:06:40 AM UTC 24 |
15479200 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_mp_regions.3333241714 |
|
|
Oct 15 09:04:28 AM UTC 24 |
Oct 15 09:06:40 AM UTC 24 |
7443925700 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_alert_test.2769446545 |
|
|
Oct 15 09:06:24 AM UTC 24 |
Oct 15 09:06:46 AM UTC 24 |
143780100 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw.672388769 |
|
|
Oct 15 08:58:45 AM UTC 24 |
Oct 15 09:06:51 AM UTC 24 |
4154039700 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_prog_win.2775261624 |
|
|
Oct 15 08:49:22 AM UTC 24 |
Oct 15 09:06:51 AM UTC 24 |
1196275600 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_rma_reset.2561125865 |
|
|
Oct 15 08:53:40 AM UTC 24 |
Oct 15 09:06:56 AM UTC 24 |
160186282500 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_sec_info_access.2886886820 |
|
|
Oct 15 09:05:50 AM UTC 24 |
Oct 15 09:07:19 AM UTC 24 |
4005448200 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_wo.1499267879 |
|
|
Oct 15 09:04:33 AM UTC 24 |
Oct 15 09:07:22 AM UTC 24 |
29227497500 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rand_ops.1521396444 |
|
|
Oct 15 09:03:59 AM UTC 24 |
Oct 15 09:07:43 AM UTC 24 |
88363500 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_otp_reset.1640369584 |
|
|
Oct 15 09:04:16 AM UTC 24 |
Oct 15 09:07:50 AM UTC 24 |
161047500 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rand_ops.3448930709 |
|
|
Oct 15 08:53:24 AM UTC 24 |
Oct 15 09:07:51 AM UTC 24 |
6855499500 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_smoke.1452351296 |
|
|
Oct 15 09:06:25 AM UTC 24 |
Oct 15 09:07:53 AM UTC 24 |
38208200 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_error_mp.3570350211 |
|
|
Oct 15 08:18:03 AM UTC 24 |
Oct 15 09:08:03 AM UTC 24 |
11268962300 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_intr_rd.1815754016 |
|
|
Oct 15 09:05:02 AM UTC 24 |
Oct 15 09:08:03 AM UTC 24 |
6892142300 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_prog_rma_wipe_err.242298783 |
|
|
Oct 15 09:06:21 AM UTC 24 |
Oct 15 09:08:15 AM UTC 24 |
10019832100 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_invalid_op.3724060555 |
|
|
Oct 15 09:06:52 AM UTC 24 |
Oct 15 09:08:26 AM UTC 24 |
871907200 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw_evict.1295177760 |
|
|
Oct 15 09:07:52 AM UTC 24 |
Oct 15 09:08:30 AM UTC 24 |
68715700 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rand_ops.3906945350 |
|
|
Oct 15 08:48:59 AM UTC 24 |
Oct 15 09:08:30 AM UTC 24 |
3312114900 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_disable.2613468936 |
|
|
Oct 15 09:08:04 AM UTC 24 |
Oct 15 09:08:40 AM UTC 24 |
11474300 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_prog_win.1189246812 |
|
|
Oct 15 08:45:27 AM UTC 24 |
Oct 15 09:08:48 AM UTC 24 |
3262666900 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_connect.3993911550 |
|
|
Oct 15 09:08:27 AM UTC 24 |
Oct 15 09:08:49 AM UTC 24 |
44400100 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_read_seed_err.1176936423 |
|
|
Oct 15 09:08:30 AM UTC 24 |
Oct 15 09:08:54 AM UTC 24 |
133542300 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_re_evict.2301117946 |
|
|
Oct 15 09:08:03 AM UTC 24 |
Oct 15 09:08:55 AM UTC 24 |
100940100 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_lcmgr_intg.1413103993 |
|
|
Oct 15 09:08:29 AM UTC 24 |
Oct 15 09:08:58 AM UTC 24 |
15366900 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_alert_test.3001233437 |
|
|
Oct 15 09:08:41 AM UTC 24 |
Oct 15 09:09:01 AM UTC 24 |
46668900 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_mp.3124069172 |
|
|
Oct 15 08:23:36 AM UTC 24 |
Oct 15 09:09:02 AM UTC 24 |
51719184700 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_mp_regions.3356011405 |
|
|
Oct 15 09:01:39 AM UTC 24 |
Oct 15 09:09:13 AM UTC 24 |
14352280100 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_otp_reset.2802214016 |
|
|
Oct 15 09:06:41 AM UTC 24 |
Oct 15 09:09:14 AM UTC 24 |
163168100 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_intr_rd_slow_flash.3781151591 |
|
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Oct 15 09:05:03 AM UTC 24 |
Oct 15 09:09:26 AM UTC 24 |
97875998600 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_ro.1805384310 |
|
|
Oct 15 09:06:57 AM UTC 24 |
Oct 15 09:09:29 AM UTC 24 |
632479400 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_sec_info_access.2543963716 |
|
|
Oct 15 09:08:17 AM UTC 24 |
Oct 15 09:09:36 AM UTC 24 |
1023619700 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.3251799684 |
|
|
Oct 15 09:06:47 AM UTC 24 |
Oct 15 09:10:08 AM UTC 24 |
2692004600 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_prog_rma_wipe_err.3536205564 |
|
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Oct 15 09:08:30 AM UTC 24 |
Oct 15 09:10:13 AM UTC 24 |
10031301200 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_wo.2397139908 |
|
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Oct 15 09:06:52 AM UTC 24 |
Oct 15 09:10:16 AM UTC 24 |
2101369700 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_invalid_op.3600628629 |
|
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Oct 15 09:09:14 AM UTC 24 |
Oct 15 09:10:30 AM UTC 24 |
5910108400 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_prog_reset.4021071684 |
|
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Oct 15 09:10:14 AM UTC 24 |
Oct 15 09:10:42 AM UTC 24 |
38393900 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_type.2123499196 |
|
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Oct 15 08:27:41 AM UTC 24 |
Oct 15 09:10:49 AM UTC 24 |
576550000 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict.876273077 |
|
|
Oct 15 09:10:17 AM UTC 24 |
Oct 15 09:10:57 AM UTC 24 |
68942800 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd.2023241332 |
|
|
Oct 15 09:07:23 AM UTC 24 |
Oct 15 09:11:00 AM UTC 24 |
6891227200 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rand_ops.218640240 |
|
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Oct 15 08:41:46 AM UTC 24 |
Oct 15 09:11:02 AM UTC 24 |
821852300 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.242465569 |
|
|
Oct 15 08:57:47 AM UTC 24 |
Oct 15 09:11:06 AM UTC 24 |
420314780300 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_ro.1495749346 |
|
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Oct 15 09:09:27 AM UTC 24 |
Oct 15 09:11:16 AM UTC 24 |
2164165000 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_re_evict.3229760603 |
|
|
Oct 15 09:10:43 AM UTC 24 |
Oct 15 09:11:21 AM UTC 24 |
274508100 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_connect.1917584324 |
|
|
Oct 15 09:11:01 AM UTC 24 |
Oct 15 09:11:21 AM UTC 24 |
14903400 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict_all_en.3620240548 |
|
|
Oct 15 09:10:31 AM UTC 24 |
Oct 15 09:11:26 AM UTC 24 |
184121100 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_disable.3934728033 |
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Oct 15 09:10:49 AM UTC 24 |
Oct 15 09:11:29 AM UTC 24 |
13076500 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_lcmgr_intg.1441014275 |
|
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Oct 15 09:11:03 AM UTC 24 |
Oct 15 09:11:30 AM UTC 24 |
15834900 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_sec_otp.145897600 |
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Oct 15 09:06:39 AM UTC 24 |
Oct 15 09:11:33 AM UTC 24 |
16353070500 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_read_seed_err.3377427255 |
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Oct 15 09:11:07 AM UTC 24 |
Oct 15 09:11:35 AM UTC 24 |
47361400 ps |
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/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_phy_arb.4183965875 |
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Oct 15 09:01:28 AM UTC 24 |
Oct 15 09:11:37 AM UTC 24 |
2859102300 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_14/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.3041466659 |
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Oct 15 09:08:50 AM UTC 24 |
Oct 15 09:11:38 AM UTC 24 |
83055900 ps |