Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
219 |
1 |
|
T15 |
1 |
|
T72 |
1 |
|
T81 |
1 |
| others[1] |
216 |
1 |
|
T33 |
1 |
|
T81 |
1 |
|
T28 |
7 |
| others[2] |
227 |
1 |
|
T28 |
9 |
|
T7 |
1 |
|
T31 |
6 |
| others[3] |
391 |
1 |
|
T71 |
1 |
|
T81 |
2 |
|
T206 |
1 |
| false |
120 |
1 |
|
T18 |
1 |
|
T51 |
1 |
|
T5 |
1 |
| true |
12996 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
8529 |
1 |
|
T3 |
6 |
|
T15 |
1 |
|
T17 |
17 |
| others[1] |
1244 |
1 |
|
T3 |
14 |
|
T14 |
1 |
|
T17 |
12 |
| others[2] |
1203 |
1 |
|
T3 |
10 |
|
T17 |
24 |
|
T29 |
11 |
| others[3] |
2107 |
1 |
|
T3 |
19 |
|
T13 |
1 |
|
T17 |
40 |
| false |
595 |
1 |
|
T3 |
2 |
|
T17 |
7 |
|
T29 |
2 |
| true |
491 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
8497 |
1 |
|
T3 |
7 |
|
T13 |
1 |
|
T17 |
21 |
| others[1] |
1224 |
1 |
|
T3 |
9 |
|
T14 |
1 |
|
T17 |
19 |
| others[2] |
1253 |
1 |
|
T3 |
8 |
|
T15 |
1 |
|
T17 |
25 |
| others[3] |
2052 |
1 |
|
T3 |
21 |
|
T17 |
22 |
|
T29 |
23 |
| false |
656 |
1 |
|
T3 |
6 |
|
T17 |
13 |
|
T29 |
4 |
| true |
487 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
105 |
1 |
|
T33 |
1 |
|
T28 |
5 |
|
T393 |
1 |
| others[1] |
93 |
1 |
|
T15 |
1 |
|
T28 |
2 |
|
T394 |
1 |
| others[2] |
120 |
1 |
|
T206 |
1 |
|
T28 |
6 |
|
T393 |
1 |
| others[3] |
183 |
1 |
|
T72 |
1 |
|
T81 |
1 |
|
T213 |
1 |
| false |
37 |
1 |
|
T50 |
1 |
|
T81 |
1 |
|
T206 |
1 |
| true |
13631 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
252 |
1 |
|
T51 |
1 |
|
T5 |
1 |
|
T207 |
1 |
| others[1] |
223 |
1 |
|
T18 |
1 |
|
T5 |
1 |
|
T124 |
1 |
| others[2] |
230 |
1 |
|
T32 |
1 |
|
T46 |
1 |
|
T28 |
16 |
| others[3] |
424 |
1 |
|
T9 |
1 |
|
T35 |
1 |
|
T5 |
2 |
| false |
109 |
1 |
|
T16 |
1 |
|
T56 |
1 |
|
T392 |
1 |
| true |
12931 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
8335 |
1 |
|
T3 |
8 |
|
T13 |
1 |
|
T17 |
9 |
| others[1] |
1041 |
1 |
|
T3 |
6 |
|
T17 |
12 |
|
T29 |
10 |
| others[2] |
1079 |
1 |
|
T3 |
11 |
|
T17 |
8 |
|
T29 |
6 |
| others[3] |
1768 |
1 |
|
T3 |
20 |
|
T15 |
1 |
|
T17 |
19 |
| false |
542 |
1 |
|
T3 |
6 |
|
T14 |
1 |
|
T17 |
1 |
| true |
1404 |
1 |
|
T16 |
1 |
|
T17 |
51 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
252 |
1 |
|
T15 |
1 |
|
T22 |
1 |
|
T34 |
1 |
| others[1] |
241 |
1 |
|
T33 |
1 |
|
T51 |
1 |
|
T205 |
1 |
| others[2] |
221 |
1 |
|
T207 |
1 |
|
T28 |
5 |
|
T300 |
1 |
| others[3] |
412 |
1 |
|
T32 |
1 |
|
T81 |
1 |
|
T392 |
2 |
| false |
118 |
1 |
|
T81 |
1 |
|
T95 |
1 |
|
T28 |
4 |
| true |
12925 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
243 |
1 |
|
T15 |
1 |
|
T18 |
1 |
|
T81 |
1 |
| others[1] |
234 |
1 |
|
T33 |
1 |
|
T56 |
1 |
|
T206 |
1 |
| others[2] |
203 |
1 |
|
T9 |
1 |
|
T22 |
1 |
|
T72 |
1 |
| others[3] |
377 |
1 |
|
T16 |
1 |
|
T32 |
1 |
|
T5 |
2 |
| false |
113 |
1 |
|
T28 |
5 |
|
T7 |
1 |
|
T31 |
6 |
| true |
12999 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
8497 |
1 |
|
T3 |
7 |
|
T17 |
26 |
|
T29 |
14 |
| others[1] |
1224 |
1 |
|
T3 |
11 |
|
T14 |
1 |
|
T17 |
15 |
| others[2] |
1219 |
1 |
|
T3 |
10 |
|
T13 |
1 |
|
T17 |
26 |
| others[3] |
2100 |
1 |
|
T3 |
17 |
|
T15 |
1 |
|
T17 |
25 |
| false |
635 |
1 |
|
T3 |
6 |
|
T17 |
8 |
|
T29 |
5 |
| true |
494 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1225 |
1 |
|
T3 |
10 |
|
T17 |
14 |
|
T29 |
11 |
| others[1] |
1206 |
1 |
|
T3 |
11 |
|
T17 |
20 |
|
T29 |
13 |
| others[2] |
1246 |
1 |
|
T3 |
9 |
|
T17 |
21 |
|
T29 |
11 |
| others[3] |
2089 |
1 |
|
T3 |
17 |
|
T13 |
1 |
|
T15 |
1 |
| false |
650 |
1 |
|
T3 |
4 |
|
T14 |
1 |
|
T17 |
5 |
| true |
481 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
90 |
1 |
|
T206 |
1 |
|
T28 |
3 |
|
T393 |
1 |
| others[1] |
117 |
1 |
|
T206 |
1 |
|
T28 |
4 |
|
T31 |
4 |
| others[2] |
117 |
1 |
|
T15 |
1 |
|
T28 |
3 |
|
T31 |
7 |
| others[3] |
165 |
1 |
|
T28 |
5 |
|
T31 |
6 |
|
T42 |
7 |
| false |
49 |
1 |
|
T56 |
1 |
|
T28 |
2 |
|
T393 |
1 |
| true |
6359 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
248 |
1 |
|
T18 |
1 |
|
T9 |
1 |
|
T34 |
1 |
| others[1] |
259 |
1 |
|
T5 |
1 |
|
T63 |
3 |
|
T28 |
19 |
| others[2] |
255 |
1 |
|
T15 |
1 |
|
T71 |
1 |
|
T5 |
3 |
| others[3] |
408 |
1 |
|
T33 |
1 |
|
T51 |
1 |
|
T5 |
1 |
| false |
110 |
1 |
|
T16 |
1 |
|
T72 |
1 |
|
T37 |
1 |
| true |
5617 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1046 |
1 |
|
T3 |
4 |
|
T14 |
1 |
|
T17 |
15 |
| others[1] |
1066 |
1 |
|
T3 |
12 |
|
T17 |
9 |
|
T29 |
7 |
| others[2] |
1078 |
1 |
|
T3 |
12 |
|
T15 |
1 |
|
T17 |
12 |
| others[3] |
1760 |
1 |
|
T3 |
18 |
|
T17 |
17 |
|
T29 |
6 |
| false |
525 |
1 |
|
T3 |
5 |
|
T13 |
1 |
|
T17 |
6 |
| true |
1422 |
1 |
|
T16 |
1 |
|
T17 |
41 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
240 |
1 |
|
T15 |
1 |
|
T28 |
10 |
|
T31 |
8 |
| others[1] |
243 |
1 |
|
T32 |
1 |
|
T72 |
1 |
|
T62 |
1 |
| others[2] |
240 |
1 |
|
T63 |
1 |
|
T28 |
9 |
|
T158 |
1 |
| others[3] |
401 |
1 |
|
T22 |
1 |
|
T37 |
1 |
|
T51 |
1 |
| false |
115 |
1 |
|
T71 |
1 |
|
T63 |
1 |
|
T392 |
1 |
| true |
5658 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
226 |
1 |
|
T5 |
1 |
|
T124 |
1 |
|
T28 |
8 |
| others[1] |
213 |
1 |
|
T5 |
2 |
|
T81 |
1 |
|
T206 |
1 |
| others[2] |
226 |
1 |
|
T15 |
1 |
|
T81 |
1 |
|
T205 |
1 |
| others[3] |
406 |
1 |
|
T9 |
1 |
|
T22 |
1 |
|
T50 |
1 |
| false |
101 |
1 |
|
T16 |
1 |
|
T72 |
1 |
|
T5 |
1 |
| true |
5725 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1239 |
1 |
|
T3 |
6 |
|
T17 |
24 |
|
T29 |
15 |
| others[1] |
1237 |
1 |
|
T3 |
10 |
|
T13 |
1 |
|
T17 |
26 |
| others[2] |
1232 |
1 |
|
T3 |
11 |
|
T17 |
20 |
|
T29 |
13 |
| others[3] |
2068 |
1 |
|
T3 |
16 |
|
T15 |
1 |
|
T17 |
19 |
| false |
626 |
1 |
|
T3 |
8 |
|
T14 |
1 |
|
T17 |
11 |
| true |
495 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1242 |
1 |
|
T3 |
4 |
|
T17 |
26 |
|
T29 |
6 |
| others[1] |
1267 |
1 |
|
T3 |
10 |
|
T15 |
1 |
|
T17 |
12 |
| others[2] |
1230 |
1 |
|
T3 |
7 |
|
T17 |
16 |
|
T29 |
16 |
| others[3] |
2006 |
1 |
|
T3 |
23 |
|
T13 |
1 |
|
T14 |
1 |
| false |
678 |
1 |
|
T3 |
7 |
|
T17 |
13 |
|
T29 |
5 |
| true |
474 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
98 |
1 |
|
T71 |
1 |
|
T33 |
1 |
|
T28 |
4 |
| others[1] |
107 |
1 |
|
T28 |
1 |
|
T31 |
6 |
|
T42 |
5 |
| others[2] |
109 |
1 |
|
T206 |
1 |
|
T28 |
6 |
|
T166 |
1 |
| others[3] |
175 |
1 |
|
T15 |
1 |
|
T72 |
1 |
|
T207 |
1 |
| false |
57 |
1 |
|
T56 |
1 |
|
T206 |
1 |
|
T28 |
1 |
| true |
6351 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
253 |
1 |
|
T16 |
1 |
|
T63 |
1 |
|
T392 |
1 |
| others[1] |
246 |
1 |
|
T32 |
1 |
|
T9 |
1 |
|
T71 |
1 |
| others[2] |
245 |
1 |
|
T5 |
1 |
|
T63 |
1 |
|
T56 |
1 |
| others[3] |
383 |
1 |
|
T18 |
1 |
|
T51 |
1 |
|
T5 |
1 |
| false |
124 |
1 |
|
T72 |
1 |
|
T34 |
1 |
|
T5 |
1 |
| true |
5646 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1048 |
1 |
|
T3 |
7 |
|
T17 |
11 |
|
T29 |
4 |
| others[1] |
1047 |
1 |
|
T3 |
12 |
|
T17 |
14 |
|
T29 |
2 |
| others[2] |
1038 |
1 |
|
T3 |
12 |
|
T17 |
8 |
|
T29 |
8 |
| others[3] |
1769 |
1 |
|
T3 |
17 |
|
T13 |
1 |
|
T14 |
1 |
| false |
578 |
1 |
|
T3 |
3 |
|
T17 |
5 |
|
T29 |
5 |
| true |
1417 |
1 |
|
T17 |
46 |
|
T29 |
34 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
233 |
1 |
|
T71 |
1 |
|
T72 |
1 |
|
T62 |
1 |
| others[1] |
251 |
1 |
|
T16 |
1 |
|
T9 |
1 |
|
T22 |
1 |
| others[2] |
221 |
1 |
|
T18 |
1 |
|
T81 |
1 |
|
T56 |
1 |
| others[3] |
413 |
1 |
|
T15 |
1 |
|
T81 |
1 |
|
T206 |
2 |
| false |
124 |
1 |
|
T28 |
5 |
|
T31 |
5 |
|
T42 |
2 |
| true |
5655 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
210 |
1 |
|
T33 |
1 |
|
T213 |
1 |
|
T28 |
6 |
| others[1] |
230 |
1 |
|
T22 |
1 |
|
T81 |
1 |
|
T205 |
1 |
| others[2] |
198 |
1 |
|
T206 |
1 |
|
T28 |
9 |
|
T31 |
9 |
| others[3] |
400 |
1 |
|
T71 |
1 |
|
T72 |
1 |
|
T5 |
1 |
| false |
140 |
1 |
|
T5 |
1 |
|
T206 |
1 |
|
T28 |
9 |
| true |
5719 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1227 |
1 |
|
T3 |
7 |
|
T14 |
1 |
|
T15 |
1 |
| others[1] |
1186 |
1 |
|
T3 |
15 |
|
T17 |
19 |
|
T29 |
14 |
| others[2] |
1277 |
1 |
|
T3 |
6 |
|
T16 |
1 |
|
T17 |
14 |
| others[3] |
2071 |
1 |
|
T3 |
18 |
|
T17 |
34 |
|
T29 |
21 |
| false |
647 |
1 |
|
T3 |
5 |
|
T13 |
1 |
|
T17 |
15 |
| true |
489 |
1 |
|
T18 |
1 |
|
T32 |
1 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1283 |
1 |
|
T3 |
9 |
|
T17 |
25 |
|
T29 |
6 |
| others[1] |
1230 |
1 |
|
T3 |
8 |
|
T15 |
1 |
|
T17 |
15 |
| others[2] |
1216 |
1 |
|
T3 |
13 |
|
T13 |
1 |
|
T14 |
1 |
| others[3] |
2012 |
1 |
|
T3 |
16 |
|
T17 |
34 |
|
T29 |
23 |
| false |
679 |
1 |
|
T3 |
5 |
|
T17 |
10 |
|
T29 |
6 |
| true |
477 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
120 |
1 |
|
T15 |
1 |
|
T28 |
2 |
|
T31 |
4 |
| others[1] |
94 |
1 |
|
T33 |
1 |
|
T28 |
2 |
|
T393 |
1 |
| others[2] |
101 |
1 |
|
T81 |
1 |
|
T206 |
1 |
|
T207 |
1 |
| others[3] |
166 |
1 |
|
T28 |
11 |
|
T393 |
1 |
|
T31 |
6 |
| false |
48 |
1 |
|
T206 |
1 |
|
T28 |
3 |
|
T39 |
1 |
| true |
6368 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
231 |
1 |
|
T18 |
1 |
|
T32 |
1 |
|
T9 |
1 |
| others[1] |
260 |
1 |
|
T35 |
1 |
|
T5 |
2 |
|
T63 |
4 |
| others[2] |
250 |
1 |
|
T22 |
1 |
|
T5 |
2 |
|
T28 |
14 |
| others[3] |
410 |
1 |
|
T71 |
1 |
|
T72 |
1 |
|
T33 |
1 |
| false |
116 |
1 |
|
T15 |
1 |
|
T5 |
1 |
|
T28 |
4 |
| true |
5630 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1080 |
1 |
|
T3 |
14 |
|
T17 |
10 |
|
T29 |
8 |
| others[1] |
1030 |
1 |
|
T3 |
7 |
|
T13 |
1 |
|
T14 |
1 |
| others[2] |
1009 |
1 |
|
T3 |
7 |
|
T17 |
6 |
|
T29 |
5 |
| others[3] |
1755 |
1 |
|
T3 |
16 |
|
T15 |
1 |
|
T16 |
1 |
| false |
577 |
1 |
|
T3 |
7 |
|
T17 |
9 |
|
T29 |
3 |
| true |
1446 |
1 |
|
T17 |
53 |
|
T29 |
35 |
|
T22 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |