Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
258 |
1 |
|
T15 |
1 |
|
T37 |
13 |
|
T55 |
1 |
| others[1] |
218 |
1 |
|
T37 |
9 |
|
T76 |
1 |
|
T6 |
1 |
| others[2] |
246 |
1 |
|
T37 |
9 |
|
T63 |
1 |
|
T90 |
3 |
| others[3] |
382 |
1 |
|
T17 |
1 |
|
T37 |
22 |
|
T148 |
1 |
| false |
118 |
1 |
|
T70 |
1 |
|
T37 |
2 |
|
T6 |
1 |
| true |
13210 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8818 |
1 |
|
T3 |
12 |
|
T18 |
18 |
|
T26 |
8 |
| others[1] |
1242 |
1 |
|
T3 |
7 |
|
T18 |
17 |
|
T26 |
13 |
| others[2] |
1175 |
1 |
|
T3 |
11 |
|
T15 |
1 |
|
T9 |
1 |
| others[3] |
2088 |
1 |
|
T3 |
13 |
|
T16 |
1 |
|
T18 |
36 |
| false |
613 |
1 |
|
T3 |
8 |
|
T18 |
11 |
|
T26 |
8 |
| true |
496 |
1 |
|
T17 |
1 |
|
T70 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8785 |
1 |
|
T3 |
12 |
|
T9 |
1 |
|
T18 |
14 |
| others[1] |
1246 |
1 |
|
T3 |
5 |
|
T18 |
14 |
|
T26 |
9 |
| others[2] |
1222 |
1 |
|
T3 |
10 |
|
T16 |
1 |
|
T18 |
23 |
| others[3] |
2084 |
1 |
|
T3 |
17 |
|
T18 |
39 |
|
T26 |
18 |
| false |
616 |
1 |
|
T3 |
7 |
|
T15 |
1 |
|
T18 |
10 |
| true |
479 |
1 |
|
T17 |
1 |
|
T70 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
114 |
1 |
|
T37 |
4 |
|
T90 |
1 |
|
T38 |
1 |
| others[1] |
100 |
1 |
|
T44 |
1 |
|
T235 |
1 |
|
T38 |
5 |
| others[2] |
109 |
1 |
|
T11 |
1 |
|
T37 |
2 |
|
T216 |
1 |
| others[3] |
187 |
1 |
|
T15 |
1 |
|
T17 |
1 |
|
T37 |
9 |
| false |
54 |
1 |
|
T90 |
1 |
|
T38 |
2 |
|
T86 |
3 |
| true |
13868 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
246 |
1 |
|
T11 |
1 |
|
T37 |
9 |
|
T90 |
1 |
| others[1] |
253 |
1 |
|
T37 |
14 |
|
T76 |
1 |
|
T42 |
1 |
| others[2] |
237 |
1 |
|
T37 |
8 |
|
T90 |
1 |
|
T43 |
1 |
| others[3] |
396 |
1 |
|
T15 |
1 |
|
T37 |
18 |
|
T148 |
1 |
| false |
139 |
1 |
|
T37 |
6 |
|
T63 |
1 |
|
T52 |
1 |
| true |
13161 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8640 |
1 |
|
T3 |
13 |
|
T9 |
1 |
|
T17 |
1 |
| others[1] |
992 |
1 |
|
T3 |
10 |
|
T16 |
1 |
|
T18 |
8 |
| others[2] |
1014 |
1 |
|
T3 |
7 |
|
T18 |
3 |
|
T26 |
4 |
| others[3] |
1778 |
1 |
|
T3 |
13 |
|
T15 |
1 |
|
T18 |
18 |
| false |
576 |
1 |
|
T3 |
8 |
|
T18 |
6 |
|
T26 |
3 |
| true |
1432 |
1 |
|
T18 |
53 |
|
T26 |
34 |
|
T70 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
233 |
1 |
|
T37 |
7 |
|
T56 |
3 |
|
T90 |
2 |
| others[1] |
244 |
1 |
|
T15 |
1 |
|
T70 |
1 |
|
T37 |
14 |
| others[2] |
242 |
1 |
|
T11 |
1 |
|
T37 |
13 |
|
T148 |
1 |
| others[3] |
387 |
1 |
|
T37 |
14 |
|
T55 |
1 |
|
T44 |
1 |
| false |
155 |
1 |
|
T37 |
9 |
|
T56 |
2 |
|
T175 |
1 |
| true |
13171 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
235 |
1 |
|
T37 |
9 |
|
T88 |
1 |
|
T8 |
1 |
| others[1] |
236 |
1 |
|
T17 |
1 |
|
T37 |
7 |
|
T90 |
1 |
| others[2] |
227 |
1 |
|
T15 |
1 |
|
T37 |
10 |
|
T400 |
1 |
| others[3] |
392 |
1 |
|
T37 |
14 |
|
T6 |
1 |
|
T401 |
1 |
| false |
109 |
1 |
|
T37 |
6 |
|
T8 |
1 |
|
T215 |
1 |
| true |
13233 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8809 |
1 |
|
T3 |
13 |
|
T15 |
1 |
|
T18 |
21 |
| others[1] |
1229 |
1 |
|
T3 |
7 |
|
T16 |
1 |
|
T18 |
22 |
| others[2] |
1257 |
1 |
|
T3 |
10 |
|
T18 |
18 |
|
T26 |
8 |
| others[3] |
2014 |
1 |
|
T3 |
17 |
|
T9 |
1 |
|
T18 |
27 |
| false |
628 |
1 |
|
T3 |
4 |
|
T18 |
12 |
|
T26 |
7 |
| true |
495 |
1 |
|
T17 |
1 |
|
T70 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1256 |
1 |
|
T3 |
15 |
|
T18 |
29 |
|
T26 |
13 |
| others[1] |
1258 |
1 |
|
T3 |
6 |
|
T15 |
1 |
|
T18 |
17 |
| others[2] |
1209 |
1 |
|
T3 |
13 |
|
T18 |
14 |
|
T26 |
10 |
| others[3] |
1990 |
1 |
|
T3 |
15 |
|
T16 |
1 |
|
T18 |
29 |
| false |
637 |
1 |
|
T3 |
2 |
|
T9 |
1 |
|
T18 |
11 |
| true |
469 |
1 |
|
T17 |
1 |
|
T70 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
104 |
1 |
|
T37 |
3 |
|
T90 |
1 |
|
T403 |
1 |
| others[1] |
117 |
1 |
|
T37 |
6 |
|
T235 |
1 |
|
T46 |
1 |
| others[2] |
103 |
1 |
|
T17 |
1 |
|
T37 |
3 |
|
T205 |
1 |
| others[3] |
172 |
1 |
|
T15 |
1 |
|
T37 |
6 |
|
T235 |
1 |
| false |
71 |
1 |
|
T44 |
1 |
|
T216 |
1 |
|
T89 |
1 |
| true |
6252 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T37 |
8 |
|
T88 |
1 |
|
T6 |
1 |
| others[1] |
218 |
1 |
|
T70 |
1 |
|
T37 |
11 |
|
T40 |
1 |
| others[2] |
242 |
1 |
|
T15 |
1 |
|
T37 |
7 |
|
T6 |
2 |
| others[3] |
411 |
1 |
|
T37 |
14 |
|
T55 |
1 |
|
T6 |
1 |
| false |
113 |
1 |
|
T37 |
4 |
|
T56 |
1 |
|
T90 |
1 |
| true |
5598 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1070 |
1 |
|
T3 |
9 |
|
T15 |
1 |
|
T18 |
12 |
| others[1] |
1077 |
1 |
|
T3 |
8 |
|
T18 |
7 |
|
T26 |
7 |
| others[2] |
1027 |
1 |
|
T3 |
12 |
|
T18 |
8 |
|
T26 |
5 |
| others[3] |
1750 |
1 |
|
T3 |
20 |
|
T9 |
1 |
|
T16 |
1 |
| false |
537 |
1 |
|
T3 |
2 |
|
T18 |
5 |
|
T26 |
1 |
| true |
1358 |
1 |
|
T17 |
1 |
|
T18 |
48 |
|
T26 |
34 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
253 |
1 |
|
T37 |
12 |
|
T41 |
1 |
|
T56 |
2 |
| others[1] |
272 |
1 |
|
T70 |
1 |
|
T37 |
16 |
|
T67 |
1 |
| others[2] |
247 |
1 |
|
T37 |
10 |
|
T52 |
1 |
|
T353 |
1 |
| others[3] |
402 |
1 |
|
T37 |
14 |
|
T42 |
1 |
|
T56 |
4 |
| false |
116 |
1 |
|
T37 |
6 |
|
T88 |
1 |
|
T55 |
1 |
| true |
5529 |
1 |
|
T3 |
51 |
|
T15 |
1 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T15 |
1 |
|
T37 |
7 |
|
T76 |
1 |
| others[1] |
225 |
1 |
|
T37 |
6 |
|
T6 |
1 |
|
T216 |
1 |
| others[2] |
232 |
1 |
|
T37 |
5 |
|
T6 |
1 |
|
T210 |
1 |
| others[3] |
386 |
1 |
|
T11 |
1 |
|
T37 |
20 |
|
T6 |
1 |
| false |
121 |
1 |
|
T37 |
6 |
|
T55 |
1 |
|
T8 |
2 |
| true |
5631 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1230 |
1 |
|
T3 |
10 |
|
T18 |
21 |
|
T26 |
17 |
| others[1] |
1195 |
1 |
|
T3 |
14 |
|
T16 |
1 |
|
T18 |
26 |
| others[2] |
1231 |
1 |
|
T3 |
7 |
|
T17 |
1 |
|
T18 |
20 |
| others[3] |
2048 |
1 |
|
T3 |
16 |
|
T15 |
1 |
|
T9 |
1 |
| false |
613 |
1 |
|
T3 |
4 |
|
T18 |
7 |
|
T26 |
5 |
| true |
502 |
1 |
|
T70 |
1 |
|
T11 |
1 |
|
T76 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1199 |
1 |
|
T3 |
8 |
|
T18 |
18 |
|
T26 |
7 |
| others[1] |
1250 |
1 |
|
T3 |
12 |
|
T18 |
25 |
|
T26 |
13 |
| others[2] |
1218 |
1 |
|
T3 |
9 |
|
T18 |
13 |
|
T26 |
17 |
| others[3] |
1993 |
1 |
|
T3 |
13 |
|
T15 |
1 |
|
T9 |
1 |
| false |
686 |
1 |
|
T3 |
9 |
|
T16 |
1 |
|
T18 |
12 |
| true |
473 |
1 |
|
T17 |
1 |
|
T70 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
107 |
1 |
|
T37 |
2 |
|
T38 |
3 |
|
T86 |
7 |
| others[1] |
101 |
1 |
|
T15 |
1 |
|
T37 |
3 |
|
T44 |
1 |
| others[2] |
98 |
1 |
|
T37 |
3 |
|
T235 |
1 |
|
T89 |
1 |
| others[3] |
178 |
1 |
|
T37 |
7 |
|
T90 |
1 |
|
T397 |
1 |
| false |
47 |
1 |
|
T37 |
1 |
|
T402 |
1 |
|
T38 |
2 |
| true |
6288 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
226 |
1 |
|
T37 |
7 |
|
T313 |
1 |
|
T235 |
1 |
| others[1] |
270 |
1 |
|
T17 |
1 |
|
T37 |
12 |
|
T90 |
1 |
| others[2] |
221 |
1 |
|
T70 |
1 |
|
T37 |
12 |
|
T6 |
1 |
| others[3] |
432 |
1 |
|
T11 |
1 |
|
T37 |
23 |
|
T67 |
1 |
| false |
128 |
1 |
|
T37 |
4 |
|
T44 |
1 |
|
T313 |
1 |
| true |
5542 |
1 |
|
T3 |
51 |
|
T15 |
1 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1048 |
1 |
|
T3 |
7 |
|
T18 |
11 |
|
T26 |
6 |
| others[1] |
985 |
1 |
|
T3 |
8 |
|
T16 |
1 |
|
T18 |
10 |
| others[2] |
1070 |
1 |
|
T3 |
13 |
|
T17 |
1 |
|
T18 |
5 |
| others[3] |
1746 |
1 |
|
T3 |
21 |
|
T15 |
1 |
|
T9 |
1 |
| false |
573 |
1 |
|
T3 |
2 |
|
T18 |
4 |
|
T26 |
3 |
| true |
1397 |
1 |
|
T18 |
50 |
|
T26 |
37 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T37 |
5 |
|
T55 |
1 |
|
T104 |
1 |
| others[1] |
243 |
1 |
|
T37 |
9 |
|
T157 |
1 |
|
T53 |
1 |
| others[2] |
233 |
1 |
|
T37 |
8 |
|
T201 |
1 |
|
T95 |
1 |
| others[3] |
372 |
1 |
|
T11 |
1 |
|
T37 |
21 |
|
T67 |
1 |
| false |
130 |
1 |
|
T37 |
6 |
|
T38 |
3 |
|
T86 |
2 |
| true |
5631 |
1 |
|
T3 |
51 |
|
T15 |
1 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
206 |
1 |
|
T37 |
8 |
|
T401 |
1 |
|
T400 |
1 |
| others[1] |
222 |
1 |
|
T37 |
17 |
|
T67 |
1 |
|
T6 |
3 |
| others[2] |
224 |
1 |
|
T37 |
9 |
|
T241 |
1 |
|
T404 |
1 |
| others[3] |
380 |
1 |
|
T37 |
14 |
|
T76 |
1 |
|
T148 |
1 |
| false |
117 |
1 |
|
T70 |
1 |
|
T37 |
3 |
|
T215 |
1 |
| true |
5670 |
1 |
|
T3 |
51 |
|
T15 |
1 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1249 |
1 |
|
T3 |
9 |
|
T9 |
1 |
|
T18 |
23 |
| others[1] |
1218 |
1 |
|
T3 |
8 |
|
T18 |
19 |
|
T26 |
10 |
| others[2] |
1237 |
1 |
|
T3 |
10 |
|
T15 |
1 |
|
T17 |
1 |
| others[3] |
2002 |
1 |
|
T3 |
18 |
|
T16 |
1 |
|
T18 |
31 |
| false |
619 |
1 |
|
T3 |
6 |
|
T18 |
9 |
|
T26 |
9 |
| true |
494 |
1 |
|
T70 |
1 |
|
T11 |
1 |
|
T76 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1156 |
1 |
|
T3 |
8 |
|
T18 |
22 |
|
T26 |
11 |
| others[1] |
1266 |
1 |
|
T3 |
13 |
|
T9 |
1 |
|
T18 |
24 |
| others[2] |
1250 |
1 |
|
T3 |
9 |
|
T16 |
1 |
|
T18 |
16 |
| others[3] |
2037 |
1 |
|
T3 |
15 |
|
T15 |
1 |
|
T18 |
23 |
| false |
634 |
1 |
|
T3 |
6 |
|
T18 |
15 |
|
T26 |
6 |
| true |
476 |
1 |
|
T17 |
1 |
|
T70 |
1 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
120 |
1 |
|
T37 |
5 |
|
T215 |
1 |
|
T201 |
1 |
| others[1] |
116 |
1 |
|
T37 |
4 |
|
T235 |
1 |
|
T175 |
1 |
| others[2] |
113 |
1 |
|
T17 |
1 |
|
T37 |
3 |
|
T38 |
1 |
| others[3] |
194 |
1 |
|
T37 |
8 |
|
T397 |
1 |
|
T205 |
1 |
| false |
40 |
1 |
|
T15 |
1 |
|
T37 |
2 |
|
T309 |
1 |
| true |
6236 |
1 |
|
T3 |
51 |
|
T9 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
245 |
1 |
|
T37 |
12 |
|
T76 |
1 |
|
T40 |
1 |
| others[1] |
247 |
1 |
|
T17 |
1 |
|
T37 |
9 |
|
T60 |
1 |
| others[2] |
206 |
1 |
|
T37 |
14 |
|
T6 |
1 |
|
T63 |
1 |
| others[3] |
413 |
1 |
|
T37 |
17 |
|
T148 |
1 |
|
T41 |
1 |
| false |
125 |
1 |
|
T37 |
2 |
|
T235 |
1 |
|
T19 |
1 |
| true |
5583 |
1 |
|
T3 |
51 |
|
T15 |
1 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
992 |
1 |
|
T3 |
10 |
|
T18 |
11 |
|
T26 |
8 |
| others[1] |
1052 |
1 |
|
T3 |
11 |
|
T16 |
1 |
|
T18 |
11 |
| others[2] |
1063 |
1 |
|
T3 |
11 |
|
T18 |
6 |
|
T26 |
6 |
| others[3] |
1772 |
1 |
|
T3 |
15 |
|
T15 |
1 |
|
T18 |
17 |
| false |
551 |
1 |
|
T3 |
4 |
|
T9 |
1 |
|
T18 |
5 |
| true |
1389 |
1 |
|
T17 |
1 |
|
T18 |
50 |
|
T26 |
31 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |