| Name |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/0.flash_ctrl_csr_hw_reset.3563030629 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.1645458714 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/0.flash_ctrl_csr_rw.2659870018 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.155635615 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/0.flash_ctrl_mem_walk.3257825747 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.3720162385 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.1678096243 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.2397655848 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/0.flash_ctrl_tl_errors.3174877999 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.1132481222 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.2018400030 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.3942114159 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_csr_rw.1546697489 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_intr_test.2708120836 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.2265936597 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_mem_walk.1742829627 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.4187242550 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.3402610566 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.1817529763 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/1.flash_ctrl_tl_intg_err.680019212 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.3356944727 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/10.flash_ctrl_csr_rw.1141540097 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/10.flash_ctrl_intr_test.1833140543 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.3499976285 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors.971844087 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.995783268 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/10.flash_ctrl_tl_errors.875214294 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.3660532473 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.3179893995 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/11.flash_ctrl_csr_rw.1784597517 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/11.flash_ctrl_intr_test.145895856 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.3230532453 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors.1168204656 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.954024430 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/11.flash_ctrl_tl_errors.1472677518 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/12.flash_ctrl_csr_mem_rw_with_rand_reset.2934373140 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/12.flash_ctrl_csr_rw.3401562711 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/12.flash_ctrl_intr_test.3238720280 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.1377063005 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors.3296184980 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.2107672803 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/12.flash_ctrl_tl_errors.1281518969 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.2672842897 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/13.flash_ctrl_csr_mem_rw_with_rand_reset.1902102760 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/13.flash_ctrl_csr_rw.1746836898 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/13.flash_ctrl_intr_test.2449652203 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/13.flash_ctrl_same_csr_outstanding.2388500636 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors.1488453804 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.294257179 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/13.flash_ctrl_tl_errors.4000490308 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/13.flash_ctrl_tl_intg_err.955195837 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.1308411478 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/14.flash_ctrl_csr_rw.1225777149 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/14.flash_ctrl_intr_test.3424623364 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.2823321551 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors.136154082 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.3771092734 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/14.flash_ctrl_tl_errors.3477326528 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/14.flash_ctrl_tl_intg_err.2043003059 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.2270598756 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/15.flash_ctrl_csr_rw.3675840448 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/15.flash_ctrl_intr_test.3138546820 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.4080564071 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.706042849 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.1775744438 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/15.flash_ctrl_tl_errors.2981893210 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.3658029142 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/16.flash_ctrl_csr_rw.2533011754 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/16.flash_ctrl_intr_test.4011607130 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/16.flash_ctrl_same_csr_outstanding.1034702500 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.1560645914 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.2975908575 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/16.flash_ctrl_tl_errors.3124178968 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/16.flash_ctrl_tl_intg_err.2110628302 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.3851534060 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/17.flash_ctrl_csr_rw.2028736042 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/17.flash_ctrl_intr_test.674599267 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.2559891186 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.2548152945 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.3336218135 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.1241183761 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.3558396899 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/18.flash_ctrl_csr_rw.3328914165 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/18.flash_ctrl_intr_test.3780550538 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.2390732290 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors.1736660841 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.1363993553 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/18.flash_ctrl_tl_errors.2462178138 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.1008754021 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.1988307117 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/19.flash_ctrl_csr_rw.4260206060 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/19.flash_ctrl_intr_test.1429078680 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/19.flash_ctrl_same_csr_outstanding.2807943788 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.2009736235 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.3269050337 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/19.flash_ctrl_tl_errors.1513572636 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.3154784466 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.4022302765 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.79894059 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/2.flash_ctrl_intr_test.2980091491 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/2.flash_ctrl_mem_walk.1177759004 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/2.flash_ctrl_same_csr_outstanding.138070501 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.2636284102 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.3842254101 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/20.flash_ctrl_intr_test.3740668537 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/21.flash_ctrl_intr_test.2628813323 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/22.flash_ctrl_intr_test.891023453 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/23.flash_ctrl_intr_test.1348116605 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/24.flash_ctrl_intr_test.3362022969 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/25.flash_ctrl_intr_test.3482021871 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/26.flash_ctrl_intr_test.2327901395 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/27.flash_ctrl_intr_test.3859999265 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/28.flash_ctrl_intr_test.882893038 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/29.flash_ctrl_intr_test.2167014834 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.1102567969 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.3917358952 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.3189421795 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.2996509320 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_csr_rw.2576012036 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.1789649639 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_mem_walk.605357457 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.2818271354 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.2192181211 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.3281877515 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/3.flash_ctrl_tl_errors.3625130795 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/30.flash_ctrl_intr_test.242415608 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/31.flash_ctrl_intr_test.3804820087 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/32.flash_ctrl_intr_test.3905671758 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/33.flash_ctrl_intr_test.2993423459 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/34.flash_ctrl_intr_test.15474092 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/35.flash_ctrl_intr_test.4249262885 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/36.flash_ctrl_intr_test.2453102224 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/37.flash_ctrl_intr_test.3075662247 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/cover_reg_top/38.flash_ctrl_intr_test.1840916099 |
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| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_sec_info_access.4072013476 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_smoke.4001921538 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_wo.1437760607 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/60.flash_ctrl_connect.4091067759 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/60.flash_ctrl_otp_reset.1664670338 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/61.flash_ctrl_connect.723015139 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/62.flash_ctrl_connect.1651066408 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/62.flash_ctrl_otp_reset.3499418331 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/63.flash_ctrl_connect.2583918378 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/63.flash_ctrl_otp_reset.822212195 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/64.flash_ctrl_connect.1528828556 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/64.flash_ctrl_otp_reset.2076796228 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/65.flash_ctrl_connect.2619470324 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/65.flash_ctrl_otp_reset.328987457 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/66.flash_ctrl_connect.1176657661 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/66.flash_ctrl_otp_reset.3679188306 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/67.flash_ctrl_connect.43963284 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/67.flash_ctrl_otp_reset.928238936 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/68.flash_ctrl_connect.3546907792 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/68.flash_ctrl_otp_reset.2633516768 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/69.flash_ctrl_connect.340265394 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/69.flash_ctrl_otp_reset.4177754962 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_alert_test.3471935457 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_connect.2287114799 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_disable.3835278879 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_mp.253512870 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_prog_win.1353026632 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_fetch_code.1118355191 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_prog_rma_wipe_err.260149 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_read_seed_err.4197543813 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_rma_reset.734560811 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_sec_otp.1193987385 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd.3325796320 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd_slow_flash.3145316789 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr.3814041737 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr_slow_flash.781617044 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_invalid_op.1297803261 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_lcmgr_intg.4262269520 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_mp_regions.2917912264 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_otp_reset.2544493951 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_phy_arb.3790079335 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_prog_reset.273865190 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rand_ops.1870122881 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_re_evict.57835618 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro.865319318 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_derr.2801875977 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_serr.1639711009 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw.3955467320 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_derr.2130727763 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_evict.3437450475 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_evict_all_en.1389373510 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_serr.421779148 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_sec_info_access.1149056348 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_smoke.274058836 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_wo.4285131926 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/70.flash_ctrl_connect.2590905477 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/70.flash_ctrl_otp_reset.1653683682 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/71.flash_ctrl_connect.2849525776 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/71.flash_ctrl_otp_reset.1934106549 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/72.flash_ctrl_connect.3161229877 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/72.flash_ctrl_otp_reset.2366671725 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/73.flash_ctrl_connect.1705385681 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/73.flash_ctrl_otp_reset.2797050803 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/74.flash_ctrl_connect.3682001552 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/74.flash_ctrl_otp_reset.813217609 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/75.flash_ctrl_connect.3527333508 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/75.flash_ctrl_otp_reset.3947998814 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/76.flash_ctrl_connect.4028208895 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/76.flash_ctrl_otp_reset.1192903067 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/77.flash_ctrl_connect.3197958941 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/77.flash_ctrl_otp_reset.229316896 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/78.flash_ctrl_connect.3581210311 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/78.flash_ctrl_otp_reset.1580871921 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/79.flash_ctrl_connect.2938890695 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/79.flash_ctrl_otp_reset.213099306 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_connect.1396057928 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_disable.1687045916 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_mp.2477414150 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.227816973 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_fetch_code.449386603 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_prog_rma_wipe_err.2843154783 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_read_seed_err.4082755599 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_rma_reset.609354536 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_sec_otp.680271518 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd.4077128712 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd_slow_flash.3328070502 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr.1174138476 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr_slow_flash.1389493201 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_invalid_op.107489307 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_lcmgr_intg.1352572845 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_mp_regions.1875479504 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_otp_reset.3600463064 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_phy_arb.398664493 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_prog_reset.3430232883 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rand_ops.4246009852 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_re_evict.236310046 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro.3812927417 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_derr.148737862 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_serr.3600794470 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw.1087200131 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_derr.610542897 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict.1766954358 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict_all_en.3865869393 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_serr.656919881 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_sec_info_access.537352581 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_smoke.178146999 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_wo.4039974627 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_alert_test.943274525 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_connect.167437459 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_disable.4149973963 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_mp.1486790826 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.246930716 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_fetch_code.3242958375 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_prog_rma_wipe_err.2479660173 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_read_seed_err.434778594 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.772007937 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_sec_otp.956773200 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd.3323796775 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd_slow_flash.4214625987 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr.491576821 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr_slow_flash.2216786647 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_invalid_op.1760142840 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_lcmgr_intg.1487575619 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_mp_regions.620982975 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_otp_reset.2484653733 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_phy_arb.3695597755 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_prog_reset.2825400977 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.1496333776 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro.3907778322 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_derr.3069390672 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_serr.2425273314 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw.1795069777 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_derr.3476077376 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict.3705655031 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict_all_en.481858775 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_serr.3555234252 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_sec_info_access.3477893932 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_smoke.1810136106 |
| /workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_wo.1839711135 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_smoke_hw.1530244334 |
|
|
Sep 11 05:25:38 PM UTC 24 |
Sep 11 05:26:13 PM UTC 24 |
28639100 ps |
| T2 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_sw_op.1510315301 |
|
|
Sep 11 05:25:39 PM UTC 24 |
Sep 11 05:26:18 PM UTC 24 |
94640800 ps |
| T3 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_fetch_code.511741696 |
|
|
Sep 11 05:25:48 PM UTC 24 |
Sep 11 05:26:24 PM UTC 24 |
504327400 ps |
| T16 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_read_word_sweep_serr.2747962871 |
|
|
Sep 11 05:25:58 PM UTC 24 |
Sep 11 05:26:25 PM UTC 24 |
23763900 ps |
| T10 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_write_word_sweep.539765118 |
|
|
Sep 11 05:25:54 PM UTC 24 |
Sep 11 05:26:25 PM UTC 24 |
170600800 ps |
| T17 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_read_word_sweep.2472860106 |
|
|
Sep 11 05:25:55 PM UTC 24 |
Sep 11 05:26:27 PM UTC 24 |
74622100 ps |
| T18 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_invalid_op.2111467047 |
|
|
Sep 11 05:25:52 PM UTC 24 |
Sep 11 05:26:53 PM UTC 24 |
1556059000 ps |
| T19 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_read_word_sweep_derr.421191712 |
|
|
Sep 11 05:26:19 PM UTC 24 |
Sep 11 05:27:04 PM UTC 24 |
18757300 ps |
| T4 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_otp_reset.3758563528 |
|
|
Sep 11 05:25:46 PM UTC 24 |
Sep 11 05:27:54 PM UTC 24 |
92433500 ps |
| T11 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_host_dir_rd.1116205070 |
|
|
Sep 11 05:25:39 PM UTC 24 |
Sep 11 05:27:55 PM UTC 24 |
47028700 ps |
| T29 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_wo.3969266507 |
|
|
Sep 11 05:25:53 PM UTC 24 |
Sep 11 05:28:05 PM UTC 24 |
1739195200 ps |
| T33 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_intr_wr.1715314794 |
|
|
Sep 11 05:27:06 PM UTC 24 |
Sep 11 05:28:09 PM UTC 24 |
2025372900 ps |
| T30 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_mid_op_rst.127879413 |
|
|
Sep 11 05:25:53 PM UTC 24 |
Sep 11 05:28:12 PM UTC 24 |
989749700 ps |
| T69 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_prog_reset.382118081 |
|
|
Sep 11 05:27:46 PM UTC 24 |
Sep 11 05:28:14 PM UTC 24 |
60539800 ps |
| T63 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_serr_address.2730727887 |
|
|
Sep 11 05:26:14 PM UTC 24 |
Sep 11 05:28:25 PM UTC 24 |
10023059800 ps |
| T12 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_ro.3378207592 |
|
|
Sep 11 05:25:56 PM UTC 24 |
Sep 11 05:28:25 PM UTC 24 |
1165656300 ps |
| T34 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_rw_evict.4077753998 |
|
|
Sep 11 05:27:55 PM UTC 24 |
Sep 11 05:28:34 PM UTC 24 |
38959200 ps |
| T25 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_rd_buff_evict.3710135335 |
|
|
Sep 11 05:25:41 PM UTC 24 |
Sep 11 05:28:37 PM UTC 24 |
1353631100 ps |
| T48 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_ro_serr.620880858 |
|
|
Sep 11 05:25:59 PM UTC 24 |
Sep 11 05:28:40 PM UTC 24 |
1654391400 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_hw_sec_otp.4134674604 |
|
|
Sep 11 05:25:43 PM UTC 24 |
Sep 11 05:28:44 PM UTC 24 |
2509771800 ps |
| T31 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_re_evict.2546078763 |
|
|
Sep 11 05:28:06 PM UTC 24 |
Sep 11 05:28:45 PM UTC 24 |
258668300 ps |
| T5 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_disable.96739042 |
|
|
Sep 11 05:28:09 PM UTC 24 |
Sep 11 05:28:49 PM UTC 24 |
16636000 ps |
| T6 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_access_after_disable.4116875105 |
|
|
Sep 11 05:28:38 PM UTC 24 |
Sep 11 05:28:55 PM UTC 24 |
130925900 ps |
| T58 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_rw_derr.90515746 |
|
|
Sep 11 05:26:26 PM UTC 24 |
Sep 11 05:28:55 PM UTC 24 |
1107193100 ps |
| T22 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_connect.2720602546 |
|
|
Sep 11 05:28:26 PM UTC 24 |
Sep 11 05:28:55 PM UTC 24 |
21350900 ps |
| T7 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_wr_intg.444722298 |
|
|
Sep 11 05:28:35 PM UTC 24 |
Sep 11 05:29:02 PM UTC 24 |
94153900 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_smoke.3372361880 |
|
|
Sep 11 05:25:38 PM UTC 24 |
Sep 11 05:29:06 PM UTC 24 |
208740100 ps |
| T59 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_phy_host_grant_err.3645580917 |
|
|
Sep 11 05:28:46 PM UTC 24 |
Sep 11 05:29:15 PM UTC 24 |
42185300 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_lcmgr_intg.4080642051 |
|
|
Sep 11 05:28:56 PM UTC 24 |
Sep 11 05:29:16 PM UTC 24 |
15498800 ps |
| T60 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_ro_derr.3718893930 |
|
|
Sep 11 05:26:25 PM UTC 24 |
Sep 11 05:29:18 PM UTC 24 |
3683275900 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_phy_ack_consistency.1741777903 |
|
|
Sep 11 05:28:49 PM UTC 24 |
Sep 11 05:29:18 PM UTC 24 |
15791000 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_hw_read_seed_err.1162084845 |
|
|
Sep 11 05:28:57 PM UTC 24 |
Sep 11 05:29:21 PM UTC 24 |
26450600 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_config_regwen.932560084 |
|
|
Sep 11 05:28:54 PM UTC 24 |
Sep 11 05:29:23 PM UTC 24 |
22496300 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_rd_intg.2479684949 |
|
|
Sep 11 05:28:26 PM UTC 24 |
Sep 11 05:29:24 PM UTC 24 |
72984500 ps |
| T39 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_sec_info_access.2493025128 |
|
|
Sep 11 05:28:13 PM UTC 24 |
Sep 11 05:29:26 PM UTC 24 |
874648300 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_phy_arb_redun.3944659380 |
|
|
Sep 11 05:28:45 PM UTC 24 |
Sep 11 05:29:28 PM UTC 24 |
695745500 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_fs_sup.1416963669 |
|
|
Sep 11 05:28:41 PM UTC 24 |
Sep 11 05:29:31 PM UTC 24 |
1470695700 ps |
| T72 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_rw_serr.4065894222 |
|
|
Sep 11 05:26:04 PM UTC 24 |
Sep 11 05:29:35 PM UTC 24 |
6410666200 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_alert_test.2093063080 |
|
|
Sep 11 05:29:16 PM UTC 24 |
Sep 11 05:29:40 PM UTC 24 |
51131800 ps |
| T44 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_intr_rd.2976794778 |
|
|
Sep 11 05:26:56 PM UTC 24 |
Sep 11 05:29:52 PM UTC 24 |
1365301200 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_host_addr_infection.2961272602 |
|
|
Sep 11 05:29:16 PM UTC 24 |
Sep 11 05:29:52 PM UTC 24 |
34675700 ps |
| T45 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_intr_rd_slow_flash.727682545 |
|
|
Sep 11 05:27:16 PM UTC 24 |
Sep 11 05:29:55 PM UTC 24 |
6150339500 ps |
| T70 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_smoke_hw.376686527 |
|
|
Sep 11 05:29:19 PM UTC 24 |
Sep 11 05:30:09 PM UTC 24 |
26366800 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_sw_op.1080876274 |
|
|
Sep 11 05:29:24 PM UTC 24 |
Sep 11 05:30:12 PM UTC 24 |
255796700 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_phy_arb.2711576952 |
|
|
Sep 11 05:25:43 PM UTC 24 |
Sep 11 05:30:13 PM UTC 24 |
230813700 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_oversize_error.1549504993 |
|
|
Sep 11 05:26:28 PM UTC 24 |
Sep 11 05:30:17 PM UTC 24 |
2775991700 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_rd_ooo.4143711676 |
|
|
Sep 11 05:29:07 PM UTC 24 |
Sep 11 05:30:23 PM UTC 24 |
82479700 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_hw_prog_rma_wipe_err.1871721926 |
|
|
Sep 11 05:29:03 PM UTC 24 |
Sep 11 05:30:33 PM UTC 24 |
10051214700 ps |
| T46 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_fetch_code.1856247417 |
|
|
Sep 11 05:30:02 PM UTC 24 |
Sep 11 05:30:48 PM UTC 24 |
4711437800 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_hw_sec_otp.649210094 |
|
|
Sep 11 05:29:32 PM UTC 24 |
Sep 11 05:31:07 PM UTC 24 |
13645566000 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_invalid_op.675394630 |
|
|
Sep 11 05:30:14 PM UTC 24 |
Sep 11 05:31:18 PM UTC 24 |
3034222600 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_derr_detect.522613566 |
|
|
Sep 11 05:26:26 PM UTC 24 |
Sep 11 05:31:21 PM UTC 24 |
709818600 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_read_word_sweep_serr.2241671616 |
|
|
Sep 11 05:30:41 PM UTC 24 |
Sep 11 05:31:23 PM UTC 24 |
25297300 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_host_dir_rd.719715071 |
|
|
Sep 11 05:29:25 PM UTC 24 |
Sep 11 05:31:27 PM UTC 24 |
40831200 ps |
| T26 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_mp_regions.443349569 |
|
|
Sep 11 05:25:48 PM UTC 24 |
Sep 11 05:31:43 PM UTC 24 |
9549936300 ps |
| T37 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_intr_wr_slow_flash.1192775903 |
|
|
Sep 11 05:27:26 PM UTC 24 |
Sep 11 05:31:58 PM UTC 24 |
52013037300 ps |
| T143 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_ro.3632556340 |
|
|
Sep 11 05:30:24 PM UTC 24 |
Sep 11 05:31:59 PM UTC 24 |
511735800 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_read_word_sweep_derr.276813677 |
|
|
Sep 11 05:31:24 PM UTC 24 |
Sep 11 05:32:10 PM UTC 24 |
153774500 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_mid_op_rst.1350641572 |
|
|
Sep 11 05:30:18 PM UTC 24 |
Sep 11 05:32:24 PM UTC 24 |
9528026500 ps |
| T145 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_smoke.3930697653 |
|
|
Sep 11 05:29:18 PM UTC 24 |
Sep 11 05:32:45 PM UTC 24 |
29536700 ps |
| T27 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rd_buff_evict.3358616785 |
|
|
Sep 11 05:29:26 PM UTC 24 |
Sep 11 05:32:53 PM UTC 24 |
771022000 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_serr_counter.1853765983 |
|
|
Sep 11 05:31:19 PM UTC 24 |
Sep 11 05:33:00 PM UTC 24 |
16919232800 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_serr_address.872479251 |
|
|
Sep 11 05:31:22 PM UTC 24 |
Sep 11 05:33:03 PM UTC 24 |
1113750600 ps |
| T124 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_otp_reset.42847558 |
|
|
Sep 11 05:29:53 PM UTC 24 |
Sep 11 05:33:09 PM UTC 24 |
72985100 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_wo.2075597657 |
|
|
Sep 11 05:30:18 PM UTC 24 |
Sep 11 05:33:10 PM UTC 24 |
3960027500 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_ro_serr.1849387167 |
|
|
Sep 11 05:30:49 PM UTC 24 |
Sep 11 05:33:25 PM UTC 24 |
593772500 ps |
| T38 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_intr_wr.3229861888 |
|
|
Sep 11 05:32:12 PM UTC 24 |
Sep 11 05:33:36 PM UTC 24 |
14929096700 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_disable.188233128 |
|
|
Sep 11 05:33:04 PM UTC 24 |
Sep 11 05:33:38 PM UTC 24 |
30200500 ps |
| T35 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rw_evict.3624404945 |
|
|
Sep 11 05:32:46 PM UTC 24 |
Sep 11 05:33:41 PM UTC 24 |
42408700 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_rw.2326962576 |
|
|
Sep 11 05:25:57 PM UTC 24 |
Sep 11 05:33:45 PM UTC 24 |
6411843800 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_ro_derr.1334771053 |
|
|
Sep 11 05:31:27 PM UTC 24 |
Sep 11 05:33:52 PM UTC 24 |
3211689200 ps |
| T36 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rw_evict_all_en.2220657228 |
|
|
Sep 11 05:32:54 PM UTC 24 |
Sep 11 05:33:55 PM UTC 24 |
77589000 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_re_evict.315771503 |
|
|
Sep 11 05:33:01 PM UTC 24 |
Sep 11 05:34:01 PM UTC 24 |
410665300 ps |
| T23 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_connect.3848531848 |
|
|
Sep 11 05:33:32 PM UTC 24 |
Sep 11 05:34:04 PM UTC 24 |
42028700 ps |
| T8 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_wr_intg.917430893 |
|
|
Sep 11 05:33:39 PM UTC 24 |
Sep 11 05:34:10 PM UTC 24 |
277634100 ps |
| T9 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_access_after_disable.946539938 |
|
|
Sep 11 05:33:42 PM UTC 24 |
Sep 11 05:34:11 PM UTC 24 |
21875100 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_integrity.1604100141 |
|
|
Sep 11 05:26:54 PM UTC 24 |
Sep 11 05:34:12 PM UTC 24 |
10980419300 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_phy_arb_redun.2240000983 |
|
|
Sep 11 05:33:52 PM UTC 24 |
Sep 11 05:34:14 PM UTC 24 |
766686600 ps |
| T40 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_sec_info_access.3831752365 |
|
|
Sep 11 05:33:11 PM UTC 24 |
Sep 11 05:34:15 PM UTC 24 |
1283404300 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_oversize_error.194784413 |
|
|
Sep 11 05:31:44 PM UTC 24 |
Sep 11 05:34:20 PM UTC 24 |
4224509900 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rw_serr.2208406825 |
|
|
Sep 11 05:31:08 PM UTC 24 |
Sep 11 05:34:21 PM UTC 24 |
1869295300 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_phy_host_grant_err.719687430 |
|
|
Sep 11 05:33:56 PM UTC 24 |
Sep 11 05:34:23 PM UTC 24 |
24697700 ps |
| T47 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_intr_rd.253234982 |
|
|
Sep 11 05:32:00 PM UTC 24 |
Sep 11 05:34:27 PM UTC 24 |
1394293500 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_config_regwen.2498717172 |
|
|
Sep 11 05:34:05 PM UTC 24 |
Sep 11 05:34:28 PM UTC 24 |
20266000 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_phy_ack_consistency.3722816486 |
|
|
Sep 11 05:34:01 PM UTC 24 |
Sep 11 05:34:31 PM UTC 24 |
16433600 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rd_intg.3862298519 |
|
|
Sep 11 05:33:37 PM UTC 24 |
Sep 11 05:34:34 PM UTC 24 |
111889700 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_alert_test.1977120287 |
|
|
Sep 11 05:34:16 PM UTC 24 |
Sep 11 05:34:34 PM UTC 24 |
101752800 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_lcmgr_intg.1655650409 |
|
|
Sep 11 05:34:11 PM UTC 24 |
Sep 11 05:34:36 PM UTC 24 |
58686400 ps |
| T28 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_erase_suspend.1256564890 |
|
|
Sep 11 05:25:43 PM UTC 24 |
Sep 11 05:34:37 PM UTC 24 |
5508709300 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_hw_read_seed_err.3464698639 |
|
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Sep 11 05:34:12 PM UTC 24 |
Sep 11 05:34:40 PM UTC 24 |
26385400 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_phy_arb.512181205 |
|
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Sep 11 05:29:29 PM UTC 24 |
Sep 11 05:34:51 PM UTC 24 |
47469900 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_host_addr_infection.3741352125 |
|
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Sep 11 05:34:15 PM UTC 24 |
Sep 11 05:34:51 PM UTC 24 |
78173100 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_smoke_hw.501619029 |
|
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Sep 11 05:34:22 PM UTC 24 |
Sep 11 05:34:59 PM UTC 24 |
48818300 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rw_derr.3506809425 |
|
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Sep 11 05:31:29 PM UTC 24 |
Sep 11 05:35:03 PM UTC 24 |
3380702900 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_sw_op.746234149 |
|
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Sep 11 05:34:28 PM UTC 24 |
Sep 11 05:35:14 PM UTC 24 |
65041200 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_prog_reset.23888345 |
|
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Sep 11 05:32:46 PM UTC 24 |
Sep 11 05:35:22 PM UTC 24 |
4289270200 ps |
| T56 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_fetch_code.457727668 |
|
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Sep 11 05:34:52 PM UTC 24 |
Sep 11 05:35:35 PM UTC 24 |
486182000 ps |
| T165 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_hw_prog_rma_wipe_err.3308486245 |
|
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Sep 11 05:34:14 PM UTC 24 |
Sep 11 05:35:54 PM UTC 24 |
10033816500 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_sec_otp.2542033919 |
|
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Sep 11 05:34:34 PM UTC 24 |
Sep 11 05:35:58 PM UTC 24 |
5578547200 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_derr_detect.1651985351 |
|
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Sep 11 05:31:40 PM UTC 24 |
Sep 11 05:36:01 PM UTC 24 |
3017011400 ps |
| T65 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_erase_suspend.639104573 |
|
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Sep 11 05:29:36 PM UTC 24 |
Sep 11 05:36:12 PM UTC 24 |
1513715800 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rand_ops.426075251 |
|
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Sep 11 05:29:22 PM UTC 24 |
Sep 11 05:36:25 PM UTC 24 |
98014300 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_host_dir_rd.3623225084 |
|
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Sep 11 05:34:29 PM UTC 24 |
Sep 11 05:36:27 PM UTC 24 |
205632100 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_read_word_sweep_serr.156777274 |
|
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Sep 11 05:36:24 PM UTC 24 |
Sep 11 05:37:00 PM UTC 24 |
120045900 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_invalid_op.1345073702 |
|
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Sep 11 05:35:35 PM UTC 24 |
Sep 11 05:37:07 PM UTC 24 |
1612211100 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rd_buff_evict.642675831 |
|
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Sep 11 05:34:31 PM UTC 24 |
Sep 11 05:37:27 PM UTC 24 |
2808684200 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_ro.260039732 |
|
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Sep 11 05:36:03 PM UTC 24 |
Sep 11 05:37:54 PM UTC 24 |
1065623100 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rw.1138631999 |
|
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Sep 11 05:30:34 PM UTC 24 |
Sep 11 05:37:57 PM UTC 24 |
3519174700 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_read_word_sweep_derr.2318704222 |
|
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Sep 11 05:37:29 PM UTC 24 |
Sep 11 05:38:14 PM UTC 24 |
57765100 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_mid_op_rst.3220992544 |
|
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Sep 11 05:35:56 PM UTC 24 |
Sep 11 05:38:22 PM UTC 24 |
10641069200 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_intr_wr_slow_flash.906224640 |
|
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Sep 11 05:32:41 PM UTC 24 |
Sep 11 05:38:25 PM UTC 24 |
92285455500 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_serr_counter.3952388315 |
|
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Sep 11 05:37:01 PM UTC 24 |
Sep 11 05:38:26 PM UTC 24 |
2450386100 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_serr_address.256265648 |
|
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Sep 11 05:37:08 PM UTC 24 |
Sep 11 05:38:27 PM UTC 24 |
1876901700 ps |
| T32 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_mp_regions.1594206089 |
|
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Sep 11 05:29:57 PM UTC 24 |
Sep 11 05:38:29 PM UTC 24 |
19394949200 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_smoke.1978959413 |
|
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Sep 11 05:34:21 PM UTC 24 |
Sep 11 05:38:30 PM UTC 24 |
124389100 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_otp_reset.2719118033 |
|
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Sep 11 05:34:41 PM UTC 24 |
Sep 11 05:38:51 PM UTC 24 |
39011300 ps |
| T158 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_prog_reset.48634024 |
|
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Sep 11 05:38:31 PM UTC 24 |
Sep 11 05:38:59 PM UTC 24 |
35838400 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_ro_serr.75947727 |
|
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Sep 11 05:36:26 PM UTC 24 |
Sep 11 05:39:08 PM UTC 24 |
596586500 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rw_serr.2402904571 |
|
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Sep 11 05:36:28 PM UTC 24 |
Sep 11 05:39:12 PM UTC 24 |
2575508000 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_mp_regions.86711687 |
|
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Sep 11 05:34:52 PM UTC 24 |
Sep 11 05:39:12 PM UTC 24 |
21569434400 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_wo.280996807 |
|
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Sep 11 05:36:00 PM UTC 24 |
Sep 11 05:39:29 PM UTC 24 |
8882551000 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_ro_derr.3104325545 |
|
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Sep 11 05:37:31 PM UTC 24 |
Sep 11 05:39:40 PM UTC 24 |
2400950700 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rw_evict.34600749 |
|
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Sep 11 05:38:52 PM UTC 24 |
Sep 11 05:39:41 PM UTC 24 |
51705600 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_disable.267164352 |
|
|
Sep 11 05:39:14 PM UTC 24 |
Sep 11 05:39:51 PM UTC 24 |
15654600 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rw_evict_all_en.3227295081 |
|
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Sep 11 05:39:00 PM UTC 24 |
Sep 11 05:40:01 PM UTC 24 |
109748700 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_re_evict.3712698778 |
|
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Sep 11 05:39:08 PM UTC 24 |
Sep 11 05:40:01 PM UTC 24 |
62449100 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_intr_wr.1965902080 |
|
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Sep 11 05:38:26 PM UTC 24 |
Sep 11 05:40:02 PM UTC 24 |
4657604400 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_intr_rd_slow_flash.1601626097 |
|
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Sep 11 05:32:25 PM UTC 24 |
Sep 11 05:40:03 PM UTC 24 |
52563477800 ps |
| T24 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_connect.3857723318 |
|
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Sep 11 05:39:41 PM UTC 24 |
Sep 11 05:40:06 PM UTC 24 |
26167600 ps |
| T20 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_wr_intg.2944056211 |
|
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Sep 11 05:39:51 PM UTC 24 |
Sep 11 05:40:19 PM UTC 24 |
329420300 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_phy_host_grant_err.3883468671 |
|
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Sep 11 05:40:04 PM UTC 24 |
Sep 11 05:40:26 PM UTC 24 |
24752000 ps |
| T21 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_access_after_disable.2297824993 |
|
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Sep 11 05:40:01 PM UTC 24 |
Sep 11 05:40:29 PM UTC 24 |
108795200 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rd_intg.1397600554 |
|
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Sep 11 05:39:42 PM UTC 24 |
Sep 11 05:40:31 PM UTC 24 |
113708800 ps |
| T57 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_phy_arb_redun.2649459834 |
|
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Sep 11 05:40:03 PM UTC 24 |
Sep 11 05:40:31 PM UTC 24 |
765124900 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_phy_ack_consistency.3646813225 |
|
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Sep 11 05:40:07 PM UTC 24 |
Sep 11 05:40:35 PM UTC 24 |
121813100 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_config_regwen.3858071900 |
|
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Sep 11 05:40:20 PM UTC 24 |
Sep 11 05:40:44 PM UTC 24 |
40472300 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_lcmgr_intg.989114508 |
|
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Sep 11 05:40:30 PM UTC 24 |
Sep 11 05:40:56 PM UTC 24 |
52993600 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_integrity.1391849675 |
|
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Sep 11 05:31:59 PM UTC 24 |
Sep 11 05:40:57 PM UTC 24 |
15634836600 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_read_seed_err.904880135 |
|
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Sep 11 05:40:32 PM UTC 24 |
Sep 11 05:40:57 PM UTC 24 |
26654100 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_fs_sup.1369064314 |
|
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Sep 11 05:40:03 PM UTC 24 |
Sep 11 05:41:03 PM UTC 24 |
714563900 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_alert_test.2751453463 |
|
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Sep 11 05:40:44 PM UTC 24 |
Sep 11 05:41:09 PM UTC 24 |
87547100 ps |
| T203 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_sec_info_access.87399062 |
|
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Sep 11 05:39:30 PM UTC 24 |
Sep 11 05:41:10 PM UTC 24 |
12156719700 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_rand_ops.2621114281 |
|
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Sep 11 05:40:58 PM UTC 24 |
Sep 11 05:41:21 PM UTC 24 |
25170100 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_host_addr_infection.1045528715 |
|
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Sep 11 05:40:36 PM UTC 24 |
Sep 11 05:41:24 PM UTC 24 |
39286900 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rw_derr.2472071871 |
|
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Sep 11 05:37:55 PM UTC 24 |
Sep 11 05:41:26 PM UTC 24 |
1249158500 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_smoke_hw.2014140205 |
|
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Sep 11 05:40:58 PM UTC 24 |
Sep 11 05:41:29 PM UTC 24 |
45030200 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_oversize_error.2857928578 |
|
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Sep 11 05:38:15 PM UTC 24 |
Sep 11 05:41:40 PM UTC 24 |
2525605000 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_intr_rd_slow_flash.1178885530 |
|
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Sep 11 05:38:27 PM UTC 24 |
Sep 11 05:41:42 PM UTC 24 |
29630635400 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_dir_rd.839524942 |
|
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Sep 11 05:41:10 PM UTC 24 |
Sep 11 05:41:46 PM UTC 24 |
37243000 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_sw_op.2742116482 |
|
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Sep 11 05:41:05 PM UTC 24 |
Sep 11 05:41:52 PM UTC 24 |
58690200 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_intr_rd.745635162 |
|
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Sep 11 05:38:26 PM UTC 24 |
Sep 11 05:42:04 PM UTC 24 |
6393745300 ps |
| T61 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_fetch_code.3843026857 |
|
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Sep 11 05:41:47 PM UTC 24 |
Sep 11 05:42:34 PM UTC 24 |
1832066800 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_derr_detect.418488644 |
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Sep 11 05:37:58 PM UTC 24 |
Sep 11 05:42:35 PM UTC 24 |
1678793700 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_prog_rma_wipe_err.4051798947 |
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Sep 11 05:40:32 PM UTC 24 |
Sep 11 05:42:38 PM UTC 24 |
10021956500 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_rand_ops.361318037 |
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Sep 11 05:25:38 PM UTC 24 |
Sep 11 05:42:54 PM UTC 24 |
2842691700 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_hw_sec_otp.1012743612 |
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Sep 11 05:41:25 PM UTC 24 |
Sep 11 05:42:57 PM UTC 24 |
936177800 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_invalid_op.1361837504 |
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Sep 11 05:42:13 PM UTC 24 |
Sep 11 05:43:30 PM UTC 24 |
3646684800 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_read_word_sweep_serr.2444825931 |
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Sep 11 05:42:59 PM UTC 24 |
Sep 11 05:43:38 PM UTC 24 |
25102700 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_intr_wr_slow_flash.1998819034 |
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Sep 11 05:38:31 PM UTC 24 |
Sep 11 05:43:43 PM UTC 24 |
21518655400 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rw.3310357783 |
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Sep 11 05:36:13 PM UTC 24 |
Sep 11 05:44:02 PM UTC 24 |
16002212000 ps |
| T66 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_erase_suspend.4191627339 |
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Sep 11 05:34:35 PM UTC 24 |
Sep 11 05:44:02 PM UTC 24 |
3355801200 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_rd_buff_evict.653343146 |
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Sep 11 05:41:11 PM UTC 24 |
Sep 11 05:44:08 PM UTC 24 |
5010514400 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_ro.3551322008 |
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Sep 11 05:42:40 PM UTC 24 |
Sep 11 05:44:14 PM UTC 24 |
867987800 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_read_word_sweep_derr.813561952 |
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Sep 11 05:43:40 PM UTC 24 |
Sep 11 05:44:25 PM UTC 24 |
34869900 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_hw_rma_reset.3686969769 |
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Sep 11 05:25:44 PM UTC 24 |
Sep 11 05:44:45 PM UTC 24 |
350243618700 ps |
| T78 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_mid_op_rst.3555489770 |
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Sep 11 05:42:35 PM UTC 24 |
Sep 11 05:44:51 PM UTC 24 |
1331485300 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_smoke.1796636859 |
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Sep 11 05:40:57 PM UTC 24 |
Sep 11 05:44:53 PM UTC 24 |
80349400 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_rma_err.2462231007 |
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Sep 11 05:28:56 PM UTC 24 |
Sep 11 05:44:57 PM UTC 24 |
83075547800 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_serr_address.389451602 |
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Sep 11 05:43:32 PM UTC 24 |
Sep 11 05:44:59 PM UTC 24 |
1864229400 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_prog_win.1645502543 |
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Sep 11 05:30:10 PM UTC 24 |
Sep 11 05:45:01 PM UTC 24 |
573837600 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_otp_reset.188647528 |
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Sep 11 05:41:30 PM UTC 24 |
Sep 11 05:45:03 PM UTC 24 |
68220300 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_ro_serr.4013054031 |
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Sep 11 05:43:14 PM UTC 24 |
Sep 11 05:45:04 PM UTC 24 |
2037870000 ps |
| T198 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_serr_counter.158523255 |
|
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Sep 11 05:43:31 PM UTC 24 |
Sep 11 05:45:22 PM UTC 24 |
1514695300 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_rw_evict_all_en.765761860 |
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Sep 11 05:45:00 PM UTC 24 |
Sep 11 05:45:35 PM UTC 24 |
72214100 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_rw_evict.2227131013 |
|
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Sep 11 05:44:58 PM UTC 24 |
Sep 11 05:45:48 PM UTC 24 |
250969300 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_disable.2661190540 |
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Sep 11 05:45:04 PM UTC 24 |
Sep 11 05:45:49 PM UTC 24 |
10497300 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_wo.1877084046 |
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Sep 11 05:42:35 PM UTC 24 |
Sep 11 05:45:49 PM UTC 24 |
10222693300 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_phy_arb.1764785203 |
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Sep 11 05:34:32 PM UTC 24 |
Sep 11 05:45:54 PM UTC 24 |
763603000 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_intr_wr.3784367071 |
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Sep 11 05:44:43 PM UTC 24 |
Sep 11 05:45:56 PM UTC 24 |
2025795200 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_re_evict.1057230828 |
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Sep 11 05:45:02 PM UTC 24 |
Sep 11 05:46:09 PM UTC 24 |
73745400 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_connect.2735475432 |
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Sep 11 05:45:40 PM UTC 24 |
Sep 11 05:46:12 PM UTC 24 |
51290600 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_config_regwen.3857096005 |
|
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Sep 11 05:45:55 PM UTC 24 |
Sep 11 05:46:12 PM UTC 24 |
154465900 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_phy_ack_consistency.1528888791 |
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Sep 11 05:45:50 PM UTC 24 |
Sep 11 05:46:17 PM UTC 24 |
26102400 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_sec_info_access.1049719393 |
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Sep 11 05:45:22 PM UTC 24 |
Sep 11 05:46:19 PM UTC 24 |
792511300 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_lcmgr_intg.741134834 |
|
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Sep 11 05:45:57 PM UTC 24 |
Sep 11 05:46:20 PM UTC 24 |
25578200 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_ro_derr.1123109889 |
|
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Sep 11 05:43:44 PM UTC 24 |
Sep 11 05:46:20 PM UTC 24 |
5997638400 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_phy_host_grant_err.1881827795 |
|
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Sep 11 05:45:50 PM UTC 24 |
Sep 11 05:46:20 PM UTC 24 |
25304600 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_hw_rma_reset.3035788437 |
|
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Sep 11 05:29:53 PM UTC 24 |
Sep 11 05:46:24 PM UTC 24 |
160172441800 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rand_ops.257804509 |
|
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Sep 11 05:34:24 PM UTC 24 |
Sep 11 05:46:24 PM UTC 24 |
963670000 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_phy_arb_redun.3987778600 |
|
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Sep 11 05:45:50 PM UTC 24 |
Sep 11 05:46:29 PM UTC 24 |
785761100 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_alert_test.2686336628 |
|
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Sep 11 05:46:13 PM UTC 24 |
Sep 11 05:46:30 PM UTC 24 |
717792300 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_stress_all.1494541227 |
|
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Sep 11 05:45:36 PM UTC 24 |
Sep 11 05:46:33 PM UTC 24 |
26179400 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_hw_read_seed_err.2443782573 |
|
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Sep 11 05:46:09 PM UTC 24 |
Sep 11 05:46:35 PM UTC 24 |
15751200 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_integrity.3393723577 |
|
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Sep 11 05:38:23 PM UTC 24 |
Sep 11 05:46:43 PM UTC 24 |
3645838400 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_oversize_error.1246301395 |
|
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Sep 11 05:44:09 PM UTC 24 |
Sep 11 05:46:47 PM UTC 24 |
2195805300 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_fs_sup.4226609000 |
|
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Sep 11 05:45:49 PM UTC 24 |
Sep 11 05:46:52 PM UTC 24 |
1443362600 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_sw_op.184489348 |
|
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Sep 11 05:46:20 PM UTC 24 |
Sep 11 05:46:58 PM UTC 24 |
25219600 ps |
| T217 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_smoke_hw.2504456219 |
|
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Sep 11 05:46:19 PM UTC 24 |
Sep 11 05:47:07 PM UTC 24 |
29627100 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_hw_prog_rma_wipe_err.1007350403 |
|
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Sep 11 05:46:12 PM UTC 24 |
Sep 11 05:47:18 PM UTC 24 |
10036408600 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_smoke.804294558 |
|
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Sep 11 05:46:17 PM UTC 24 |
Sep 11 05:47:19 PM UTC 24 |
47992700 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_rw_serr.479718221 |
|
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Sep 11 05:43:26 PM UTC 24 |
Sep 11 05:47:27 PM UTC 24 |
6094696300 ps |
| T62 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_fetch_code.1094847139 |
|
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Sep 11 05:46:53 PM UTC 24 |
Sep 11 05:47:35 PM UTC 24 |
428720900 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_mp_regions.1471635074 |
|
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Sep 11 05:41:43 PM UTC 24 |
Sep 11 05:47:44 PM UTC 24 |
96262323700 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_intr_rd.3015034576 |
|
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Sep 11 05:44:26 PM UTC 24 |
Sep 11 05:47:45 PM UTC 24 |
1457527400 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_derr_detect.2089385720 |
|
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Sep 11 05:44:03 PM UTC 24 |
Sep 11 05:47:46 PM UTC 24 |
682611000 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_rw_derr.1410403188 |
|
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Sep 11 05:44:03 PM UTC 24 |
Sep 11 05:48:03 PM UTC 24 |
5018171700 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_error_prog_win.324424575 |
|
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Sep 11 05:25:51 PM UTC 24 |
Sep 11 05:48:12 PM UTC 24 |
731184000 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_prog_reset.3086934904 |
|
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Sep 11 05:44:55 PM UTC 24 |
Sep 11 05:48:17 PM UTC 24 |
9594172800 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_intr_rd_slow_flash.765823046 |
|
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Sep 11 05:44:45 PM UTC 24 |
Sep 11 05:48:26 PM UTC 24 |
12256107900 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_invalid_op.2370780222 |
|
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Sep 11 05:47:28 PM UTC 24 |
Sep 11 05:48:36 PM UTC 24 |
1535487000 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_intr_wr_slow_flash.1171244571 |
|
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Sep 11 05:44:52 PM UTC 24 |
Sep 11 05:48:46 PM UTC 24 |
21001596100 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_read_word_sweep_serr.2246381778 |
|
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Sep 11 05:48:04 PM UTC 24 |
Sep 11 05:48:47 PM UTC 24 |
92156200 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rma_err.530291535 |
|
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Sep 11 05:34:10 PM UTC 24 |
Sep 11 05:49:01 PM UTC 24 |
78996269100 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_sec_otp.66119307 |
|
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Sep 11 05:46:30 PM UTC 24 |
Sep 11 05:49:06 PM UTC 24 |
14202336900 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_host_dir_rd.3558522441 |
|
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Sep 11 05:46:21 PM UTC 24 |
Sep 11 05:49:16 PM UTC 24 |
229432800 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_otp_reset.1721436562 |
|
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Sep 11 05:46:36 PM UTC 24 |
Sep 11 05:49:18 PM UTC 24 |
36851300 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_erase_suspend.1121371879 |
|
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Sep 11 05:41:26 PM UTC 24 |
Sep 11 05:49:21 PM UTC 24 |
1543844800 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_ro.2592040215 |
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Sep 11 05:47:46 PM UTC 24 |
Sep 11 05:49:22 PM UTC 24 |
897505300 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_read_word_sweep_derr.1914832805 |
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Sep 11 05:48:47 PM UTC 24 |
Sep 11 05:49:26 PM UTC 24 |
58682400 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_rw.2105619837 |
|
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Sep 11 05:42:55 PM UTC 24 |
Sep 11 05:49:26 PM UTC 24 |
2697418900 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rd_buff_evict.4269485731 |
|
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Sep 11 05:46:25 PM UTC 24 |
Sep 11 05:49:29 PM UTC 24 |
759958000 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_mid_op_rst.3481853223 |
|
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Sep 11 05:47:36 PM UTC 24 |
Sep 11 05:49:51 PM UTC 24 |
1986990100 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_prog_reset.3842724478 |
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Sep 11 05:49:29 PM UTC 24 |
Sep 11 05:49:56 PM UTC 24 |
143452900 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_serr_counter.671497147 |
|
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Sep 11 05:48:27 PM UTC 24 |
Sep 11 05:50:03 PM UTC 24 |
2315796100 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_mp_regions.550935134 |
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Sep 11 05:46:48 PM UTC 24 |
Sep 11 05:50:05 PM UTC 24 |
2337708000 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_serr_address.392821256 |
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Sep 11 05:48:36 PM UTC 24 |
Sep 11 05:50:08 PM UTC 24 |
1347464700 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rw_evict.3013430418 |
|
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Sep 11 05:49:40 PM UTC 24 |
Sep 11 05:50:25 PM UTC 24 |
29875300 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_wr.2155520294 |
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Sep 11 05:49:23 PM UTC 24 |
Sep 11 05:50:36 PM UTC 24 |
8319399900 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_disable.402785164 |
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Sep 11 05:50:04 PM UTC 24 |
Sep 11 05:50:42 PM UTC 24 |
26411800 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rw_evict_all_en.738599172 |
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Sep 11 05:49:52 PM UTC 24 |
Sep 11 05:50:50 PM UTC 24 |
29201900 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_re_evict.2688804499 |
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Sep 11 05:49:57 PM UTC 24 |
Sep 11 05:50:57 PM UTC 24 |
253639600 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_connect.2026476332 |
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Sep 11 05:50:37 PM UTC 24 |
Sep 11 05:51:01 PM UTC 24 |
14442900 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_ro_serr.278319858 |
|
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Sep 11 05:48:13 PM UTC 24 |
Sep 11 05:51:02 PM UTC 24 |
520600600 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_phy_arb.3361072691 |
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Sep 11 05:41:22 PM UTC 24 |
Sep 11 05:51:14 PM UTC 24 |
7467443300 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_wo.4156095040 |
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Sep 11 05:47:46 PM UTC 24 |
Sep 11 05:51:27 PM UTC 24 |
11543684100 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_phy_ack_consistency.3356317883 |
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Sep 11 05:51:02 PM UTC 24 |
Sep 11 05:51:27 PM UTC 24 |
15139700 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_config_regwen.1516852218 |
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Sep 11 05:51:02 PM UTC 24 |
Sep 11 05:51:28 PM UTC 24 |
20022900 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_phy_arb_redun.4135230543 |
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Sep 11 05:50:51 PM UTC 24 |
Sep 11 05:51:29 PM UTC 24 |
786313600 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_ro_derr.1216320484 |
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Sep 11 05:48:48 PM UTC 24 |
Sep 11 05:51:38 PM UTC 24 |
2078623300 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_lcmgr_intg.184309602 |
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Sep 11 05:51:14 PM UTC 24 |
Sep 11 05:51:40 PM UTC 24 |
15634000 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_fs_sup.2158240199 |
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Sep 11 05:50:43 PM UTC 24 |
Sep 11 05:51:48 PM UTC 24 |
4263897000 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_read_seed_err.1382036304 |
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Sep 11 05:51:24 PM UTC 24 |
Sep 11 05:51:51 PM UTC 24 |
26551500 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_alert_test.2549293247 |
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Sep 11 05:51:28 PM UTC 24 |
Sep 11 05:51:55 PM UTC 24 |
34013400 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_wr_slow_flash.112643892 |
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Sep 11 05:49:26 PM UTC 24 |
Sep 11 05:51:57 PM UTC 24 |
21996874900 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rw_derr.343924274 |
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Sep 11 05:49:03 PM UTC 24 |
Sep 11 05:52:10 PM UTC 24 |
1323959800 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_erase_suspend.670526538 |
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Sep 11 05:46:31 PM UTC 24 |
Sep 11 05:52:11 PM UTC 24 |
103333600 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_rma_reset.1353779267 |
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Sep 11 05:34:38 PM UTC 24 |
Sep 11 05:52:22 PM UTC 24 |
120154424600 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_sec_info_access.2364828974 |
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Sep 11 05:50:09 PM UTC 24 |
Sep 11 05:52:24 PM UTC 24 |
24974552200 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_prog_rma_wipe_err.1190547209 |
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Sep 11 05:51:28 PM UTC 24 |
Sep 11 05:52:28 PM UTC 24 |
10132690400 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_09_10/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rw_serr.2439324043 |
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Sep 11 05:48:18 PM UTC 24 |
Sep 11 05:52:36 PM UTC 24 |
3194786500 ps |