Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
239 |
1 |
|
T72 |
1 |
|
T37 |
1 |
|
T5 |
1 |
| others[1] |
244 |
1 |
|
T5 |
1 |
|
T63 |
3 |
|
T56 |
1 |
| others[2] |
241 |
1 |
|
T15 |
1 |
|
T50 |
1 |
|
T62 |
1 |
| others[3] |
406 |
1 |
|
T32 |
1 |
|
T9 |
1 |
|
T34 |
1 |
| false |
102 |
1 |
|
T71 |
1 |
|
T63 |
1 |
|
T206 |
1 |
| true |
5665 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1063 |
1 |
|
T3 |
7 |
|
T14 |
1 |
|
T17 |
9 |
| others[1] |
1048 |
1 |
|
T3 |
13 |
|
T13 |
1 |
|
T17 |
10 |
| others[2] |
1092 |
1 |
|
T3 |
13 |
|
T17 |
9 |
|
T29 |
9 |
| others[3] |
1758 |
1 |
|
T3 |
14 |
|
T15 |
1 |
|
T16 |
1 |
| false |
539 |
1 |
|
T3 |
4 |
|
T17 |
6 |
|
T18 |
1 |
| true |
1397 |
1 |
|
T17 |
53 |
|
T29 |
28 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
238 |
1 |
|
T16 |
1 |
|
T22 |
1 |
|
T63 |
1 |
| others[1] |
226 |
1 |
|
T18 |
1 |
|
T63 |
3 |
|
T81 |
2 |
| others[2] |
218 |
1 |
|
T15 |
1 |
|
T95 |
1 |
|
T28 |
14 |
| others[3] |
379 |
1 |
|
T32 |
1 |
|
T9 |
1 |
|
T33 |
1 |
| false |
129 |
1 |
|
T63 |
1 |
|
T46 |
1 |
|
T81 |
2 |
| true |
5707 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
227 |
1 |
|
T15 |
1 |
|
T22 |
1 |
|
T81 |
1 |
| others[1] |
218 |
1 |
|
T207 |
1 |
|
T28 |
7 |
|
T391 |
1 |
| others[2] |
218 |
1 |
|
T18 |
1 |
|
T5 |
1 |
|
T28 |
10 |
| others[3] |
376 |
1 |
|
T16 |
1 |
|
T33 |
1 |
|
T5 |
1 |
| false |
102 |
1 |
|
T71 |
1 |
|
T51 |
1 |
|
T5 |
2 |
| true |
5756 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1187 |
1 |
|
T3 |
10 |
|
T15 |
1 |
|
T17 |
16 |
| others[1] |
1259 |
1 |
|
T3 |
9 |
|
T17 |
16 |
|
T29 |
15 |
| others[2] |
1231 |
1 |
|
T3 |
19 |
|
T14 |
1 |
|
T17 |
18 |
| others[3] |
2054 |
1 |
|
T3 |
9 |
|
T13 |
1 |
|
T17 |
38 |
| false |
655 |
1 |
|
T3 |
4 |
|
T17 |
12 |
|
T29 |
6 |
| true |
511 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1215 |
1 |
|
T3 |
9 |
|
T14 |
1 |
|
T17 |
16 |
| others[1] |
1267 |
1 |
|
T3 |
10 |
|
T17 |
19 |
|
T29 |
13 |
| others[2] |
1217 |
1 |
|
T3 |
10 |
|
T17 |
21 |
|
T29 |
11 |
| others[3] |
2086 |
1 |
|
T3 |
19 |
|
T13 |
1 |
|
T17 |
32 |
| false |
646 |
1 |
|
T3 |
3 |
|
T15 |
1 |
|
T17 |
12 |
| true |
466 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
102 |
1 |
|
T15 |
1 |
|
T72 |
1 |
|
T28 |
3 |
| others[1] |
92 |
1 |
|
T206 |
1 |
|
T28 |
1 |
|
T31 |
2 |
| others[2] |
96 |
1 |
|
T71 |
1 |
|
T28 |
2 |
|
T393 |
2 |
| others[3] |
182 |
1 |
|
T28 |
4 |
|
T31 |
11 |
|
T42 |
4 |
| false |
46 |
1 |
|
T206 |
1 |
|
T28 |
3 |
|
T31 |
2 |
| true |
6379 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
241 |
1 |
|
T35 |
1 |
|
T63 |
2 |
|
T392 |
1 |
| others[1] |
221 |
1 |
|
T34 |
1 |
|
T37 |
1 |
|
T5 |
1 |
| others[2] |
238 |
1 |
|
T9 |
1 |
|
T5 |
1 |
|
T63 |
2 |
| others[3] |
408 |
1 |
|
T15 |
1 |
|
T71 |
1 |
|
T5 |
1 |
| false |
133 |
1 |
|
T33 |
1 |
|
T28 |
8 |
|
T358 |
1 |
| true |
5656 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1041 |
1 |
|
T3 |
8 |
|
T14 |
1 |
|
T17 |
13 |
| others[1] |
1094 |
1 |
|
T3 |
7 |
|
T13 |
1 |
|
T17 |
5 |
| others[2] |
1067 |
1 |
|
T3 |
13 |
|
T17 |
9 |
|
T29 |
7 |
| others[3] |
1800 |
1 |
|
T3 |
19 |
|
T15 |
1 |
|
T17 |
14 |
| false |
522 |
1 |
|
T3 |
4 |
|
T16 |
1 |
|
T17 |
6 |
| true |
1373 |
1 |
|
T17 |
53 |
|
T29 |
24 |
|
T72 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
222 |
1 |
|
T233 |
1 |
|
T28 |
6 |
|
T113 |
1 |
| others[1] |
261 |
1 |
|
T16 |
1 |
|
T50 |
1 |
|
T28 |
10 |
| others[2] |
201 |
1 |
|
T15 |
1 |
|
T72 |
1 |
|
T28 |
6 |
| others[3] |
415 |
1 |
|
T33 |
1 |
|
T34 |
1 |
|
T46 |
1 |
| false |
124 |
1 |
|
T37 |
1 |
|
T28 |
7 |
|
T31 |
7 |
| true |
5674 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
252 |
1 |
|
T205 |
1 |
|
T28 |
12 |
|
T7 |
1 |
| others[1] |
237 |
1 |
|
T5 |
1 |
|
T81 |
1 |
|
T124 |
1 |
| others[2] |
214 |
1 |
|
T18 |
1 |
|
T157 |
1 |
|
T28 |
19 |
| others[3] |
420 |
1 |
|
T15 |
1 |
|
T9 |
1 |
|
T22 |
1 |
| false |
107 |
1 |
|
T51 |
1 |
|
T206 |
1 |
|
T28 |
6 |
| true |
5667 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1241 |
1 |
|
T3 |
13 |
|
T17 |
24 |
|
T29 |
12 |
| others[1] |
1243 |
1 |
|
T3 |
8 |
|
T13 |
1 |
|
T17 |
18 |
| others[2] |
1214 |
1 |
|
T3 |
8 |
|
T17 |
21 |
|
T29 |
10 |
| others[3] |
2065 |
1 |
|
T3 |
20 |
|
T14 |
1 |
|
T15 |
1 |
| false |
644 |
1 |
|
T3 |
2 |
|
T17 |
11 |
|
T29 |
7 |
| true |
490 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1253 |
1 |
|
T3 |
6 |
|
T14 |
1 |
|
T17 |
19 |
| others[1] |
1307 |
1 |
|
T3 |
13 |
|
T13 |
1 |
|
T15 |
1 |
| others[2] |
1208 |
1 |
|
T3 |
18 |
|
T17 |
26 |
|
T29 |
9 |
| others[3] |
1980 |
1 |
|
T3 |
12 |
|
T17 |
26 |
|
T29 |
22 |
| false |
663 |
1 |
|
T3 |
2 |
|
T17 |
11 |
|
T29 |
5 |
| true |
486 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
118 |
1 |
|
T56 |
1 |
|
T206 |
1 |
|
T28 |
3 |
| others[1] |
101 |
1 |
|
T28 |
2 |
|
T393 |
1 |
|
T395 |
1 |
| others[2] |
102 |
1 |
|
T206 |
1 |
|
T28 |
7 |
|
T31 |
3 |
| others[3] |
164 |
1 |
|
T9 |
1 |
|
T28 |
12 |
|
T393 |
1 |
| false |
60 |
1 |
|
T15 |
1 |
|
T28 |
3 |
|
T31 |
6 |
| true |
6352 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
256 |
1 |
|
T71 |
1 |
|
T35 |
1 |
|
T51 |
1 |
| others[1] |
236 |
1 |
|
T16 |
1 |
|
T62 |
1 |
|
T63 |
4 |
| others[2] |
221 |
1 |
|
T124 |
1 |
|
T28 |
13 |
|
T158 |
1 |
| others[3] |
426 |
1 |
|
T32 |
1 |
|
T9 |
1 |
|
T33 |
1 |
| false |
127 |
1 |
|
T81 |
1 |
|
T157 |
1 |
|
T28 |
4 |
| true |
5631 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1100 |
1 |
|
T3 |
10 |
|
T15 |
1 |
|
T16 |
1 |
| others[1] |
1022 |
1 |
|
T3 |
11 |
|
T14 |
1 |
|
T17 |
11 |
| others[2] |
1032 |
1 |
|
T3 |
7 |
|
T13 |
1 |
|
T17 |
7 |
| others[3] |
1838 |
1 |
|
T3 |
20 |
|
T17 |
14 |
|
T29 |
7 |
| false |
520 |
1 |
|
T3 |
3 |
|
T17 |
5 |
|
T29 |
4 |
| true |
1385 |
1 |
|
T17 |
47 |
|
T29 |
42 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
233 |
1 |
|
T72 |
1 |
|
T33 |
1 |
|
T63 |
1 |
| others[1] |
272 |
1 |
|
T22 |
1 |
|
T63 |
1 |
|
T81 |
1 |
| others[2] |
228 |
1 |
|
T18 |
1 |
|
T63 |
1 |
|
T28 |
9 |
| others[3] |
407 |
1 |
|
T16 |
1 |
|
T71 |
1 |
|
T63 |
2 |
| false |
126 |
1 |
|
T63 |
1 |
|
T392 |
1 |
|
T28 |
6 |
| true |
5631 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
210 |
1 |
|
T81 |
1 |
|
T56 |
1 |
|
T28 |
10 |
| others[1] |
214 |
1 |
|
T95 |
1 |
|
T207 |
1 |
|
T28 |
6 |
| others[2] |
218 |
1 |
|
T81 |
1 |
|
T28 |
8 |
|
T167 |
1 |
| others[3] |
374 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T22 |
1 |
| false |
105 |
1 |
|
T62 |
1 |
|
T5 |
1 |
|
T157 |
1 |
| true |
5776 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1247 |
1 |
|
T3 |
6 |
|
T17 |
18 |
|
T29 |
17 |
| others[1] |
1207 |
1 |
|
T3 |
12 |
|
T16 |
1 |
|
T17 |
18 |
| others[2] |
1274 |
1 |
|
T3 |
12 |
|
T13 |
1 |
|
T14 |
1 |
| others[3] |
2038 |
1 |
|
T3 |
17 |
|
T15 |
1 |
|
T17 |
37 |
| false |
645 |
1 |
|
T3 |
4 |
|
T17 |
9 |
|
T29 |
6 |
| true |
486 |
1 |
|
T18 |
1 |
|
T32 |
1 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1253 |
1 |
|
T3 |
9 |
|
T17 |
19 |
|
T29 |
14 |
| others[1] |
1248 |
1 |
|
T3 |
7 |
|
T14 |
1 |
|
T17 |
17 |
| others[2] |
1233 |
1 |
|
T3 |
15 |
|
T13 |
1 |
|
T17 |
21 |
| others[3] |
2054 |
1 |
|
T3 |
19 |
|
T15 |
1 |
|
T17 |
34 |
| false |
637 |
1 |
|
T3 |
1 |
|
T17 |
9 |
|
T29 |
5 |
| true |
472 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
95 |
1 |
|
T15 |
1 |
|
T206 |
1 |
|
T28 |
4 |
| others[1] |
109 |
1 |
|
T157 |
1 |
|
T28 |
5 |
|
T113 |
1 |
| others[2] |
108 |
1 |
|
T71 |
1 |
|
T72 |
1 |
|
T207 |
1 |
| others[3] |
174 |
1 |
|
T206 |
1 |
|
T233 |
1 |
|
T213 |
1 |
| false |
63 |
1 |
|
T28 |
3 |
|
T31 |
2 |
|
T42 |
4 |
| true |
6348 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
251 |
1 |
|
T50 |
1 |
|
T5 |
2 |
|
T81 |
2 |
| others[1] |
229 |
1 |
|
T9 |
1 |
|
T205 |
1 |
|
T28 |
10 |
| others[2] |
254 |
1 |
|
T71 |
1 |
|
T5 |
2 |
|
T95 |
1 |
| others[3] |
419 |
1 |
|
T15 |
1 |
|
T18 |
1 |
|
T35 |
1 |
| false |
130 |
1 |
|
T22 |
1 |
|
T5 |
1 |
|
T56 |
1 |
| true |
5614 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1030 |
1 |
|
T3 |
7 |
|
T15 |
1 |
|
T17 |
10 |
| others[1] |
1121 |
1 |
|
T3 |
5 |
|
T17 |
9 |
|
T29 |
11 |
| others[2] |
1091 |
1 |
|
T3 |
11 |
|
T14 |
1 |
|
T17 |
11 |
| others[3] |
1709 |
1 |
|
T3 |
24 |
|
T13 |
1 |
|
T17 |
12 |
| false |
549 |
1 |
|
T3 |
4 |
|
T17 |
7 |
|
T29 |
2 |
| true |
1397 |
1 |
|
T16 |
1 |
|
T17 |
51 |
|
T29 |
28 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
239 |
1 |
|
T32 |
1 |
|
T50 |
1 |
|
T81 |
1 |
| others[1] |
249 |
1 |
|
T46 |
1 |
|
T95 |
1 |
|
T205 |
1 |
| others[2] |
201 |
1 |
|
T392 |
1 |
|
T28 |
7 |
|
T31 |
9 |
| others[3] |
389 |
1 |
|
T71 |
1 |
|
T34 |
1 |
|
T62 |
1 |
| false |
122 |
1 |
|
T56 |
1 |
|
T392 |
1 |
|
T28 |
2 |
| true |
5697 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
204 |
1 |
|
T124 |
1 |
|
T233 |
1 |
|
T28 |
8 |
| others[1] |
224 |
1 |
|
T72 |
1 |
|
T207 |
1 |
|
T28 |
15 |
| others[2] |
226 |
1 |
|
T51 |
1 |
|
T28 |
11 |
|
T31 |
9 |
| others[3] |
378 |
1 |
|
T81 |
1 |
|
T206 |
1 |
|
T157 |
1 |
| false |
106 |
1 |
|
T81 |
1 |
|
T28 |
1 |
|
T31 |
5 |
| true |
5759 |
1 |
|
T3 |
51 |
|
T13 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1274 |
1 |
|
T3 |
13 |
|
T17 |
21 |
|
T29 |
7 |
| others[1] |
1216 |
1 |
|
T3 |
10 |
|
T14 |
1 |
|
T17 |
17 |
| others[2] |
1241 |
1 |
|
T3 |
8 |
|
T13 |
1 |
|
T17 |
19 |
| others[3] |
2044 |
1 |
|
T3 |
14 |
|
T17 |
33 |
|
T29 |
23 |
| false |
631 |
1 |
|
T3 |
6 |
|
T15 |
1 |
|
T17 |
10 |
| true |
491 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| | | | | | | | | | | |
| others[0] |
1181 |
1 |
|
T3 |
6 |
|
T13 |
1 |
|
T15 |
1 |
| others[1] |
1257 |
1 |
|
T3 |
10 |
|
T14 |
1 |
|
T17 |
14 |
| others[2] |
1265 |
1 |
|
T3 |
15 |
|
T17 |
22 |
|
T29 |
15 |
| others[3] |
2114 |
1 |
|
T3 |
20 |
|
T17 |
31 |
|
T29 |
17 |
| false |
597 |
1 |
|
T17 |
11 |
|
T29 |
4 |
|
T5 |
1 |
| true |
483 |
1 |
|
T16 |
1 |
|
T18 |
1 |
|
T32 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |