| SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING | 
| 0.00 | 0.00 | 1 | 100 | 1 | 1 | 64 | 64 | 
| NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| buf_err_code_cg_wrap[OtpHwCfg0ErrIdx] | 0.00 | 1 | 100 | 1 | 64 | 64 | 
| buf_err_code_cg_wrap[OtpHwCfg1ErrIdx] | 0.00 | 1 | 100 | 1 | 64 | 64 | 
| buf_err_code_cg_wrap[OtpOwnerSwCfgErrIdx] | 0.00 | 1 | 100 | 1 | 64 | 64 | 
| buf_err_code_cg_wrap[OtpRotCreatorAuthCodesignErrIdx] | 0.00 | 1 | 100 | 1 | 64 | 64 | 
| buf_err_code_cg_wrap[OtpRotCreatorAuthStateErrIdx] | 0.00 | 1 | 100 | 1 | 64 | 64 | 
| buf_err_code_cg_wrap[OtpSecret0ErrIdx] | 0.00 | 1 | 100 | 1 | 64 | 64 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 0.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 6 | 6 | 0 | 0.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| err_code_vals | 6 | 6 | 0 | 0.00 | 100 | 1 | 1 | 0 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 0.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 6 | 6 | 0 | 0.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| err_code_vals | 6 | 6 | 0 | 0.00 | 100 | 1 | 1 | 0 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 0.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 6 | 6 | 0 | 0.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| err_code_vals | 6 | 6 | 0 | 0.00 | 100 | 1 | 1 | 0 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 0.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 6 | 6 | 0 | 0.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| err_code_vals | 6 | 6 | 0 | 0.00 | 100 | 1 | 1 | 0 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 0.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 6 | 6 | 0 | 0.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| err_code_vals | 6 | 6 | 0 | 0.00 | 100 | 1 | 1 | 0 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 0.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 6 | 6 | 0 | 0.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| err_code_vals | 6 | 6 | 0 | 0.00 | 100 | 1 | 1 | 0 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 6 | 6 | 0 | 0.00 | 
| NAME | COUNT | AT LEAST | NUMBER | STATUS | 
| fsm_err | 0 | 1 | 1 | |
| check_fail | 0 | 1 | 1 | |
| ecc_uncorr_err | 0 | 1 | 1 | |
| ecc_corr_err | 0 | 1 | 1 | |
| macro_err | 0 | 1 | 1 | |
| no_err | 0 | 1 | 1 | 
| NAME | COUNT | STATUS | 
| illegal_err | 0 | Illegal | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 6 | 6 | 0 | 0.00 | 
| NAME | COUNT | AT LEAST | NUMBER | STATUS | 
| fsm_err | 0 | 1 | 1 | |
| check_fail | 0 | 1 | 1 | |
| ecc_uncorr_err | 0 | 1 | 1 | |
| ecc_corr_err | 0 | 1 | 1 | |
| macro_err | 0 | 1 | 1 | |
| no_err | 0 | 1 | 1 | 
| NAME | COUNT | STATUS | 
| illegal_err | 0 | Illegal | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 6 | 6 | 0 | 0.00 | 
| NAME | COUNT | AT LEAST | NUMBER | STATUS | 
| fsm_err | 0 | 1 | 1 | |
| check_fail | 0 | 1 | 1 | |
| ecc_uncorr_err | 0 | 1 | 1 | |
| ecc_corr_err | 0 | 1 | 1 | |
| macro_err | 0 | 1 | 1 | |
| no_err | 0 | 1 | 1 | 
| NAME | COUNT | STATUS | 
| illegal_err | 0 | Illegal | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 6 | 6 | 0 | 0.00 | 
| NAME | COUNT | AT LEAST | NUMBER | STATUS | 
| fsm_err | 0 | 1 | 1 | |
| check_fail | 0 | 1 | 1 | |
| ecc_uncorr_err | 0 | 1 | 1 | |
| ecc_corr_err | 0 | 1 | 1 | |
| macro_err | 0 | 1 | 1 | |
| no_err | 0 | 1 | 1 | 
| NAME | COUNT | STATUS | 
| illegal_err | 0 | Illegal | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 6 | 6 | 0 | 0.00 | 
| NAME | COUNT | AT LEAST | NUMBER | STATUS | 
| fsm_err | 0 | 1 | 1 | |
| check_fail | 0 | 1 | 1 | |
| ecc_uncorr_err | 0 | 1 | 1 | |
| ecc_corr_err | 0 | 1 | 1 | |
| macro_err | 0 | 1 | 1 | |
| no_err | 0 | 1 | 1 | 
| NAME | COUNT | STATUS | 
| illegal_err | 0 | Illegal | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 6 | 6 | 0 | 0.00 | 
| NAME | COUNT | AT LEAST | NUMBER | STATUS | 
| fsm_err | 0 | 1 | 1 | |
| check_fail | 0 | 1 | 1 | |
| ecc_uncorr_err | 0 | 1 | 1 | |
| ecc_corr_err | 0 | 1 | 1 | |
| macro_err | 0 | 1 | 1 | |
| no_err | 0 | 1 | 1 | 
| NAME | COUNT | STATUS | 
| illegal_err | 0 | Illegal | 
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |