Unified Coverage Report :: Module :: prim_secded_hamming_22_16_enc

Module : prim_secded_hamming_22_16_enc

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/default/sim-vcs/../src/lowrisc_prim_secded_0.1/rtl/prim_secded_hamming_22_16_enc.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_otp.gen_generic.u_impl_generic.u_enc	100.00	100.00

---

Module Instance : tb.dut.u_otp.gen_generic.u_impl_generic.u_enc

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
99.45	97.27	100.00		100.00	100.00	100.00	gen_generic.u_impl_generic

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

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Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : prim_secded_hamming_22_16_enc

	Line No.	Total	Covered	Percent
TOTAL		7	7	100.00
ALWAYS	13	7	7	100.00

12                        always_comb begin : p_encode
13         1/1              data_o = 22'(data_i);
           Tests:       T1 T2 T3 
14         1/1              data_o[16] = ^(data_o & 22'h00AD5B);
           Tests:       T1 T2 T3 
15         1/1              data_o[17] = ^(data_o & 22'h00366D);
           Tests:       T1 T2 T3 
16         1/1              data_o[18] = ^(data_o & 22'h00C78E);
           Tests:       T1 T2 T3 
17         1/1              data_o[19] = ^(data_o & 22'h0007F0);
           Tests:       T1 T2 T3 
18         1/1              data_o[20] = ^(data_o & 22'h00F800);
           Tests:       T1 T2 T3 
19         1/1              data_o[21] = ^(data_o & 22'h1FFFFF);
           Tests:       T1 T2 T3