| T1073 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_parallel_lc_esc.2752595886 |
|
|
Sep 04 08:49:00 AM UTC 24 |
Sep 04 08:49:05 AM UTC 24 |
2172696640 ps |
| T1074 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/187.otp_ctrl_parallel_lc_esc.323087999 |
|
|
Sep 04 08:48:59 AM UTC 24 |
Sep 04 08:49:05 AM UTC 24 |
418596245 ps |
| T1075 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_init_fail.1025594689 |
|
|
Sep 04 08:49:00 AM UTC 24 |
Sep 04 08:49:05 AM UTC 24 |
1550979627 ps |
| T1076 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_init_fail.1256376556 |
|
|
Sep 04 08:49:00 AM UTC 24 |
Sep 04 08:49:05 AM UTC 24 |
117166369 ps |
| T1077 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_init_fail.44906270 |
|
|
Sep 04 08:49:00 AM UTC 24 |
Sep 04 08:49:05 AM UTC 24 |
159165550 ps |
| T1078 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_parallel_lc_esc.734005561 |
|
|
Sep 04 08:49:00 AM UTC 24 |
Sep 04 08:49:06 AM UTC 24 |
374507183 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_init_fail.2998267753 |
|
|
Sep 04 08:48:59 AM UTC 24 |
Sep 04 08:49:06 AM UTC 24 |
1734596531 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/183.otp_ctrl_parallel_lc_esc.3561246301 |
|
|
Sep 04 08:48:52 AM UTC 24 |
Sep 04 08:49:07 AM UTC 24 |
290100268 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_parallel_lc_esc.3089057130 |
|
|
Sep 04 08:49:00 AM UTC 24 |
Sep 04 08:49:08 AM UTC 24 |
1144893456 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_parallel_lc_esc.3844789908 |
|
|
Sep 04 08:49:00 AM UTC 24 |
Sep 04 08:49:08 AM UTC 24 |
3271608087 ps |
| T1083 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/203.otp_ctrl_init_fail.1648314706 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
168976272 ps |
| T1084 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_parallel_lc_esc.2137583508 |
|
|
Sep 04 08:48:52 AM UTC 24 |
Sep 04 08:49:09 AM UTC 24 |
2317345319 ps |
| T1085 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_stress_all_with_rand_reset.2102146858 |
|
|
Sep 04 08:47:25 AM UTC 24 |
Sep 04 08:49:11 AM UTC 24 |
38273255554 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/205.otp_ctrl_init_fail.4102632608 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:11 AM UTC 24 |
105695749 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/163.otp_ctrl_parallel_lc_esc.2037939693 |
|
|
Sep 04 08:48:40 AM UTC 24 |
Sep 04 08:49:11 AM UTC 24 |
2376328308 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_init_fail.3350279268 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:11 AM UTC 24 |
380001915 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/204.otp_ctrl_init_fail.2140856392 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:11 AM UTC 24 |
527181442 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/215.otp_ctrl_init_fail.1003197718 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:11 AM UTC 24 |
240135290 ps |
| T1091 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/214.otp_ctrl_init_fail.2596566536 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:11 AM UTC 24 |
257921251 ps |
| T1092 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/213.otp_ctrl_init_fail.2526450121 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
180760970 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/202.otp_ctrl_init_fail.3888393297 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
156380456 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/299.otp_ctrl_init_fail.397616589 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
128439122 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/210.otp_ctrl_init_fail.339113039 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
353156169 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/200.otp_ctrl_init_fail.3635766027 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
1870393063 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/217.otp_ctrl_init_fail.560669775 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
498819155 ps |
| T68 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/219.otp_ctrl_init_fail.3949856982 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
265878358 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/216.otp_ctrl_init_fail.506573647 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
477850394 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/218.otp_ctrl_init_fail.2057344881 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
111665676 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/221.otp_ctrl_init_fail.4194313789 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
127066077 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/211.otp_ctrl_init_fail.350246325 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
356870620 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/208.otp_ctrl_init_fail.3646540060 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
559965317 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/207.otp_ctrl_init_fail.4169070508 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
370914860 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_parallel_lc_esc.1892783596 |
|
|
Sep 04 08:49:00 AM UTC 24 |
Sep 04 08:49:12 AM UTC 24 |
883295869 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/220.otp_ctrl_init_fail.674526075 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
253190952 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/227.otp_ctrl_init_fail.2789817825 |
|
|
Sep 04 08:49:08 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
111804875 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/209.otp_ctrl_init_fail.1061190796 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
282228481 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/223.otp_ctrl_init_fail.2761080831 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
115152323 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/206.otp_ctrl_init_fail.617596480 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
272649882 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/228.otp_ctrl_init_fail.1170123034 |
|
|
Sep 04 08:49:08 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
512706200 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/226.otp_ctrl_init_fail.1223401001 |
|
|
Sep 04 08:49:08 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
458366299 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_parallel_lc_esc.3898370429 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
231742548 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/212.otp_ctrl_init_fail.126116850 |
|
|
Sep 04 08:49:07 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
195968200 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/184.otp_ctrl_parallel_lc_esc.2902825211 |
|
|
Sep 04 08:48:52 AM UTC 24 |
Sep 04 08:49:13 AM UTC 24 |
9017442510 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/189.otp_ctrl_parallel_lc_esc.2858543371 |
|
|
Sep 04 08:48:59 AM UTC 24 |
Sep 04 08:49:14 AM UTC 24 |
3167608778 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/225.otp_ctrl_init_fail.1661273174 |
|
|
Sep 04 08:49:08 AM UTC 24 |
Sep 04 08:49:14 AM UTC 24 |
2551395002 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_parallel_lc_esc.504404459 |
|
|
Sep 04 08:49:00 AM UTC 24 |
Sep 04 08:49:16 AM UTC 24 |
1087543311 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_parallel_lc_esc.3778711176 |
|
|
Sep 04 08:48:59 AM UTC 24 |
Sep 04 08:49:16 AM UTC 24 |
7383873412 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/229.otp_ctrl_init_fail.2832686816 |
|
|
Sep 04 08:49:17 AM UTC 24 |
Sep 04 08:49:21 AM UTC 24 |
230872018 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/239.otp_ctrl_init_fail.3795575511 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
185756599 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/247.otp_ctrl_init_fail.2701877389 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
179493782 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/235.otp_ctrl_init_fail.2827391727 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
1987001977 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/238.otp_ctrl_init_fail.3347903081 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
184858719 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/236.otp_ctrl_init_fail.4129299003 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
333369773 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/245.otp_ctrl_init_fail.2340376552 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
147251475 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/233.otp_ctrl_init_fail.2117099755 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
399838739 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/242.otp_ctrl_init_fail.2057100577 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
176399567 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/241.otp_ctrl_init_fail.908190460 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
239075660 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/237.otp_ctrl_init_fail.1879032196 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:22 AM UTC 24 |
231458967 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/256.otp_ctrl_init_fail.22384488 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
197816741 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/267.otp_ctrl_init_fail.3134908821 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
97592801 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/263.otp_ctrl_init_fail.2937543465 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
154451694 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/234.otp_ctrl_init_fail.566981268 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
113997492 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/265.otp_ctrl_init_fail.1373392066 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
116641306 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/255.otp_ctrl_init_fail.2777618547 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
403456945 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/257.otp_ctrl_init_fail.2568779395 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
176821831 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/246.otp_ctrl_init_fail.1006537234 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
122702436 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/253.otp_ctrl_init_fail.784954045 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
297597376 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/248.otp_ctrl_init_fail.3090284087 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
506517531 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/262.otp_ctrl_init_fail.1137987207 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
180934486 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/240.otp_ctrl_init_fail.4045036132 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
1686930542 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/268.otp_ctrl_init_fail.793854653 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
132315579 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/188.otp_ctrl_parallel_lc_esc.597988257 |
|
|
Sep 04 08:48:59 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
1937778934 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/260.otp_ctrl_init_fail.2335160361 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
474427021 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/264.otp_ctrl_init_fail.3154702348 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:23 AM UTC 24 |
1569558435 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/232.otp_ctrl_init_fail.2221184177 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
2411689430 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/244.otp_ctrl_init_fail.1862501082 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
372467511 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/266.otp_ctrl_init_fail.493259727 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
400779459 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/230.otp_ctrl_init_fail.913956439 |
|
|
Sep 04 08:49:17 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
1867289542 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/243.otp_ctrl_init_fail.2480739711 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
290056990 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/261.otp_ctrl_init_fail.3881753503 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
336400166 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/251.otp_ctrl_init_fail.1971543958 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
320933196 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/259.otp_ctrl_init_fail.625895621 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
2277078238 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/250.otp_ctrl_init_fail.497149789 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
172281542 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/252.otp_ctrl_init_fail.254976777 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
475779371 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/249.otp_ctrl_init_fail.1683644202 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
601422680 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/258.otp_ctrl_init_fail.769406113 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:24 AM UTC 24 |
613173314 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/254.otp_ctrl_init_fail.3947953257 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:25 AM UTC 24 |
265790169 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/270.otp_ctrl_init_fail.2879142089 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:25 AM UTC 24 |
1562917641 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/79.otp_ctrl_stress_all_with_rand_reset.4130775722 |
|
|
Sep 04 08:46:59 AM UTC 24 |
Sep 04 08:49:25 AM UTC 24 |
14046890900 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/269.otp_ctrl_init_fail.3556306984 |
|
|
Sep 04 08:49:18 AM UTC 24 |
Sep 04 08:49:25 AM UTC 24 |
359361673 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/231.otp_ctrl_init_fail.2076256817 |
|
|
Sep 04 08:49:17 AM UTC 24 |
Sep 04 08:49:25 AM UTC 24 |
1983546620 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_stress_all.546616779 |
|
|
Sep 04 08:45:20 AM UTC 24 |
Sep 04 08:49:27 AM UTC 24 |
36260674065 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/276.otp_ctrl_init_fail.2632459369 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:32 AM UTC 24 |
137883523 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/281.otp_ctrl_init_fail.428002026 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
282690512 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/272.otp_ctrl_init_fail.1366871983 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
113781477 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/271.otp_ctrl_init_fail.1387515959 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
469778949 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/282.otp_ctrl_init_fail.1863436154 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
587033298 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/273.otp_ctrl_init_fail.2884073544 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
1933256866 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/275.otp_ctrl_init_fail.901025009 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
364480350 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/283.otp_ctrl_init_fail.2608227140 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
129818553 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/274.otp_ctrl_init_fail.396043103 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
419855200 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/285.otp_ctrl_init_fail.567871031 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
156758159 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/288.otp_ctrl_init_fail.1470315870 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
1843009670 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/290.otp_ctrl_init_fail.1373515876 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:33 AM UTC 24 |
452526751 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/284.otp_ctrl_init_fail.1498739671 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
2012169452 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/295.otp_ctrl_init_fail.351192487 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
575174511 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/291.otp_ctrl_init_fail.1877554875 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
141367221 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/280.otp_ctrl_init_fail.808607004 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
1930620322 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/297.otp_ctrl_init_fail.578370507 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
605288156 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/278.otp_ctrl_init_fail.2115168907 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
151026461 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/293.otp_ctrl_init_fail.242862439 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
241213214 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/292.otp_ctrl_init_fail.3378813966 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
417696460 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/287.otp_ctrl_init_fail.3416352951 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
136912088 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/289.otp_ctrl_init_fail.36608788 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
398463964 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/277.otp_ctrl_init_fail.2504847899 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
302765411 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/294.otp_ctrl_init_fail.3431742920 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:34 AM UTC 24 |
297370117 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/296.otp_ctrl_init_fail.3865172756 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:35 AM UTC 24 |
210044896 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/279.otp_ctrl_init_fail.1138216504 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:35 AM UTC 24 |
516083086 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/286.otp_ctrl_init_fail.2835542388 |
|
|
Sep 04 08:49:28 AM UTC 24 |
Sep 04 08:49:35 AM UTC 24 |
497490982 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/298.otp_ctrl_init_fail.314214846 |
|
|
Sep 04 08:49:29 AM UTC 24 |
Sep 04 08:49:35 AM UTC 24 |
1246422788 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/58.otp_ctrl_stress_all_with_rand_reset.303069260 |
|
|
Sep 04 08:46:17 AM UTC 24 |
Sep 04 08:50:14 AM UTC 24 |
97748813132 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_stress_all.1918194400 |
|
|
Sep 04 08:45:39 AM UTC 24 |
Sep 04 08:51:47 AM UTC 24 |
140170741360 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_stress_all.2994465710 |
|
|
Sep 04 08:45:44 AM UTC 24 |
Sep 04 08:51:52 AM UTC 24 |
61642105537 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_stress_all.3134088854 |
|
|
Sep 04 08:46:08 AM UTC 24 |
Sep 04 08:51:54 AM UTC 24 |
170549051785 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_stress_all.3098882085 |
|
|
Sep 04 08:45:52 AM UTC 24 |
Sep 04 08:51:54 AM UTC 24 |
194014528246 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.318459073 |
|
|
Sep 04 08:37:34 AM UTC 24 |
Sep 04 08:37:37 AM UTC 24 |
51903854 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.3667628972 |
|
|
Sep 04 08:37:35 AM UTC 24 |
Sep 04 08:37:38 AM UTC 24 |
101224147 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.520855024 |
|
|
Sep 04 08:37:35 AM UTC 24 |
Sep 04 08:37:38 AM UTC 24 |
72609662 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.1527065877 |
|
|
Sep 04 08:37:35 AM UTC 24 |
Sep 04 08:37:39 AM UTC 24 |
89625726 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.2236852016 |
|
|
Sep 04 08:37:33 AM UTC 24 |
Sep 04 08:37:39 AM UTC 24 |
64638359 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.3331862959 |
|
|
Sep 04 08:37:35 AM UTC 24 |
Sep 04 08:37:39 AM UTC 24 |
583043495 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.2439567249 |
|
|
Sep 04 08:37:36 AM UTC 24 |
Sep 04 08:37:42 AM UTC 24 |
81339433 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.2709549133 |
|
|
Sep 04 08:37:38 AM UTC 24 |
Sep 04 08:37:43 AM UTC 24 |
1024283216 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.965699461 |
|
|
Sep 04 08:37:40 AM UTC 24 |
Sep 04 08:37:44 AM UTC 24 |
36305291 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.1513571547 |
|
|
Sep 04 08:37:40 AM UTC 24 |
Sep 04 08:37:44 AM UTC 24 |
46698189 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.3405504325 |
|
|
Sep 04 08:37:40 AM UTC 24 |
Sep 04 08:37:44 AM UTC 24 |
36226443 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.4283100893 |
|
|
Sep 04 08:37:39 AM UTC 24 |
Sep 04 08:37:44 AM UTC 24 |
256069483 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.1422177404 |
|
|
Sep 04 08:37:42 AM UTC 24 |
Sep 04 08:37:45 AM UTC 24 |
52010449 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.375452012 |
|
|
Sep 04 08:37:41 AM UTC 24 |
Sep 04 08:37:46 AM UTC 24 |
1017066442 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.666187286 |
|
|
Sep 04 08:37:36 AM UTC 24 |
Sep 04 08:37:46 AM UTC 24 |
840198345 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.2182215895 |
|
|
Sep 04 08:37:39 AM UTC 24 |
Sep 04 08:37:47 AM UTC 24 |
73009348 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.2968258725 |
|
|
Sep 04 08:37:45 AM UTC 24 |
Sep 04 08:37:47 AM UTC 24 |
41002437 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.2859290955 |
|
|
Sep 04 08:37:45 AM UTC 24 |
Sep 04 08:37:48 AM UTC 24 |
654479247 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.218527572 |
|
|
Sep 04 08:37:46 AM UTC 24 |
Sep 04 08:37:48 AM UTC 24 |
147692361 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.3884020441 |
|
|
Sep 04 08:37:44 AM UTC 24 |
Sep 04 08:37:49 AM UTC 24 |
57280490 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.1794925882 |
|
|
Sep 04 08:37:46 AM UTC 24 |
Sep 04 08:37:49 AM UTC 24 |
70437605 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.596233784 |
|
|
Sep 04 08:37:45 AM UTC 24 |
Sep 04 08:37:51 AM UTC 24 |
1665147146 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.3337830499 |
|
|
Sep 04 08:37:45 AM UTC 24 |
Sep 04 08:37:51 AM UTC 24 |
849008982 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.1162259049 |
|
|
Sep 04 08:37:56 AM UTC 24 |
Sep 04 08:38:15 AM UTC 24 |
2445573971 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.3154265634 |
|
|
Sep 04 08:37:48 AM UTC 24 |
Sep 04 08:37:52 AM UTC 24 |
653222132 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2700013322 |
|
|
Sep 04 08:37:47 AM UTC 24 |
Sep 04 08:37:52 AM UTC 24 |
92522606 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_walk.3405722586 |
|
|
Sep 04 08:37:50 AM UTC 24 |
Sep 04 08:37:53 AM UTC 24 |
39329320 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.2949363956 |
|
|
Sep 04 08:37:43 AM UTC 24 |
Sep 04 08:37:53 AM UTC 24 |
248069223 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_intr_test.865104264 |
|
|
Sep 04 08:37:50 AM UTC 24 |
Sep 04 08:37:53 AM UTC 24 |
104940343 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.2561282160 |
|
|
Sep 04 08:37:49 AM UTC 24 |
Sep 04 08:37:53 AM UTC 24 |
71623993 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.3156501018 |
|
|
Sep 04 08:37:33 AM UTC 24 |
Sep 04 08:37:54 AM UTC 24 |
1933604567 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.3490489381 |
|
|
Sep 04 08:37:49 AM UTC 24 |
Sep 04 08:37:55 AM UTC 24 |
118596941 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.1765724725 |
|
|
Sep 04 08:37:52 AM UTC 24 |
Sep 04 08:37:55 AM UTC 24 |
73269771 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.754599656 |
|
|
Sep 04 08:37:45 AM UTC 24 |
Sep 04 08:37:56 AM UTC 24 |
675376556 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_rw.2236202673 |
|
|
Sep 04 08:37:53 AM UTC 24 |
Sep 04 08:37:57 AM UTC 24 |
141422485 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.3624954653 |
|
|
Sep 04 08:37:52 AM UTC 24 |
Sep 04 08:37:57 AM UTC 24 |
1442487769 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.3017951337 |
|
|
Sep 04 08:37:48 AM UTC 24 |
Sep 04 08:37:57 AM UTC 24 |
179744148 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.1336889231 |
|
|
Sep 04 08:37:40 AM UTC 24 |
Sep 04 08:37:58 AM UTC 24 |
2499223316 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.3731284430 |
|
|
Sep 04 08:37:48 AM UTC 24 |
Sep 04 08:37:58 AM UTC 24 |
774017944 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_errors.307190105 |
|
|
Sep 04 08:37:49 AM UTC 24 |
Sep 04 08:37:58 AM UTC 24 |
647425390 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_intr_test.2832711658 |
|
|
Sep 04 08:37:56 AM UTC 24 |
Sep 04 08:37:59 AM UTC 24 |
139766901 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.2040971499 |
|
|
Sep 04 08:37:54 AM UTC 24 |
Sep 04 08:37:59 AM UTC 24 |
206923174 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.1725996839 |
|
|
Sep 04 08:37:54 AM UTC 24 |
Sep 04 08:37:59 AM UTC 24 |
961865617 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.2244027817 |
|
|
Sep 04 08:37:57 AM UTC 24 |
Sep 04 08:37:59 AM UTC 24 |
37635683 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.16686466 |
|
|
Sep 04 08:37:57 AM UTC 24 |
Sep 04 08:38:00 AM UTC 24 |
263890474 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_walk.912411671 |
|
|
Sep 04 08:37:57 AM UTC 24 |
Sep 04 08:38:00 AM UTC 24 |
68119094 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.4008360462 |
|
|
Sep 04 08:37:54 AM UTC 24 |
Sep 04 08:38:01 AM UTC 24 |
81827547 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_rw.1536166566 |
|
|
Sep 04 08:37:58 AM UTC 24 |
Sep 04 08:38:01 AM UTC 24 |
59539845 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_errors.3615875385 |
|
|
Sep 04 08:37:54 AM UTC 24 |
Sep 04 08:38:01 AM UTC 24 |
2938460666 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_intr_test.3947810994 |
|
|
Sep 04 08:37:59 AM UTC 24 |
Sep 04 08:38:02 AM UTC 24 |
136106920 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.2646186276 |
|
|
Sep 04 08:37:59 AM UTC 24 |
Sep 04 08:38:03 AM UTC 24 |
270131583 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.3495849654 |
|
|
Sep 04 08:37:59 AM UTC 24 |
Sep 04 08:38:03 AM UTC 24 |
179907785 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_rw.496513643 |
|
|
Sep 04 08:38:00 AM UTC 24 |
Sep 04 08:38:04 AM UTC 24 |
94259599 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_errors.600684164 |
|
|
Sep 04 08:37:59 AM UTC 24 |
Sep 04 08:38:05 AM UTC 24 |
123689074 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.255685315 |
|
|
Sep 04 08:38:00 AM UTC 24 |
Sep 04 08:38:05 AM UTC 24 |
124261211 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_intr_test.1400234105 |
|
|
Sep 04 08:38:06 AM UTC 24 |
Sep 04 08:38:10 AM UTC 24 |
150187496 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.4220041525 |
|
|
Sep 04 08:37:58 AM UTC 24 |
Sep 04 08:38:05 AM UTC 24 |
310556761 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.457351622 |
|
|
Sep 04 08:38:00 AM UTC 24 |
Sep 04 08:38:05 AM UTC 24 |
99623783 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.2498093827 |
|
|
Sep 04 08:37:53 AM UTC 24 |
Sep 04 08:38:05 AM UTC 24 |
1671550940 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.306414933 |
|
|
Sep 04 08:37:50 AM UTC 24 |
Sep 04 08:38:06 AM UTC 24 |
1470797175 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_intr_test.2691548344 |
|
|
Sep 04 08:38:03 AM UTC 24 |
Sep 04 08:38:06 AM UTC 24 |
91627469 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_rw.2782168064 |
|
|
Sep 04 08:38:03 AM UTC 24 |
Sep 04 08:38:06 AM UTC 24 |
625376479 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.2895886538 |
|
|
Sep 04 08:38:03 AM UTC 24 |
Sep 04 08:38:07 AM UTC 24 |
72995082 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.2940216521 |
|
|
Sep 04 08:38:04 AM UTC 24 |
Sep 04 08:38:08 AM UTC 24 |
109141291 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.2503181600 |
|
|
Sep 04 08:37:58 AM UTC 24 |
Sep 04 08:38:08 AM UTC 24 |
2986012605 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_intr_test.151866845 |
|
|
Sep 04 08:38:05 AM UTC 24 |
Sep 04 08:38:08 AM UTC 24 |
59804623 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_errors.4045307886 |
|
|
Sep 04 08:38:00 AM UTC 24 |
Sep 04 08:38:09 AM UTC 24 |
346611181 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_rw.3657538923 |
|
|
Sep 04 08:38:06 AM UTC 24 |
Sep 04 08:38:09 AM UTC 24 |
53873926 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.725086468 |
|
|
Sep 04 08:38:26 AM UTC 24 |
Sep 04 08:38:29 AM UTC 24 |
41497915 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.322402656 |
|
|
Sep 04 08:38:06 AM UTC 24 |
Sep 04 08:38:11 AM UTC 24 |
87720310 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_rw.44843894 |
|
|
Sep 04 08:38:07 AM UTC 24 |
Sep 04 08:38:12 AM UTC 24 |
177442618 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_errors.2818256769 |
|
|
Sep 04 08:38:04 AM UTC 24 |
Sep 04 08:38:12 AM UTC 24 |
373090017 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.1847846988 |
|
|
Sep 04 08:38:07 AM UTC 24 |
Sep 04 08:38:12 AM UTC 24 |
134432600 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_intr_test.1286507545 |
|
|
Sep 04 08:38:09 AM UTC 24 |
Sep 04 08:38:13 AM UTC 24 |
155559836 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.3806854540 |
|
|
Sep 04 08:38:07 AM UTC 24 |
Sep 04 08:38:13 AM UTC 24 |
135447830 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.1506991066 |
|
|
Sep 04 08:38:06 AM UTC 24 |
Sep 04 08:38:13 AM UTC 24 |
131894943 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_rw.1159846842 |
|
|
Sep 04 08:38:09 AM UTC 24 |
Sep 04 08:38:13 AM UTC 24 |
179213397 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_errors.48392842 |
|
|
Sep 04 08:38:06 AM UTC 24 |
Sep 04 08:38:13 AM UTC 24 |
1641207166 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_errors.454676994 |
|
|
Sep 04 08:38:07 AM UTC 24 |
Sep 04 08:38:16 AM UTC 24 |
362327538 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.181344217 |
|
|
Sep 04 08:38:19 AM UTC 24 |
Sep 04 08:38:22 AM UTC 24 |
606169856 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.4029576229 |
|
|
Sep 04 08:38:10 AM UTC 24 |
Sep 04 08:38:15 AM UTC 24 |
376858788 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.1200457103 |
|
|
Sep 04 08:38:12 AM UTC 24 |
Sep 04 08:38:15 AM UTC 24 |
138413054 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.3298736075 |
|
|
Sep 04 08:38:11 AM UTC 24 |
Sep 04 08:38:16 AM UTC 24 |
754670110 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3299521094 |
|
|
Sep 04 08:38:13 AM UTC 24 |
Sep 04 08:38:16 AM UTC 24 |
36943258 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.1800168702 |
|
|
Sep 04 08:38:13 AM UTC 24 |
Sep 04 08:38:17 AM UTC 24 |
660197106 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.3189585339 |
|
|
Sep 04 08:38:14 AM UTC 24 |
Sep 04 08:38:18 AM UTC 24 |
142149696 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.3709527756 |
|
|
Sep 04 08:38:14 AM UTC 24 |
Sep 04 08:38:18 AM UTC 24 |
171436396 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.2909015121 |
|
|
Sep 04 08:38:13 AM UTC 24 |
Sep 04 08:38:18 AM UTC 24 |
236394966 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.2673798591 |
|
|
Sep 04 08:38:15 AM UTC 24 |
Sep 04 08:38:20 AM UTC 24 |
650168110 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.4159525495 |
|
|
Sep 04 08:38:17 AM UTC 24 |
Sep 04 08:38:20 AM UTC 24 |
160395820 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.1393637330 |
|
|
Sep 04 08:38:18 AM UTC 24 |
Sep 04 08:38:21 AM UTC 24 |
168047986 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.3086374373 |
|
|
Sep 04 08:38:15 AM UTC 24 |
Sep 04 08:38:21 AM UTC 24 |
109496224 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.3672467974 |
|
|
Sep 04 08:38:18 AM UTC 24 |
Sep 04 08:38:21 AM UTC 24 |
62839855 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.1103160450 |
|
|
Sep 04 08:38:19 AM UTC 24 |
Sep 04 08:38:22 AM UTC 24 |
70581696 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.3777797438 |
|
|
Sep 04 08:38:18 AM UTC 24 |
Sep 04 08:38:23 AM UTC 24 |
198754895 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.3528375426 |
|
|
Sep 04 08:38:19 AM UTC 24 |
Sep 04 08:38:23 AM UTC 24 |
76217003 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.3285021017 |
|
|
Sep 04 08:38:15 AM UTC 24 |
Sep 04 08:38:23 AM UTC 24 |
175737455 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.889576986 |
|
|
Sep 04 08:38:21 AM UTC 24 |
Sep 04 08:38:24 AM UTC 24 |
69974011 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.3136974607 |
|
|
Sep 04 08:38:14 AM UTC 24 |
Sep 04 08:38:25 AM UTC 24 |
3216256525 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.981562827 |
|
|
Sep 04 08:38:20 AM UTC 24 |
Sep 04 08:38:25 AM UTC 24 |
105406206 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_errors.3530149644 |
|
|
Sep 04 08:38:18 AM UTC 24 |
Sep 04 08:38:25 AM UTC 24 |
299135924 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.1157360926 |
|
|
Sep 04 08:37:59 AM UTC 24 |
Sep 04 08:38:25 AM UTC 24 |
9773669158 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.3819183987 |
|
|
Sep 04 08:38:06 AM UTC 24 |
Sep 04 08:38:25 AM UTC 24 |
4584538311 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.3015719204 |
|
|
Sep 04 08:38:21 AM UTC 24 |
Sep 04 08:38:25 AM UTC 24 |
56497991 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.3392219308 |
|
|
Sep 04 08:38:21 AM UTC 24 |
Sep 04 08:38:26 AM UTC 24 |
254650799 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.2803412110 |
|
|
Sep 04 08:38:24 AM UTC 24 |
Sep 04 08:38:27 AM UTC 24 |
50278067 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.3251379472 |
|
|
Sep 04 08:38:22 AM UTC 24 |
Sep 04 08:38:27 AM UTC 24 |
270218208 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.1255100607 |
|
|
Sep 04 08:38:24 AM UTC 24 |
Sep 04 08:38:28 AM UTC 24 |
137438276 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.3261178555 |
|
|
Sep 04 08:38:04 AM UTC 24 |
Sep 04 08:38:28 AM UTC 24 |
4971419589 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_errors.3780931751 |
|
|
Sep 04 08:38:20 AM UTC 24 |
Sep 04 08:38:28 AM UTC 24 |
165295124 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_errors.1106971774 |
|
|
Sep 04 08:38:24 AM UTC 24 |
Sep 04 08:38:29 AM UTC 24 |
841443078 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.916529685 |
|
|
Sep 04 08:38:26 AM UTC 24 |
Sep 04 08:38:30 AM UTC 24 |
142279346 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.1773536741 |
|
|
Sep 04 08:38:25 AM UTC 24 |
Sep 04 08:38:30 AM UTC 24 |
119392664 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_errors.172434379 |
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|
Sep 04 08:38:26 AM UTC 24 |
Sep 04 08:38:31 AM UTC 24 |
118420181 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/36.otp_ctrl_intr_test.940730114 |
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|
Sep 04 08:38:38 AM UTC 24 |
Sep 04 08:38:41 AM UTC 24 |
572572912 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.1336321882 |
|
|
Sep 04 08:38:28 AM UTC 24 |
Sep 04 08:38:32 AM UTC 24 |
131434392 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_errors.3741461361 |
|
|
Sep 04 08:38:25 AM UTC 24 |
Sep 04 08:38:32 AM UTC 24 |
826442679 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.1488706921 |
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|
Sep 04 08:38:25 AM UTC 24 |
Sep 04 08:38:32 AM UTC 24 |
204316176 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.3811972593 |
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|
Sep 04 08:38:26 AM UTC 24 |
Sep 04 08:38:33 AM UTC 24 |
267809326 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.4256464884 |
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|
Sep 04 08:38:28 AM UTC 24 |
Sep 04 08:38:33 AM UTC 24 |
55358709 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.1253041932 |
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|
Sep 04 08:38:26 AM UTC 24 |
Sep 04 08:38:33 AM UTC 24 |
426248004 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.1838366984 |
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|
Sep 04 08:38:28 AM UTC 24 |
Sep 04 08:38:33 AM UTC 24 |
674228305 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.690076129 |
|
|
Sep 04 08:38:12 AM UTC 24 |
Sep 04 08:38:33 AM UTC 24 |
4801208841 ps |
| T1258 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.3905124821 |
|
|
Sep 04 08:38:30 AM UTC 24 |
Sep 04 08:38:33 AM UTC 24 |
135870813 ps |
| T1259 |
/workspaces/repo/scratch/os_regression_2024_09_03/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.1706751483 |
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|
Sep 04 08:38:30 AM UTC 24 |
Sep 04 08:38:33 AM UTC 24 |
168208027 ps |