Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
dashboard | hierarchy | modlist | groups | tests | asserts


Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
flash_index 2 0 2 100.00 100 1 1 0
secret1_lock 2 0 2 100.00 100 1 1 2


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
flash_req_lock_cross 4 0 4 100.00 100 1 1 0


Summary for Variable flash_index

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for flash_index

Excluded/Illegal bins
NAMECOUNTSTATUS
il 0 Illegal


Covered bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
flash_addr_key 4038 1 T2 1 T4 4 T5 1
flash_data_key 3971 1 T2 1 T4 4 T5 1



Summary for Variable secret1_lock

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for secret1_lock

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 3984 1 T2 2 T4 4 T5 2
auto[1] 4025 1 T4 4 T97 2 T24 2



Summary for Cross flash_req_lock_cross

Samples crossed: flash_index secret1_lock
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for flash_req_lock_cross

Bins
flash_index   secret1_lock   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
flash_addr_key auto[0] 2015 1 T2 1 T4 2 T5 1
flash_addr_key auto[1] 2023 1 T4 2 T97 1 T24 1
flash_data_key auto[0] 1969 1 T2 1 T4 2 T5 1
flash_data_key auto[1] 2002 1 T4 2 T97 1 T24 1