Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.10 93.68 96.65 96.02 92.29 97.50 96.37 93.21


Total tests in report: 1288
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
68.90 68.90 87.21 87.21 79.47 79.47 56.31 56.31 46.02 46.02 82.28 82.28 89.91 89.91 41.10 41.10 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_req.1878716233
72.61 3.71 89.23 2.02 82.32 2.85 59.94 3.63 55.42 9.40 85.27 2.99 89.98 0.07 46.10 5.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_check_fail.913041485
76.12 3.51 90.71 1.48 87.61 5.29 66.68 6.74 57.11 1.69 90.03 4.77 90.52 0.54 50.18 4.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_test_access.256564066
78.42 2.30 91.20 0.49 90.88 3.27 69.88 3.20 58.55 1.45 91.48 1.44 91.12 0.61 55.83 5.65 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all_with_rand_reset.966092685
80.10 1.68 91.20 0.00 91.26 0.37 75.61 5.73 58.55 0.00 91.67 0.19 91.12 0.00 61.26 5.43 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.4058963011
81.20 1.11 91.22 0.02 91.68 0.42 76.75 1.14 61.93 3.37 91.82 0.14 91.12 0.00 63.90 2.64 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_stress_all.1909165895
82.23 1.03 91.37 0.15 92.18 0.50 78.18 1.43 64.58 2.65 92.15 0.34 91.12 0.00 66.05 2.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_check_fail.2520712443
83.09 0.86 91.63 0.26 92.91 0.72 78.66 0.48 64.58 0.00 94.03 1.88 93.41 2.29 66.40 0.36 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_sec_cm.1233975762
83.88 0.79 91.91 0.28 93.06 0.15 79.54 0.88 66.51 1.93 94.56 0.53 93.41 0.00 68.19 1.79 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_esc.1575931421
84.67 0.79 91.96 0.05 93.31 0.25 80.78 1.24 68.19 1.69 94.66 0.10 93.48 0.07 70.34 2.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_check_fail.465334556
85.30 0.63 92.01 0.05 93.38 0.07 83.73 2.95 69.40 1.20 94.70 0.05 93.48 0.00 70.41 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_init_fail.2153057589
85.90 0.60 92.01 0.00 93.43 0.05 85.30 1.57 69.64 0.24 94.70 0.00 93.54 0.07 72.69 2.29 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all.3588113143
86.47 0.57 92.01 0.00 94.21 0.77 85.32 0.01 70.60 0.96 94.80 0.10 93.54 0.00 74.84 2.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all_with_rand_reset.783150939
87.01 0.54 92.19 0.18 94.31 0.10 85.73 0.42 72.05 1.45 94.99 0.19 93.81 0.27 75.98 1.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_macro_errs.3420585211
87.48 0.48 92.19 0.00 94.31 0.00 86.27 0.53 74.70 2.65 94.99 0.00 93.81 0.00 76.13 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_esc.150762600
87.89 0.41 92.19 0.00 94.51 0.20 87.79 1.52 74.70 0.00 94.99 0.00 93.81 0.00 77.27 1.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_key_req.468994894
88.29 0.40 92.33 0.15 94.66 0.15 87.87 0.08 76.39 1.69 95.28 0.29 94.01 0.20 77.48 0.21 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/175.otp_ctrl_init_fail.858427824
88.65 0.36 92.33 0.00 94.66 0.00 89.98 2.11 76.39 0.00 95.28 0.00 94.01 0.00 77.91 0.43 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_regwen.2114371502
88.99 0.33 92.35 0.02 94.86 0.20 89.98 0.00 76.39 0.00 95.33 0.05 94.01 0.00 79.99 2.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.4067912953
89.31 0.33 92.45 0.10 94.96 0.10 90.90 0.92 77.35 0.96 95.52 0.19 94.01 0.00 79.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_init_fail.791806062
89.61 0.30 92.45 0.00 94.98 0.02 91.68 0.78 77.35 0.00 95.52 0.00 94.01 0.00 81.27 1.29 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all.2791775740
89.90 0.29 92.51 0.07 95.03 0.05 91.68 0.00 79.04 1.69 95.67 0.14 94.01 0.00 81.34 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/123.otp_ctrl_init_fail.485217722
90.17 0.27 92.51 0.00 95.05 0.02 91.68 0.00 79.04 0.00 95.67 0.00 94.01 0.00 83.20 1.86 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_stress_all_with_rand_reset.424491947
90.41 0.25 92.56 0.05 95.08 0.02 91.77 0.09 80.48 1.45 95.71 0.05 94.01 0.00 83.27 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_init_fail.2627617645
90.66 0.24 92.56 0.00 95.10 0.02 92.54 0.77 80.48 0.00 95.76 0.05 94.01 0.00 84.13 0.86 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_req.3148633787
90.86 0.20 92.58 0.02 95.33 0.22 92.83 0.29 80.48 0.00 95.91 0.14 94.01 0.00 84.85 0.71 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_background_chks.3427412249
91.05 0.19 92.76 0.18 95.63 0.30 92.95 0.12 80.48 0.00 95.96 0.05 94.01 0.00 85.56 0.71 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_alert_test.685098530
91.24 0.19 92.76 0.00 95.65 0.02 92.95 0.00 80.48 0.00 95.96 0.00 95.16 1.14 85.70 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.1880116815
91.42 0.18 92.81 0.05 95.68 0.02 93.24 0.29 81.20 0.72 96.00 0.05 95.16 0.00 85.85 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_init_fail.686237708
91.60 0.18 92.81 0.00 95.68 0.00 93.33 0.08 81.93 0.72 96.00 0.00 95.16 0.00 86.28 0.43 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all.1010224780
91.77 0.17 92.88 0.07 95.73 0.05 93.45 0.13 82.65 0.72 96.15 0.14 95.23 0.07 86.28 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/66.otp_ctrl_init_fail.421845117
91.92 0.16 92.93 0.05 95.75 0.02 93.68 0.23 83.13 0.48 96.20 0.05 95.29 0.07 86.49 0.21 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_macro_errs.2610520922
92.08 0.15 92.99 0.07 95.80 0.05 93.68 0.00 83.86 0.72 96.34 0.14 95.29 0.00 86.56 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/50.otp_ctrl_init_fail.843097891
92.22 0.14 92.99 0.00 95.80 0.00 93.68 0.00 84.34 0.48 96.34 0.00 95.29 0.00 87.06 0.50 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all_with_rand_reset.1454172621
92.36 0.14 92.99 0.00 95.83 0.02 93.68 0.00 84.34 0.00 96.34 0.00 96.03 0.74 87.28 0.21 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_stress_all_with_rand_reset.1624815575
92.49 0.13 92.99 0.00 95.83 0.00 93.68 0.00 84.82 0.48 96.34 0.00 96.03 0.00 87.71 0.43 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_stress_all.2284581347
92.61 0.13 92.99 0.00 95.83 0.00 93.80 0.12 84.82 0.00 96.34 0.00 96.03 0.00 88.49 0.79 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_test_access.1354315394
92.74 0.13 92.99 0.00 95.88 0.05 94.22 0.42 84.82 0.00 96.39 0.05 96.03 0.00 88.85 0.36 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_req.4031695110
92.86 0.12 93.04 0.05 95.93 0.05 94.25 0.03 85.30 0.48 96.49 0.10 96.10 0.07 88.92 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/59.otp_ctrl_init_fail.4135921750
92.98 0.12 93.09 0.05 95.93 0.00 94.25 0.00 86.02 0.72 96.53 0.05 96.10 0.00 88.92 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_check_fail.2414666271
93.09 0.11 93.12 0.03 96.18 0.25 94.25 0.00 86.02 0.00 96.73 0.19 96.10 0.00 89.21 0.29 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_errs.1256348450
93.19 0.11 93.20 0.08 96.18 0.00 94.25 0.00 86.51 0.48 96.77 0.05 96.10 0.00 89.35 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_stress_all_with_rand_reset.1506661292
93.29 0.10 93.25 0.05 96.20 0.02 94.25 0.00 86.99 0.48 96.82 0.05 96.10 0.00 89.42 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/110.otp_ctrl_init_fail.556677251
93.39 0.10 93.30 0.05 96.23 0.02 94.25 0.00 87.47 0.48 96.87 0.05 96.10 0.00 89.49 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/53.otp_ctrl_init_fail.1371896130
93.48 0.09 93.35 0.05 96.25 0.02 94.25 0.00 87.95 0.48 96.97 0.10 96.10 0.00 89.49 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/160.otp_ctrl_init_fail.3586302778
93.57 0.09 93.35 0.00 96.28 0.02 94.33 0.08 87.95 0.00 96.97 0.00 96.10 0.00 89.99 0.50 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_key_req.2345116832
93.65 0.08 93.38 0.03 96.30 0.02 94.33 0.00 88.43 0.48 97.01 0.05 96.10 0.00 89.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.2202599169
93.73 0.08 93.42 0.03 96.30 0.00 94.33 0.00 88.92 0.48 97.06 0.05 96.10 0.00 89.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_init_fail.1714063761
93.81 0.08 93.42 0.00 96.30 0.00 94.33 0.00 89.40 0.48 97.06 0.00 96.10 0.00 90.06 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_stress_all_with_rand_reset.3486666120
93.88 0.07 93.42 0.00 96.30 0.00 94.33 0.01 89.88 0.48 97.06 0.00 96.10 0.00 90.06 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/125.otp_ctrl_parallel_lc_esc.368130676
93.94 0.06 93.42 0.00 96.33 0.02 94.33 0.00 89.88 0.00 97.06 0.00 96.10 0.00 90.49 0.43 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.1752984856
94.01 0.06 93.42 0.00 96.33 0.00 94.64 0.31 89.88 0.00 97.06 0.00 96.10 0.00 90.64 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_regwen.3695651181
94.07 0.06 93.42 0.00 96.33 0.00 94.86 0.22 89.88 0.00 97.06 0.00 96.10 0.00 90.85 0.21 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_lock.614605050
94.13 0.06 93.42 0.00 96.33 0.00 94.86 0.00 89.88 0.00 97.06 0.00 96.10 0.00 91.28 0.43 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/68.otp_ctrl_stress_all_with_rand_reset.2191959980
94.19 0.06 93.47 0.05 96.33 0.00 94.86 0.00 90.12 0.24 97.11 0.05 96.10 0.00 91.35 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_check_fail.2668564824
94.25 0.06 93.50 0.03 96.33 0.00 94.94 0.08 90.36 0.24 97.16 0.05 96.10 0.00 91.35 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_init_fail.2225473546
94.29 0.05 93.50 0.00 96.33 0.00 94.95 0.01 90.60 0.24 97.16 0.00 96.10 0.00 91.42 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.508504478
94.34 0.05 93.50 0.00 96.33 0.00 94.95 0.01 90.84 0.24 97.16 0.00 96.10 0.00 91.49 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_stress_all.1840029281
94.38 0.04 93.50 0.00 96.33 0.00 95.05 0.09 90.84 0.00 97.16 0.00 96.10 0.00 91.71 0.21 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_background_chks.2247148435
94.42 0.04 93.50 0.00 96.33 0.00 95.25 0.20 90.84 0.00 97.16 0.00 96.10 0.00 91.78 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_test_access.2022531873
94.46 0.04 93.50 0.00 96.33 0.00 95.28 0.03 90.84 0.00 97.16 0.00 96.10 0.00 91.99 0.21 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_regwen.431847330
94.49 0.03 93.50 0.00 96.33 0.00 95.28 0.00 91.08 0.24 97.16 0.00 96.10 0.00 91.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/120.otp_ctrl_init_fail.879529754
94.53 0.03 93.50 0.00 96.33 0.00 95.28 0.00 91.33 0.24 97.16 0.00 96.10 0.00 91.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/134.otp_ctrl_parallel_lc_esc.364218527
94.56 0.03 93.50 0.00 96.33 0.00 95.28 0.00 91.57 0.24 97.16 0.00 96.10 0.00 91.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/172.otp_ctrl_parallel_lc_esc.4163431190
94.60 0.03 93.50 0.00 96.33 0.00 95.28 0.00 91.81 0.24 97.16 0.00 96.10 0.00 91.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/79.otp_ctrl_parallel_lc_esc.3589954485
94.63 0.03 93.50 0.00 96.33 0.00 95.28 0.00 92.05 0.24 97.16 0.00 96.10 0.00 91.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_parallel_lc_esc.3605272132
94.66 0.03 93.50 0.00 96.33 0.00 95.28 0.00 92.29 0.24 97.16 0.00 96.10 0.00 91.99 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_parallel_lc_esc.2897584457
94.70 0.03 93.50 0.00 96.33 0.00 95.28 0.00 92.29 0.00 97.16 0.00 96.10 0.00 92.21 0.21 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.2150180178
94.72 0.03 93.50 0.00 96.33 0.00 95.28 0.00 92.29 0.00 97.16 0.00 96.30 0.20 92.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.2793694963
94.75 0.03 93.50 0.00 96.35 0.02 95.32 0.03 92.29 0.00 97.16 0.00 96.30 0.00 92.35 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_req.2884764671
94.78 0.02 93.50 0.00 96.35 0.00 95.42 0.10 92.29 0.00 97.16 0.00 96.30 0.00 92.42 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_lock.3484805865
94.80 0.02 93.52 0.02 96.38 0.02 95.43 0.01 92.29 0.00 97.21 0.05 96.30 0.00 92.49 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_check_fail.1499059949
94.83 0.02 93.52 0.00 96.40 0.02 95.43 0.00 92.29 0.00 97.21 0.00 96.30 0.00 92.64 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_stress_all_with_rand_reset.1305846574
94.85 0.02 93.52 0.00 96.40 0.00 95.43 0.00 92.29 0.00 97.21 0.00 96.30 0.00 92.78 0.14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_stress_all.1243040188
94.87 0.02 93.53 0.02 96.45 0.05 95.45 0.03 92.29 0.00 97.26 0.05 96.30 0.00 92.78 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_check_fail.3891472036
94.89 0.02 93.53 0.00 96.45 0.00 95.45 0.00 92.29 0.00 97.26 0.00 96.37 0.07 92.85 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/132.otp_ctrl_init_fail.3278021640
94.91 0.02 93.53 0.00 96.50 0.05 95.47 0.01 92.29 0.00 97.26 0.00 96.37 0.00 92.92 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_key_req.1692720556
94.92 0.02 93.53 0.00 96.50 0.00 95.59 0.12 92.29 0.00 97.26 0.00 96.37 0.00 92.92 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_init_fail.63467212
94.94 0.02 93.58 0.05 96.50 0.00 95.60 0.02 92.29 0.00 97.30 0.05 96.37 0.00 92.92 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_check_fail.487476008
94.95 0.01 93.58 0.00 96.50 0.00 95.70 0.10 92.29 0.00 97.30 0.00 96.37 0.00 92.92 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_background_chks.1782427709
94.97 0.01 93.58 0.00 96.53 0.02 95.70 0.00 92.29 0.00 97.30 0.00 96.37 0.00 92.99 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_parallel_lc_esc.1354005754
94.98 0.01 93.58 0.00 96.55 0.02 95.70 0.00 92.29 0.00 97.30 0.00 96.37 0.00 93.07 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_stress_all_with_rand_reset.1316800193
94.99 0.01 93.58 0.00 96.55 0.00 95.72 0.01 92.29 0.00 97.30 0.00 96.37 0.00 93.14 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.24502409
95.00 0.01 93.61 0.03 96.55 0.00 95.72 0.00 92.29 0.00 97.35 0.05 96.37 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.2622969606
95.02 0.01 93.65 0.03 96.55 0.00 95.72 0.00 92.29 0.00 97.40 0.05 96.37 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/106.otp_ctrl_init_fail.3006530052
95.03 0.01 93.68 0.03 96.55 0.00 95.72 0.00 92.29 0.00 97.45 0.05 96.37 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/119.otp_ctrl_init_fail.2595074183
95.04 0.01 93.68 0.00 96.55 0.00 95.72 0.00 92.29 0.00 97.45 0.00 96.37 0.00 93.21 0.07 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.1052306317
95.05 0.01 93.68 0.00 96.55 0.00 95.78 0.07 92.29 0.00 97.45 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/281.otp_ctrl_init_fail.1237491032
95.06 0.01 93.68 0.00 96.55 0.00 95.84 0.06 92.29 0.00 97.45 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_lock.3926371435
95.06 0.01 93.68 0.00 96.55 0.00 95.84 0.00 92.29 0.00 97.50 0.05 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.1986750154
95.07 0.01 93.68 0.00 96.55 0.00 95.88 0.04 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_test_access.458931450
95.07 0.01 93.68 0.00 96.58 0.02 95.89 0.01 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_key_req.1622059697
95.08 0.01 93.68 0.00 96.58 0.00 95.91 0.03 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_lock.1163652504
95.08 0.01 93.68 0.00 96.60 0.02 95.91 0.00 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.1669365868
95.08 0.01 93.68 0.00 96.63 0.02 95.91 0.00 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.716778037
95.09 0.01 93.68 0.00 96.65 0.02 95.91 0.00 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/127.otp_ctrl_init_fail.3746023932
95.09 0.01 93.68 0.00 96.65 0.00 95.93 0.02 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_macro_errs.1992821747
95.09 0.01 93.68 0.00 96.65 0.00 95.95 0.02 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_check_fail.3315113621
95.10 0.01 93.68 0.00 96.65 0.00 95.97 0.02 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/238.otp_ctrl_init_fail.1803256129
95.10 0.01 93.68 0.00 96.65 0.00 95.99 0.02 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_regwen.2217470385
95.10 0.01 93.68 0.00 96.65 0.00 96.00 0.01 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/242.otp_ctrl_init_fail.1730875962
95.10 0.01 93.68 0.00 96.65 0.00 96.01 0.01 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_stress_all.1060655546
95.10 0.01 93.68 0.00 96.65 0.00 96.02 0.01 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_background_chks.19076487
95.10 0.01 93.68 0.00 96.65 0.00 96.02 0.01 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_smoke.3067031865
95.10 0.01 93.68 0.00 96.65 0.00 96.02 0.01 92.29 0.00 97.50 0.00 96.37 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/142.otp_ctrl_parallel_lc_esc.3995208660

Tests that do not contribute to grading

Name   
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.296506571
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.2629754974
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.2633106026
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.3791145714
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.2594377937
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.1880121680
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.2640547083
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.2996581811
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.2473603455
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.2527260666
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.540544471
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.2066376802
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.1595564198
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.1508523750
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.3234202888
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.2014170108
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.262726840
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.4139150989
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.1524709522
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3293770820
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.1561486453
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.98468209
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.3126059038
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.2239016726
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.477512884
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.1731805512
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.3665572427
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.4175793680
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.1704707529
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.2063177290
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.92473968
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.174387828
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.2210565428
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.896869487
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.4127174605
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.2780765215
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.3050221218
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.475447869
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.363287853
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_errors.1374346355
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.3467306787
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.3520214287
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.3510384656
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.2950250650
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.223753305
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_errors.2827873264
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1270683430
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.2709645577
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.3851929056
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.1044501848
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.1613441449
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_errors.2796607908
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.901577391
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.3065920528
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.3537683183
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.2173792615
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_errors.2762094665
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.1975069189
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.2058977606
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.2324153503
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.3983908036
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.2529737852
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_errors.3165412183
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.4288649291
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.3883003666
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_rw.64987279
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.1865874323
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.2692448094
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_errors.4190327481
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.3011361885
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.662257723
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_rw.1081420057
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_intr_test.997317712
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.2327631013
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_errors.2690660027
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.1798131699
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.2852944263
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.2008353924
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.1570935467
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.560729103
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.4074698849
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.3883721907
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.3944593681
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.1876237271
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/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_stress_all.1805960957
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_test_access.3391713538
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/80.otp_ctrl_init_fail.2329189883
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/80.otp_ctrl_parallel_lc_esc.1642324121
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/80.otp_ctrl_stress_all_with_rand_reset.3975650187
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_init_fail.2380292917
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_parallel_lc_esc.2110262464
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_init_fail.4026626616
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_parallel_lc_esc.3783952294
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_stress_all_with_rand_reset.968029059
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_init_fail.1963216813
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_parallel_lc_esc.3704371274
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_init_fail.3951542501
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_parallel_lc_esc.2347913495
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_init_fail.2700184071
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_parallel_lc_esc.1290011789
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_init_fail.999687395
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_parallel_lc_esc.1462253303
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_init_fail.1860811887
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_parallel_lc_esc.3288115724
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_init_fail.601791700
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_parallel_lc_esc.2447497487
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_stress_all_with_rand_reset.2270457136
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_init_fail.3644331693
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_parallel_lc_esc.2703260759
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_stress_all_with_rand_reset.1771336915
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.681062857
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.454815372
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.3500999333
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.2310304414
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.437091708
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.867931968
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.2005280797
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.4251597269
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.767466655
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.3587740683
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.1814386881
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all.3189230459
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.1723048534
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_init_fail.11392233
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_init_fail.1446275655
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_parallel_lc_esc.891082828
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_init_fail.1667689351
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_init_fail.161095978
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_parallel_lc_esc.51792155
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_init_fail.1283300572
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_parallel_lc_esc.2196867530
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_stress_all_with_rand_reset.1004093829
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_init_fail.3127217936
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_parallel_lc_esc.1226171097
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_init_fail.2925297218
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_parallel_lc_esc.3325559024
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_stress_all_with_rand_reset.2417041835
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_init_fail.3539954977
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_parallel_lc_esc.1144907201
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_init_fail.1291282924
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_parallel_lc_esc.3536723132
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_init_fail.2973280945
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_parallel_lc_esc.2124337697
/workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_stress_all_with_rand_reset.3592173873



Total test records in report: 1288
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.1986750154 Sep 24 05:14:52 PM UTC 24 Sep 24 05:14:55 PM UTC 24 51740699 ps
T2 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_smoke.1837471638 Sep 24 05:14:56 PM UTC 24 Sep 24 05:15:02 PM UTC 24 266633060 ps
T3 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.2622969606 Sep 24 05:15:04 PM UTC 24 Sep 24 05:15:08 PM UTC 24 202578374 ps
T4 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_req.1878716233 Sep 24 05:15:04 PM UTC 24 Sep 24 05:15:15 PM UTC 24 1126817622 ps
T9 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_esc.1575931421 Sep 24 05:15:09 PM UTC 24 Sep 24 05:15:17 PM UTC 24 942639522 ps
T5 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_regwen.1360578062 Sep 24 05:15:47 PM UTC 24 Sep 24 05:15:54 PM UTC 24 186072308 ps
T10 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_partition_walk.3012999577 Sep 24 05:15:01 PM UTC 24 Sep 24 05:15:18 PM UTC 24 1195062165 ps
T11 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_alert_test.934365210 Sep 24 05:15:16 PM UTC 24 Sep 24 05:15:20 PM UTC 24 752659987 ps
T12 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_smoke.3067031865 Sep 24 05:15:16 PM UTC 24 Sep 24 05:15:22 PM UTC 24 125437074 ps
T13 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_low_freq_read.3008420637 Sep 24 05:15:02 PM UTC 24 Sep 24 05:15:22 PM UTC 24 7518567001 ps
T17 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_alert_test.685098530 Sep 24 05:15:20 PM UTC 24 Sep 24 05:15:23 PM UTC 24 189320980 ps
T44 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_init_fail.686237708 Sep 24 05:15:17 PM UTC 24 Sep 24 05:15:23 PM UTC 24 2325681364 ps
T97 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_regwen.2114371502 Sep 24 05:15:15 PM UTC 24 Sep 24 05:15:23 PM UTC 24 570962658 ps
T68 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.2202599169 Sep 24 05:15:20 PM UTC 24 Sep 24 05:15:25 PM UTC 24 154241847 ps
T24 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_smoke.3391836000 Sep 24 05:15:20 PM UTC 24 Sep 24 05:15:26 PM UTC 24 187583715 ps
T35 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_check_fail.1900850973 Sep 24 05:15:15 PM UTC 24 Sep 24 05:15:27 PM UTC 24 958723330 ps
T51 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_background_chks.1782427709 Sep 24 05:15:17 PM UTC 24 Sep 24 05:15:28 PM UTC 24 7761098150 ps
T55 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_check_fail.913041485 Sep 24 05:15:20 PM UTC 24 Sep 24 05:15:29 PM UTC 24 631928451 ps
T94 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_esc.394983054 Sep 24 05:15:17 PM UTC 24 Sep 24 05:15:29 PM UTC 24 3620739722 ps
T18 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_alert_test.1343474811 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:29 PM UTC 24 768740649 ps
T96 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_esc.2148923287 Sep 24 05:15:21 PM UTC 24 Sep 24 05:15:29 PM UTC 24 334488522 ps
T95 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_lock.3484805865 Sep 24 05:15:17 PM UTC 24 Sep 24 05:15:30 PM UTC 24 702155480 ps
T130 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_regwen.3695651181 Sep 24 05:15:20 PM UTC 24 Sep 24 05:15:31 PM UTC 24 1247894175 ps
T131 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_regwen.2244445804 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:32 PM UTC 24 153749471 ps
T98 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_lock.3926371435 Sep 24 05:15:15 PM UTC 24 Sep 24 05:15:32 PM UTC 24 1509796155 ps
T132 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_alert_test.1906034796 Sep 24 05:15:28 PM UTC 24 Sep 24 05:15:32 PM UTC 24 696484395 ps
T123 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_key_req.2302351362 Sep 24 05:15:20 PM UTC 24 Sep 24 05:15:32 PM UTC 24 327157855 ps
T133 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_macro_errs.1762668131 Sep 24 05:15:15 PM UTC 24 Sep 24 05:15:33 PM UTC 24 813363226 ps
T66 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_init_fail.3767484350 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:33 PM UTC 24 2426860718 ps
T124 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_req.4031695110 Sep 24 05:15:17 PM UTC 24 Sep 24 05:15:33 PM UTC 24 601212936 ps
T104 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_check_fail.233810750 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:33 PM UTC 24 216335199 ps
T100 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_esc.4253020856 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:33 PM UTC 24 2071781551 ps
T19 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_test_access.256564066 Sep 24 05:15:15 PM UTC 24 Sep 24 05:15:33 PM UTC 24 3323319691 ps
T101 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_init_fail.189207020 Sep 24 05:15:28 PM UTC 24 Sep 24 05:15:34 PM UTC 24 310710206 ps
T141 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_background_chks.478365848 Sep 24 05:15:21 PM UTC 24 Sep 24 05:15:35 PM UTC 24 688962709 ps
T125 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_lock.1739465532 Sep 24 05:15:21 PM UTC 24 Sep 24 05:15:35 PM UTC 24 436154568 ps
T134 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_req.4051753841 Sep 24 05:15:21 PM UTC 24 Sep 24 05:15:36 PM UTC 24 507660621 ps
T36 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_check_fail.404742183 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:36 PM UTC 24 682871857 ps
T150 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.4058963011 Sep 24 05:15:15 PM UTC 24 Sep 24 05:15:37 PM UTC 24 2633566037 ps
T126 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_background_chks.19076487 Sep 24 05:15:04 PM UTC 24 Sep 24 05:15:37 PM UTC 24 16878161879 ps
T127 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_req.2470493540 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:39 PM UTC 24 820371528 ps
T173 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_esc.901208046 Sep 24 05:15:32 PM UTC 24 Sep 24 05:15:40 PM UTC 24 472728215 ps
T235 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_regwen.2996548306 Sep 24 05:15:28 PM UTC 24 Sep 24 05:15:40 PM UTC 24 290032871 ps
T474 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_alert_test.2375809415 Sep 24 05:15:36 PM UTC 24 Sep 24 05:15:40 PM UTC 24 200765737 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_smoke.654048356 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:42 PM UTC 24 6720348353 ps
T6 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_errs.992474911 Sep 24 05:15:15 PM UTC 24 Sep 24 05:15:42 PM UTC 24 6229525979 ps
T74 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_init_fail.2153057589 Sep 24 05:15:36 PM UTC 24 Sep 24 05:15:43 PM UTC 24 195589491 ps
T198 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_check_fail.631690034 Sep 24 05:15:32 PM UTC 24 Sep 24 05:15:43 PM UTC 24 5916668076 ps
T106 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_background_chks.1177276088 Sep 24 05:15:28 PM UTC 24 Sep 24 05:15:43 PM UTC 24 1639898362 ps
T407 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_regwen.2902156389 Sep 24 05:15:32 PM UTC 24 Sep 24 05:15:43 PM UTC 24 288321295 ps
T282 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_lock.4256533429 Sep 24 05:15:32 PM UTC 24 Sep 24 05:15:43 PM UTC 24 3490594262 ps
T283 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_smoke.3079965615 Sep 24 05:15:28 PM UTC 24 Sep 24 05:15:44 PM UTC 24 4434164294 ps
T281 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_lock.1496674054 Sep 24 05:15:36 PM UTC 24 Sep 24 05:15:44 PM UTC 24 238829534 ps
T159 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_macro_errs.3623125258 Sep 24 05:15:28 PM UTC 24 Sep 24 05:15:46 PM UTC 24 731899766 ps
T105 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_esc.1265050393 Sep 24 05:15:36 PM UTC 24 Sep 24 05:15:46 PM UTC 24 133386666 ps
T475 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_alert_test.4191841370 Sep 24 05:15:44 PM UTC 24 Sep 24 05:15:47 PM UTC 24 92821596 ps
T7 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_errs.3961862163 Sep 24 05:15:21 PM UTC 24 Sep 24 05:15:47 PM UTC 24 4159987459 ps
T145 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_key_req.3706551096 Sep 24 05:15:32 PM UTC 24 Sep 24 05:15:48 PM UTC 24 1735795751 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_smoke.2089273584 Sep 24 05:15:36 PM UTC 24 Sep 24 05:15:49 PM UTC 24 3950145208 ps
T128 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_req.682003918 Sep 24 05:15:32 PM UTC 24 Sep 24 05:15:50 PM UTC 24 2083185953 ps
T382 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_regwen.2217470385 Sep 24 05:15:39 PM UTC 24 Sep 24 05:15:50 PM UTC 24 288914548 ps
T476 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_esc.3272120121 Sep 24 05:15:44 PM UTC 24 Sep 24 05:15:50 PM UTC 24 117121169 ps
T58 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_init_fail.2627617645 Sep 24 05:15:44 PM UTC 24 Sep 24 05:15:50 PM UTC 24 478242390 ps
T183 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_key_req.3091916409 Sep 24 05:15:39 PM UTC 24 Sep 24 05:15:50 PM UTC 24 359778421 ps
T8 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_errs.1256348450 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:50 PM UTC 24 1138240191 ps
T477 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_alert_test.2928506160 Sep 24 05:15:47 PM UTC 24 Sep 24 05:15:50 PM UTC 24 56712057 ps
T184 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_errs.3150576817 Sep 24 05:15:17 PM UTC 24 Sep 24 05:15:51 PM UTC 24 1394791851 ps
T129 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_key_req.468994894 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:51 PM UTC 24 1190723113 ps
T180 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_macro_errs.1992821747 Sep 24 05:15:20 PM UTC 24 Sep 24 05:15:54 PM UTC 24 4197144660 ps
T135 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_background_chks.3427412249 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:55 PM UTC 24 2315877723 ps
T52 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_check_fail.465334556 Sep 24 05:15:36 PM UTC 24 Sep 24 05:15:56 PM UTC 24 662149662 ps
T185 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_macro_errs.864393735 Sep 24 05:15:32 PM UTC 24 Sep 24 05:15:56 PM UTC 24 9070100946 ps
T136 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_lock.273822574 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:56 PM UTC 24 18082943954 ps
T48 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_init_fail.2225473546 Sep 24 05:15:50 PM UTC 24 Sep 24 05:15:57 PM UTC 24 485446833 ps
T137 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_background_chks.2247148435 Sep 24 05:15:36 PM UTC 24 Sep 24 05:15:57 PM UTC 24 2800266175 ps
T186 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_errs.3749832572 Sep 24 05:15:32 PM UTC 24 Sep 24 05:15:57 PM UTC 24 1475119511 ps
T20 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_test_access.458931450 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:57 PM UTC 24 1269855415 ps
T181 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_macro_errs.3420585211 Sep 24 05:15:25 PM UTC 24 Sep 24 05:15:57 PM UTC 24 15445846681 ps
T56 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_check_fail.2507850058 Sep 24 05:15:47 PM UTC 24 Sep 24 05:15:58 PM UTC 24 736923187 ps
T148 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_esc.1561729861 Sep 24 05:15:51 PM UTC 24 Sep 24 05:15:58 PM UTC 24 390898424 ps
T226 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_req.3148337005 Sep 24 05:15:44 PM UTC 24 Sep 24 05:15:58 PM UTC 24 1011035761 ps
T138 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_key_req.451025447 Sep 24 05:15:28 PM UTC 24 Sep 24 05:15:59 PM UTC 24 3884723821 ps
T146 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_req.3148633787 Sep 24 05:16:20 PM UTC 24 Sep 24 05:16:41 PM UTC 24 9539440073 ps
T478 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_alert_test.321395092 Sep 24 05:15:56 PM UTC 24 Sep 24 05:16:00 PM UTC 24 90096766 ps
T279 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_background_chks.2626998082 Sep 24 05:15:44 PM UTC 24 Sep 24 05:16:00 PM UTC 24 7814158915 ps
T439 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_lock.1853871126 Sep 24 05:15:51 PM UTC 24 Sep 24 05:16:01 PM UTC 24 398122956 ps
T410 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_regwen.2368724325 Sep 24 05:15:56 PM UTC 24 Sep 24 05:16:01 PM UTC 24 184714581 ps
T21 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_test_access.4227447106 Sep 24 05:15:39 PM UTC 24 Sep 24 05:16:01 PM UTC 24 1572080658 ps
T479 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_smoke.1419014192 Sep 24 05:15:50 PM UTC 24 Sep 24 05:16:01 PM UTC 24 4178087224 ps
T230 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_errs.4029272030 Sep 24 05:15:36 PM UTC 24 Sep 24 05:16:02 PM UTC 24 1273835730 ps
T227 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_lock.4015729551 Sep 24 05:15:47 PM UTC 24 Sep 24 05:16:03 PM UTC 24 754441979 ps
T228 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_test_access.2022531873 Sep 24 05:15:47 PM UTC 24 Sep 24 05:16:05 PM UTC 24 6510989384 ps
T276 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_req.2884764671 Sep 24 05:15:36 PM UTC 24 Sep 24 05:16:06 PM UTC 24 8139980400 ps
T69 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_init_fail.791806062 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:06 PM UTC 24 175479488 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_test_access.1354315394 Sep 24 05:15:32 PM UTC 24 Sep 24 05:16:07 PM UTC 24 13228680555 ps
T480 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_alert_test.3895710890 Sep 24 05:16:03 PM UTC 24 Sep 24 05:16:07 PM UTC 24 75067547 ps
T481 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_smoke.1770396331 Sep 24 05:15:44 PM UTC 24 Sep 24 05:16:07 PM UTC 24 1658122160 ps
T262 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_key_req.1692720556 Sep 24 05:15:47 PM UTC 24 Sep 24 05:16:08 PM UTC 24 715915663 ps
T389 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_errs.3999279389 Sep 24 05:15:47 PM UTC 24 Sep 24 05:16:09 PM UTC 24 1162576522 ps
T482 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_smoke.3151769270 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:09 PM UTC 24 1595040198 ps
T301 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_test_access.1485878093 Sep 24 05:15:28 PM UTC 24 Sep 24 05:16:09 PM UTC 24 3174590907 ps
T413 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_esc.4276162382 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:10 PM UTC 24 178977334 ps
T414 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_req.1868443063 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:10 PM UTC 24 278871069 ps
T483 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.1814386881 Sep 24 05:16:04 PM UTC 24 Sep 24 05:16:10 PM UTC 24 131985980 ps
T406 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_regwen.431847330 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:11 PM UTC 24 468729848 ps
T302 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all.1065638809 Sep 24 05:15:39 PM UTC 24 Sep 24 05:16:11 PM UTC 24 3866121094 ps
T191 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.867931968 Sep 24 05:16:04 PM UTC 24 Sep 24 05:16:12 PM UTC 24 2245207383 ps
T158 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_background_chks.1983806434 Sep 24 05:15:50 PM UTC 24 Sep 24 05:16:12 PM UTC 24 5367335618 ps
T90 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_check_fail.487476008 Sep 24 05:16:25 PM UTC 24 Sep 24 05:16:41 PM UTC 24 1552173843 ps
T114 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_errs.1928370867 Sep 24 05:15:56 PM UTC 24 Sep 24 05:16:13 PM UTC 24 1803562433 ps
T115 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_macro_errs.1117146889 Sep 24 05:15:47 PM UTC 24 Sep 24 05:16:14 PM UTC 24 1824119376 ps
T116 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.681062857 Sep 24 05:16:10 PM UTC 24 Sep 24 05:16:14 PM UTC 24 127305233 ps
T117 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_background_chks.3652640250 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:14 PM UTC 24 828101209 ps
T118 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_req.3811851978 Sep 24 05:15:50 PM UTC 24 Sep 24 05:16:14 PM UTC 24 2032942395 ps
T119 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_errs.1518733569 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:15 PM UTC 24 513685079 ps
T120 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_smoke.3662636651 Sep 24 05:16:10 PM UTC 24 Sep 24 05:16:16 PM UTC 24 298269099 ps
T121 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_key_req.161522592 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:17 PM UTC 24 1235143398 ps
T122 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.3587740683 Sep 24 05:16:10 PM UTC 24 Sep 24 05:16:17 PM UTC 24 1942047399 ps
T139 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.3500999333 Sep 24 05:16:06 PM UTC 24 Sep 24 05:16:18 PM UTC 24 898553566 ps
T266 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.4251597269 Sep 24 05:16:04 PM UTC 24 Sep 24 05:16:20 PM UTC 24 383902502 ps
T67 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_init_fail.1410814499 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:20 PM UTC 24 253462593 ps
T423 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_lock.1163652504 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:20 PM UTC 24 596714608 ps
T37 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_check_fail.2520712443 Sep 24 05:15:56 PM UTC 24 Sep 24 05:16:21 PM UTC 24 4383436284 ps
T182 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_macro_errs.2984630305 Sep 24 05:15:39 PM UTC 24 Sep 24 05:16:21 PM UTC 24 5808882363 ps
T303 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_test_access.2989077700 Sep 24 05:15:56 PM UTC 24 Sep 24 05:16:22 PM UTC 24 3267823609 ps
T304 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_test_access.3391713538 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:22 PM UTC 24 8524466441 ps
T387 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.2310304414 Sep 24 05:16:06 PM UTC 24 Sep 24 05:16:22 PM UTC 24 484918276 ps
T484 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_regwen.4221965527 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:23 PM UTC 24 1936955635 ps
T485 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_alert_test.3149401187 Sep 24 05:16:19 PM UTC 24 Sep 24 05:16:24 PM UTC 24 682902048 ps
T486 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_macro_errs.1983346000 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:24 PM UTC 24 421223910 ps
T305 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_test_access.4267332581 Sep 24 05:15:20 PM UTC 24 Sep 24 05:16:24 PM UTC 24 6477074137 ps
T424 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_key_req.2345116832 Sep 24 05:15:56 PM UTC 24 Sep 24 05:16:25 PM UTC 24 1601147407 ps
T452 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.437091708 Sep 24 05:16:04 PM UTC 24 Sep 24 05:16:25 PM UTC 24 1378825500 ps
T83 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_check_fail.76493683 Sep 24 05:16:29 PM UTC 24 Sep 24 05:16:42 PM UTC 24 426064315 ps
T487 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_stress_all.680954685 Sep 24 05:16:19 PM UTC 24 Sep 24 05:16:26 PM UTC 24 277740261 ps
T29 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_init_fail.3078095274 Sep 24 05:16:20 PM UTC 24 Sep 24 05:16:26 PM UTC 24 124437594 ps
T488 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_smoke.1880585708 Sep 24 05:16:20 PM UTC 24 Sep 24 05:16:27 PM UTC 24 317078926 ps
T250 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.767466655 Sep 24 05:16:04 PM UTC 24 Sep 24 05:16:27 PM UTC 24 2279879939 ps
T202 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_esc.150762600 Sep 24 05:16:20 PM UTC 24 Sep 24 05:16:28 PM UTC 24 137682635 ps
T489 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_alert_test.2959347615 Sep 24 05:16:25 PM UTC 24 Sep 24 05:16:28 PM UTC 24 55151922 ps
T196 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_macro_errs.750129302 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:29 PM UTC 24 1654382557 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.454815372 Sep 24 05:16:04 PM UTC 24 Sep 24 05:16:31 PM UTC 24 1214984404 ps
T404 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_regwen.1714631668 Sep 24 05:16:29 PM UTC 24 Sep 24 05:16:42 PM UTC 24 3844631970 ps
T237 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_errs.3010695506 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:32 PM UTC 24 534667683 ps
T240 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_key_req.1903889597 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:43 PM UTC 24 7505949928 ps
T490 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_test_access.2615828949 Sep 24 05:16:25 PM UTC 24 Sep 24 05:16:32 PM UTC 24 144785057 ps
T457 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_req.830951100 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:32 PM UTC 24 2032742019 ps
T192 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_init_fail.1714063761 Sep 24 05:16:25 PM UTC 24 Sep 24 05:16:32 PM UTC 24 140449441 ps
T405 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_regwen.1576665770 Sep 24 05:16:25 PM UTC 24 Sep 24 05:16:34 PM UTC 24 492697283 ps
T418 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_test_access.1277689628 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:34 PM UTC 24 823458537 ps
T491 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_smoke.2666992283 Sep 24 05:16:25 PM UTC 24 Sep 24 05:16:35 PM UTC 24 263595985 ps
T492 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_alert_test.1270018198 Sep 24 05:16:32 PM UTC 24 Sep 24 05:16:36 PM UTC 24 56230061 ps
T199 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_macro_errs.4135835222 Sep 24 05:16:25 PM UTC 24 Sep 24 05:16:36 PM UTC 24 448278310 ps
T236 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_errs.3444401362 Sep 24 05:16:20 PM UTC 24 Sep 24 05:16:37 PM UTC 24 902091120 ps
T263 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.2005280797 Sep 24 05:16:10 PM UTC 24 Sep 24 05:16:37 PM UTC 24 3635949353 ps
T493 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_lock.1860375478 Sep 24 05:16:20 PM UTC 24 Sep 24 05:16:37 PM UTC 24 463445549 ps
T142 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_init_fail.2859710614 Sep 24 05:16:32 PM UTC 24 Sep 24 05:16:38 PM UTC 24 189460653 ps
T278 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_smoke.3885692040 Sep 24 05:16:32 PM UTC 24 Sep 24 05:16:38 PM UTC 24 241109156 ps
T416 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_req.2083789326 Sep 24 05:16:25 PM UTC 24 Sep 24 05:16:39 PM UTC 24 861827023 ps
T417 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.1723048534 Sep 24 05:16:10 PM UTC 24 Sep 24 05:16:39 PM UTC 24 1448691796 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_key_req.291839825 Sep 24 05:16:25 PM UTC 24 Sep 24 05:16:41 PM UTC 24 837017503 ps
T219 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.24502409 Sep 24 05:16:10 PM UTC 24 Sep 24 05:16:43 PM UTC 24 1916885685 ps
T153 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_esc.2595676805 Sep 24 05:16:26 PM UTC 24 Sep 24 05:16:44 PM UTC 24 639231064 ps
T494 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_alert_test.3116387511 Sep 24 05:16:39 PM UTC 24 Sep 24 05:16:44 PM UTC 24 165021345 ps
T169 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_esc.3133833937 Sep 24 05:16:36 PM UTC 24 Sep 24 05:16:45 PM UTC 24 595481229 ps
T495 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_lock.600852210 Sep 24 05:16:36 PM UTC 24 Sep 24 05:16:45 PM UTC 24 229527589 ps
T57 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.508504478 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:45 PM UTC 24 1803073928 ps
T38 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_check_fail.2505912661 Sep 24 05:16:01 PM UTC 24 Sep 24 05:16:45 PM UTC 24 24022335966 ps
T201 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_macro_errs.2610520922 Sep 24 05:16:57 PM UTC 24 Sep 24 05:17:29 PM UTC 24 990515266 ps
T190 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_init_fail.2531561409 Sep 24 05:16:40 PM UTC 24 Sep 24 05:16:45 PM UTC 24 324493213 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_smoke.1615165693 Sep 24 05:16:39 PM UTC 24 Sep 24 05:16:46 PM UTC 24 244768104 ps
T472 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_key_req.1865212766 Sep 24 05:16:39 PM UTC 24 Sep 24 05:16:47 PM UTC 24 213319597 ps
T497 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_check_fail.3020541324 Sep 24 05:16:42 PM UTC 24 Sep 24 05:16:48 PM UTC 24 258270072 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_lock.873090242 Sep 24 05:16:29 PM UTC 24 Sep 24 05:16:48 PM UTC 24 2047102149 ps
T498 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_alert_test.136440414 Sep 24 05:16:46 PM UTC 24 Sep 24 05:16:50 PM UTC 24 42672225 ps
T499 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_regwen.2329028152 Sep 24 05:16:39 PM UTC 24 Sep 24 05:16:50 PM UTC 24 802087367 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_esc.2858788809 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:50 PM UTC 24 3760158553 ps
T422 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_lock.881868026 Sep 24 05:16:15 PM UTC 24 Sep 24 05:16:50 PM UTC 24 1832202889 ps
T251 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_req.2830108184 Sep 24 05:16:36 PM UTC 24 Sep 24 05:16:51 PM UTC 24 618142016 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_macro_errs.1556091099 Sep 24 05:15:56 PM UTC 24 Sep 24 05:16:51 PM UTC 24 8421391089 ps
T61 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_init_fail.1307290351 Sep 24 05:16:47 PM UTC 24 Sep 24 05:16:53 PM UTC 24 278696631 ps
T14 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all_with_rand_reset.966092685 Sep 24 05:15:35 PM UTC 24 Sep 24 05:16:53 PM UTC 24 2126804118 ps
T308 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_regwen.14454734 Sep 24 05:16:44 PM UTC 24 Sep 24 05:16:54 PM UTC 24 282976705 ps
T309 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_check_fail.535328610 Sep 24 05:16:36 PM UTC 24 Sep 24 05:16:55 PM UTC 24 8909219406 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_macro_errs.2925785428 Sep 24 05:16:36 PM UTC 24 Sep 24 05:16:55 PM UTC 24 7550101417 ps
T259 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_esc.77962787 Sep 24 05:16:47 PM UTC 24 Sep 24 05:16:55 PM UTC 24 191627780 ps
T311 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_macro_errs.1872609002 Sep 24 05:16:44 PM UTC 24 Sep 24 05:16:56 PM UTC 24 407716241 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_alert_test.830013153 Sep 24 05:16:52 PM UTC 24 Sep 24 05:16:57 PM UTC 24 1388280133 ps
T313 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_esc.748534498 Sep 24 05:16:40 PM UTC 24 Sep 24 05:16:57 PM UTC 24 2315227874 ps
T314 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_check_fail.1743559353 Sep 24 05:16:49 PM UTC 24 Sep 24 05:16:58 PM UTC 24 555021174 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_lock.3074860672 Sep 24 05:16:47 PM UTC 24 Sep 24 05:16:58 PM UTC 24 434334541 ps
T409 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_regwen.1135115835 Sep 24 05:16:50 PM UTC 24 Sep 24 05:16:58 PM UTC 24 291466053 ps
T200 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_init_fail.1033991016 Sep 24 05:16:52 PM UTC 24 Sep 24 05:16:59 PM UTC 24 217515988 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_smoke.4098381511 Sep 24 05:16:47 PM UTC 24 Sep 24 05:17:00 PM UTC 24 955557923 ps
T254 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_key_req.1622059697 Sep 24 05:16:44 PM UTC 24 Sep 24 05:17:00 PM UTC 24 1196014193 ps
T433 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_test_access.2262354587 Sep 24 05:16:50 PM UTC 24 Sep 24 05:17:01 PM UTC 24 867980347 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_errs.2428156303 Sep 24 05:16:49 PM UTC 24 Sep 24 05:17:02 PM UTC 24 633852162 ps
T255 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_key_req.1003770819 Sep 24 05:16:50 PM UTC 24 Sep 24 05:17:02 PM UTC 24 200929834 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_req.951325469 Sep 24 05:16:47 PM UTC 24 Sep 24 05:17:02 PM UTC 24 388537183 ps
T503 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_key_req.2172917779 Sep 24 05:16:57 PM UTC 24 Sep 24 05:17:03 PM UTC 24 217101246 ps
T504 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_alert_test.3013387237 Sep 24 05:16:59 PM UTC 24 Sep 24 05:17:03 PM UTC 24 222044707 ps
T179 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_esc.3551120470 Sep 24 05:16:54 PM UTC 24 Sep 24 05:17:03 PM UTC 24 208091750 ps
T505 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_smoke.2979201168 Sep 24 05:16:52 PM UTC 24 Sep 24 05:17:04 PM UTC 24 1798865365 ps
T427 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_lock.676855199 Sep 24 05:16:41 PM UTC 24 Sep 24 05:17:04 PM UTC 24 1985415897 ps
T421 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_test_access.505678065 Sep 24 05:16:44 PM UTC 24 Sep 24 05:17:05 PM UTC 24 1735061665 ps
T49 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_init_fail.3258661064 Sep 24 05:16:59 PM UTC 24 Sep 24 05:17:06 PM UTC 24 149189436 ps
T458 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_test_access.1266656180 Sep 24 05:16:39 PM UTC 24 Sep 24 05:17:07 PM UTC 24 947535202 ps
T425 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_test_access.4049959870 Sep 24 05:16:30 PM UTC 24 Sep 24 05:17:08 PM UTC 24 13694845609 ps
T506 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_key_req.3123348889 Sep 24 05:17:04 PM UTC 24 Sep 24 05:17:10 PM UTC 24 116773273 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_errs.1959305439 Sep 24 05:16:36 PM UTC 24 Sep 24 05:17:11 PM UTC 24 2175645750 ps
T267 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_esc.314214995 Sep 24 05:17:02 PM UTC 24 Sep 24 05:17:11 PM UTC 24 268809714 ps
T241 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_regwen.938746117 Sep 24 05:16:57 PM UTC 24 Sep 24 05:17:11 PM UTC 24 883911364 ps
T383 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_errs.1594303279 Sep 24 05:16:29 PM UTC 24 Sep 24 05:17:11 PM UTC 24 12568796622 ps
T507 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_alert_test.4033456557 Sep 24 05:17:06 PM UTC 24 Sep 24 05:17:11 PM UTC 24 819031447 ps
T508 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_macro_errs.2068456283 Sep 24 05:16:29 PM UTC 24 Sep 24 05:17:13 PM UTC 24 3163541472 ps
T415 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_key_req.1094136174 Sep 24 05:16:29 PM UTC 24 Sep 24 05:17:13 PM UTC 24 1665949043 ps
T509 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_test_access.772022484 Sep 24 05:17:04 PM UTC 24 Sep 24 05:17:13 PM UTC 24 320558082 ps
T510 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_smoke.2871801993 Sep 24 05:16:59 PM UTC 24 Sep 24 05:17:15 PM UTC 24 271490759 ps
T140 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_check_fail.1200066304 Sep 24 05:16:57 PM UTC 24 Sep 24 05:17:15 PM UTC 24 1105131610 ps
T511 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_regwen.14924815 Sep 24 05:17:04 PM UTC 24 Sep 24 05:17:15 PM UTC 24 262928977 ps
T512 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_smoke.4238707725 Sep 24 05:17:07 PM UTC 24 Sep 24 05:17:16 PM UTC 24 715665547 ps
T45 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_init_fail.3233427943 Sep 24 05:17:09 PM UTC 24 Sep 24 05:17:16 PM UTC 24 198351096 ps
T220 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_macro_errs.2026756429 Sep 24 05:16:50 PM UTC 24 Sep 24 05:17:16 PM UTC 24 940461783 ps
T428 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_req.1046477007 Sep 24 05:17:02 PM UTC 24 Sep 24 05:17:17 PM UTC 24 515736946 ps
T316 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_test_access.2342971747 Sep 24 05:16:57 PM UTC 24 Sep 24 05:17:18 PM UTC 24 556526971 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_esc.3760441550 Sep 24 05:17:10 PM UTC 24 Sep 24 05:17:18 PM UTC 24 701564946 ps
T53 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_check_fail.3281853649 Sep 24 05:17:04 PM UTC 24 Sep 24 05:17:19 PM UTC 24 630067111 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_req.2090844003 Sep 24 05:16:54 PM UTC 24 Sep 24 05:17:20 PM UTC 24 1710113648 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_req.3821937694 Sep 24 05:16:40 PM UTC 24 Sep 24 05:17:20 PM UTC 24 11787277508 ps
T320 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_lock.614605050 Sep 24 05:16:57 PM UTC 24 Sep 24 05:17:21 PM UTC 24 8076595367 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_req.3833083880 Sep 24 05:17:09 PM UTC 24 Sep 24 05:17:21 PM UTC 24 606336819 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_key_req.1464921109 Sep 24 05:17:16 PM UTC 24 Sep 24 05:17:22 PM UTC 24 186150699 ps
T323 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_alert_test.2673150810 Sep 24 05:17:19 PM UTC 24 Sep 24 05:17:23 PM UTC 24 63437493 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_regwen.3178366902 Sep 24 05:17:16 PM UTC 24 Sep 24 05:17:24 PM UTC 24 503639561 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_macro_errs.1956709087 Sep 24 05:17:16 PM UTC 24 Sep 24 05:17:28 PM UTC 24 1062105223 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_dai_lock.3266259210 Sep 24 05:17:15 PM UTC 24 Sep 24 05:17:25 PM UTC 24 673869469 ps
T515 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_lc_req.876389112 Sep 24 05:17:20 PM UTC 24 Sep 24 05:17:25 PM UTC 24 128879664 ps
T193 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_init_fail.1877943233 Sep 24 05:17:20 PM UTC 24 Sep 24 05:17:26 PM UTC 24 538954875 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_dai_lock.2842939921 Sep 24 05:17:20 PM UTC 24 Sep 24 05:17:26 PM UTC 24 127381188 ps
T260 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_lc_esc.1114392400 Sep 24 05:17:20 PM UTC 24 Sep 24 05:17:27 PM UTC 24 251632971 ps
T517 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_alert_test.1529499774 Sep 24 05:17:23 PM UTC 24 Sep 24 05:17:27 PM UTC 24 99556362 ps
T518 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_errs.283889215 Sep 24 05:16:42 PM UTC 24 Sep 24 05:17:27 PM UTC 24 11218961912 ps
T154 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_stress_all.2913786511 Sep 24 05:16:30 PM UTC 24 Sep 24 05:17:30 PM UTC 24 12763978794 ps
T519 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_macro_errs.3263979154 Sep 24 05:17:20 PM UTC 24 Sep 24 05:17:30 PM UTC 24 326271316 ps
T233 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_init_fail.1889717858 Sep 24 05:17:25 PM UTC 24 Sep 24 05:17:30 PM UTC 24 513500851 ps
T238 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all.2791775740 Sep 24 05:15:15 PM UTC 24 Sep 24 05:17:31 PM UTC 24 8127243916 ps
T170 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_parallel_lc_esc.2374653938 Sep 24 05:17:25 PM UTC 24 Sep 24 05:17:31 PM UTC 24 94707950 ps
T520 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_smoke.502163004 Sep 24 05:17:20 PM UTC 24 Sep 24 05:17:33 PM UTC 24 1327505105 ps
T521 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_regwen.2882143425 Sep 24 05:17:23 PM UTC 24 Sep 24 05:17:34 PM UTC 24 345943699 ps
T456 /workspaces/repo/scratch/os_regression_2024_09_23/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_dai_lock.871566963 Sep 24 05:17:04 PM UTC 24 Sep 24 05:17:34 PM UTC 24 9084527252 ps