Unified Coverage Report :: Group :: pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg

Group : pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_pwrmgr_env_0.1/pwrmgr_env_cov.sv

6 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
WakeupAonTimer_ctrl_cg	100.00	1	100	1	64	64
WakeupDbgCable_ctrl_cg	100.00	1	100	1	64	64
WakeupPin_ctrl_cg	100.00	1	100	1	64	64
WakeupSensorCtrl_ctrl_cg	100.00	1	100	1	64	64
WakeupSysrst_ctrl_cg	100.00	1	100	1	64	64
WakeupUsb_ctrl_cg	100.00	1	100	1	64	64

---

Group Instance : WakeupAonTimer_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupAonTimer_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupAonTimer_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupAonTimer_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupDbgCable_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupDbgCable_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupDbgCable_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupDbgCable_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupPin_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupPin_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupPin_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupPin_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupSensorCtrl_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupSensorCtrl_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupSensorCtrl_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupSensorCtrl_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupSysrst_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupSysrst_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupSysrst_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupSysrst_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

---

Group Instance : WakeupUsb_ctrl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance WakeupUsb_ctrl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group Instance WakeupUsb_ctrl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
capture_cp	2	0	2	100.00	100	1	1	2
enable_cp	2	0	2	100.00	100	1	1	2
wakeup_cp	2	0	2	100.00	100	1	1	2

Crosses for Group Instance WakeupUsb_ctrl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
wakeup_cross	8	0	8	100.00	100	1	1	0

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7272

1

T4

2

T5

152

T7

4

auto[1]

20337

1

T3

50

T4

7

T5

416

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

12459

1

T3

25

T4

5

T5

268

auto[1]

15150

1

T3

25

T4

4

T5

300

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13590

1

T3

24

T4

4

T5

292

auto[1]

14019

1

T3

26

T4

5

T5

276

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1823	1			T5	38		T7	1		T73	1
auto[0]	auto[0]	auto[1]	1547	1			T5	36		T7	1		T74	3
auto[0]	auto[1]	auto[0]	4856	1			T3	14		T4	2		T5	107
auto[0]	auto[1]	auto[1]	4233	1			T3	11		T4	3		T5	87
auto[1]	auto[0]	auto[0]	1807	1			T5	41		T9	1		T72	1
auto[1]	auto[0]	auto[1]	2095	1			T4	2		T5	37		T7	2
auto[1]	auto[1]	auto[0]	5104	1			T3	10		T4	2		T5	106
auto[1]	auto[1]	auto[1]	6144	1			T3	15		T5	116		T7	1

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7272

1

T4

2

T5

152

T7

4

auto[1]

20337

1

T3

50

T4

7

T5

416

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

12253

1

T3

25

T4

3

T5

236

auto[1]

15356

1

T3

25

T4

6

T5

332

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13539

1

T3

24

T4

5

T5

272

auto[1]

14070

1

T3

26

T4

4

T5

296

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1773	1			T5	33		T7	1		T9	1
auto[0]	auto[0]	auto[1]	1554	1			T5	35		T7	1		T9	3
auto[0]	auto[1]	auto[0]	4735	1			T3	14		T4	1		T5	89
auto[0]	auto[1]	auto[1]	4191	1			T3	11		T4	2		T5	79
auto[1]	auto[0]	auto[0]	1787	1			T4	2		T5	32		T7	2
auto[1]	auto[0]	auto[1]	2158	1			T5	52		T72	1		T74	5
auto[1]	auto[1]	auto[0]	5244	1			T3	10		T4	2		T5	118
auto[1]	auto[1]	auto[1]	6167	1			T3	15		T4	2		T5	130

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7272

1

T4

2

T5

152

T7

4

auto[1]

20337

1

T3

50

T4

7

T5

416

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

12270

1

T3

18

T4

5

T5

243

auto[1]

15339

1

T3

32

T4

4

T5

325

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13601

1

T3

18

T4

3

T5

295

auto[1]

14008

1

T3

32

T4

6

T5

273

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1721	1			T5	36		T7	2		T9	1
auto[0]	auto[0]	auto[1]	1542	1			T4	1		T5	33		T7	1
auto[0]	auto[1]	auto[0]	4816	1			T3	6		T4	2		T5	96
auto[0]	auto[1]	auto[1]	4191	1			T3	12		T4	2		T5	78
auto[1]	auto[0]	auto[0]	1816	1			T5	39		T9	1		T72	1
auto[1]	auto[0]	auto[1]	2193	1			T4	1		T5	44		T7	1
auto[1]	auto[1]	auto[0]	5248	1			T3	12		T4	1		T5	124
auto[1]	auto[1]	auto[1]	6082	1			T3	20		T4	2		T5	118

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7272

1

T4

2

T5

152

T7

4

auto[1]

20337

1

T3

50

T4

7

T5

416

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

12428

1

T3

29

T4

4

T5

274

auto[1]

15181

1

T3

21

T4

5

T5

294

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13644

1

T3

25

T4

6

T5

279

auto[1]

13965

1

T3

25

T4

3

T5

289

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1763	1			T4	1		T5	52		T72	1
auto[0]	auto[0]	auto[1]	1588	1			T5	28		T9	2		T73	2
auto[0]	auto[1]	auto[0]	4924	1			T3	15		T4	3		T5	94
auto[0]	auto[1]	auto[1]	4153	1			T3	14		T5	100		T7	5
auto[1]	auto[0]	auto[0]	1824	1			T5	41		T73	1		T74	1
auto[1]	auto[0]	auto[1]	2097	1			T4	1		T5	31		T7	4
auto[1]	auto[1]	auto[0]	5133	1			T3	10		T4	2		T5	92
auto[1]	auto[1]	auto[1]	6127	1			T3	11		T4	2		T5	130

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7272

1

T4

2

T5

152

T7

4

auto[1]

20337

1

T3

50

T4

7

T5

416

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

12378

1

T3

22

T4

6

T5

248

auto[1]

15231

1

T3

28

T4

3

T5

320

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13604

1

T3

26

T4

4

T5

290

auto[1]

14005

1

T3

24

T4

5

T5

278

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1837	1			T4	1		T5	41		T7	2
auto[0]	auto[0]	auto[1]	1499	1			T4	1		T5	30		T7	1
auto[0]	auto[1]	auto[0]	4834	1			T3	11		T4	2		T5	97
auto[0]	auto[1]	auto[1]	4208	1			T3	11		T4	2		T5	80
auto[1]	auto[0]	auto[0]	1784	1			T5	43		T7	1		T9	1
auto[1]	auto[0]	auto[1]	2152	1			T5	38		T9	1		T72	1
auto[1]	auto[1]	auto[0]	5149	1			T3	15		T4	1		T5	109
auto[1]	auto[1]	auto[1]	6146	1			T3	13		T4	2		T5	130

Summary for Variable capture_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for capture_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7272

1

T4

2

T5

152

T7

4

auto[1]

20337

1

T3

50

T4

7

T5

416

---

Summary for Variable enable_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for enable_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

12289

1

T3

27

T4

4

T5

249

auto[1]

15320

1

T3

23

T4

5

T5

319

---

Summary for Variable wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for wakeup_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13653

1

T3

25

T4

5

T5

268

auto[1]

13956

1

T3

25

T4

4

T5

300

---

Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for wakeup_cross

Bins

enable_cp	capture_cp	wakeup_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	auto[0]	1705	1			T4	2		T5	32		T7	1
auto[0]	auto[0]	auto[1]	1551	1			T5	29		T7	1		T9	1
auto[0]	auto[1]	auto[0]	4873	1			T3	15		T4	1		T5	97
auto[0]	auto[1]	auto[1]	4160	1			T3	12		T4	1		T5	91
auto[1]	auto[0]	auto[0]	1814	1			T5	39		T7	2		T9	1
auto[1]	auto[0]	auto[1]	2202	1			T5	52		T9	2		T72	1
auto[1]	auto[1]	auto[0]	5261	1			T3	10		T4	2		T5	100
auto[1]	auto[1]	auto[1]	6043	1			T3	13		T4	3		T5	128