Group : pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_pwrmgr_env_0.1/pwrmgr_env_cov.sv

6 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
WakeupAonTimer_ctrl_cg 100.00 1 100 1 64 64
WakeupDbgCable_ctrl_cg 100.00 1 100 1 64 64
WakeupPin_ctrl_cg 100.00 1 100 1 64 64
WakeupSensorCtrl_ctrl_cg 100.00 1 100 1 64 64
WakeupSysrst_ctrl_cg 100.00 1 100 1 64 64
WakeupUsb_ctrl_cg 100.00 1 100 1 64 64




Group Instance : WakeupAonTimer_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupAonTimer_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupAonTimer_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupAonTimer_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupDbgCable_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupDbgCable_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupDbgCable_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupDbgCable_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupPin_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupPin_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupPin_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupPin_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupSensorCtrl_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupSensorCtrl_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupSensorCtrl_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupSensorCtrl_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupSysrst_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupSysrst_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupSysrst_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupSysrst_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupUsb_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupUsb_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupUsb_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupUsb_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7264 1 T2 9 T8 8 T9 11
auto[1] 19581 1 T2 11 T3 1 T5 15



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12106 1 T2 6 T5 6 T6 24
auto[1] 14739 1 T2 14 T3 1 T5 9



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 13239 1 T2 9 T5 4 T6 26
auto[1] 13606 1 T2 11 T3 1 T5 11



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1746 1 T2 2 T8 2 T9 3
auto[0] auto[0] auto[1] 1617 1 T8 2 T9 2 T60 2
auto[0] auto[1] auto[0] 4717 1 T2 2 T5 1 T6 15
auto[0] auto[1] auto[1] 4026 1 T2 2 T5 5 T6 9
auto[1] auto[0] auto[0] 1806 1 T2 4 T8 2 T9 5
auto[1] auto[0] auto[1] 2095 1 T2 3 T8 2 T9 1
auto[1] auto[1] auto[0] 4970 1 T2 1 T5 3 T6 11
auto[1] auto[1] auto[1] 5868 1 T2 6 T3 1 T5 6


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7264 1 T2 9 T8 8 T9 11
auto[1] 19581 1 T2 11 T3 1 T5 15



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 11938 1 T2 10 T5 3 T6 23
auto[1] 14907 1 T2 10 T3 1 T5 12



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 13275 1 T2 11 T3 1 T5 8
auto[1] 13570 1 T2 9 T5 7 T6 21



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1818 1 T2 3 T8 3 T9 1
auto[0] auto[0] auto[1] 1458 1 T8 1 T9 2 T10 1
auto[0] auto[1] auto[0] 4627 1 T2 4 T6 14 T7 11
auto[0] auto[1] auto[1] 4035 1 T2 3 T5 3 T6 9
auto[1] auto[0] auto[0] 1803 1 T2 2 T8 1 T9 2
auto[1] auto[0] auto[1] 2185 1 T2 4 T8 3 T9 6
auto[1] auto[1] auto[0] 5027 1 T2 2 T3 1 T5 8
auto[1] auto[1] auto[1] 5892 1 T2 2 T5 4 T6 12


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7264 1 T2 9 T8 8 T9 11
auto[1] 19581 1 T2 11 T3 1 T5 15



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12140 1 T2 7 T5 8 T6 22
auto[1] 14705 1 T2 13 T3 1 T5 7



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 13130 1 T2 8 T5 8 T6 22
auto[1] 13715 1 T2 12 T3 1 T5 7



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1837 1 T8 2 T9 2 T10 1
auto[0] auto[0] auto[1] 1495 1 T2 1 T8 3 T9 3
auto[0] auto[1] auto[0] 4599 1 T2 2 T5 5 T6 12
auto[0] auto[1] auto[1] 4209 1 T2 4 T5 3 T6 10
auto[1] auto[0] auto[0] 1808 1 T2 3 T8 1 T9 4
auto[1] auto[0] auto[1] 2124 1 T2 5 T8 2 T9 2
auto[1] auto[1] auto[0] 4886 1 T2 3 T5 3 T6 10
auto[1] auto[1] auto[1] 5887 1 T2 2 T3 1 T5 4


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7264 1 T2 9 T8 8 T9 11
auto[1] 19581 1 T2 11 T3 1 T5 15



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12122 1 T2 9 T3 1 T5 7
auto[1] 14723 1 T2 11 T5 8 T6 33



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 13376 1 T2 9 T3 1 T5 8
auto[1] 13469 1 T2 11 T5 7 T6 19



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1835 1 T2 1 T8 3 T9 5
auto[0] auto[0] auto[1] 1555 1 T2 3 T8 2 T9 1
auto[0] auto[1] auto[0] 4685 1 T2 3 T3 1 T5 3
auto[0] auto[1] auto[1] 4047 1 T2 2 T5 4 T6 3
auto[1] auto[0] auto[0] 1775 1 T2 3 T8 2 T9 2
auto[1] auto[0] auto[1] 2099 1 T2 2 T8 1 T9 3
auto[1] auto[1] auto[0] 5081 1 T2 2 T5 5 T6 17
auto[1] auto[1] auto[1] 5768 1 T2 4 T5 3 T6 16


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7264 1 T2 9 T8 8 T9 11
auto[1] 19581 1 T2 11 T3 1 T5 15



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 11938 1 T2 11 T3 1 T5 7
auto[1] 14907 1 T2 9 T5 8 T6 28



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 13209 1 T2 12 T5 8 T6 20
auto[1] 13636 1 T2 8 T3 1 T5 7



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1799 1 T2 2 T8 1 T9 5
auto[0] auto[0] auto[1] 1610 1 T2 1 T8 1 T9 3
auto[0] auto[1] auto[0] 4617 1 T2 3 T5 6 T6 11
auto[0] auto[1] auto[1] 3912 1 T2 5 T3 1 T5 1
auto[1] auto[0] auto[0] 1737 1 T2 5 T8 1 T9 1
auto[1] auto[0] auto[1] 2118 1 T2 1 T8 5 T9 2
auto[1] auto[1] auto[0] 5056 1 T2 2 T5 2 T6 9
auto[1] auto[1] auto[1] 5996 1 T2 1 T5 6 T6 19


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 7264 1 T2 9 T8 8 T9 11
auto[1] 19581 1 T2 11 T3 1 T5 15



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12091 1 T2 7 T3 1 T5 5
auto[1] 14754 1 T2 13 T5 10 T6 23



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 13312 1 T2 11 T5 10 T6 25
auto[1] 13533 1 T2 9 T3 1 T5 5



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1765 1 T2 1 T8 2 T9 1
auto[0] auto[0] auto[1] 1528 1 T2 1 T8 5 T9 1
auto[0] auto[1] auto[0] 4795 1 T2 2 T5 5 T6 13
auto[0] auto[1] auto[1] 4003 1 T2 3 T3 1 T6 14
auto[1] auto[0] auto[0] 1801 1 T2 5 T9 6 T10 3
auto[1] auto[0] auto[1] 2170 1 T2 2 T8 1 T9 3
auto[1] auto[1] auto[0] 4951 1 T2 3 T5 5 T6 12
auto[1] auto[1] auto[1] 5832 1 T2 3 T5 5 T6 11

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%