Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4878 |
1 |
|
|
T4 |
5 |
|
T7 |
5 |
|
T9 |
2 |
auto[1] |
15277 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T5 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9232 |
1 |
|
|
T2 |
1 |
|
T4 |
5 |
|
T5 |
25 |
auto[1] |
10923 |
1 |
|
|
T4 |
8 |
|
T5 |
25 |
|
T7 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9827 |
1 |
|
|
T2 |
1 |
|
T4 |
7 |
|
T5 |
23 |
auto[1] |
10328 |
1 |
|
|
T4 |
6 |
|
T5 |
27 |
|
T7 |
6 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1184 |
1 |
|
|
T15 |
1 |
|
T16 |
1 |
|
T73 |
3 |
auto[0] |
auto[0] |
auto[1] |
1087 |
1 |
|
|
T4 |
1 |
|
T7 |
3 |
|
T9 |
2 |
auto[0] |
auto[1] |
auto[0] |
3741 |
1 |
|
|
T2 |
1 |
|
T4 |
2 |
|
T5 |
12 |
auto[0] |
auto[1] |
auto[1] |
3220 |
1 |
|
|
T4 |
2 |
|
T5 |
13 |
|
T8 |
9 |
auto[1] |
auto[0] |
auto[0] |
1179 |
1 |
|
|
T4 |
3 |
|
T15 |
1 |
|
T16 |
1 |
auto[1] |
auto[0] |
auto[1] |
1428 |
1 |
|
|
T4 |
1 |
|
T7 |
2 |
|
T16 |
1 |
auto[1] |
auto[1] |
auto[0] |
3723 |
1 |
|
|
T4 |
2 |
|
T5 |
11 |
|
T7 |
1 |
auto[1] |
auto[1] |
auto[1] |
4593 |
1 |
|
|
T4 |
2 |
|
T5 |
14 |
|
T7 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4878 |
1 |
|
|
T4 |
5 |
|
T7 |
5 |
|
T9 |
2 |
auto[1] |
15277 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T5 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9090 |
1 |
|
|
T2 |
1 |
|
T4 |
5 |
|
T5 |
27 |
auto[1] |
11065 |
1 |
|
|
T4 |
8 |
|
T5 |
23 |
|
T7 |
5 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9869 |
1 |
|
|
T2 |
1 |
|
T4 |
5 |
|
T5 |
29 |
auto[1] |
10286 |
1 |
|
|
T4 |
8 |
|
T5 |
21 |
|
T7 |
5 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1195 |
1 |
|
|
T9 |
1 |
|
T16 |
1 |
|
T73 |
3 |
auto[0] |
auto[0] |
auto[1] |
1032 |
1 |
|
|
T4 |
2 |
|
T7 |
2 |
|
T16 |
1 |
auto[0] |
auto[1] |
auto[0] |
3659 |
1 |
|
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
15 |
auto[0] |
auto[1] |
auto[1] |
3204 |
1 |
|
|
T4 |
2 |
|
T5 |
12 |
|
T8 |
8 |
auto[1] |
auto[0] |
auto[0] |
1186 |
1 |
|
|
T4 |
1 |
|
T7 |
1 |
|
T16 |
2 |
auto[1] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T4 |
2 |
|
T7 |
2 |
|
T9 |
1 |
auto[1] |
auto[1] |
auto[0] |
3829 |
1 |
|
|
T4 |
3 |
|
T5 |
14 |
|
T7 |
1 |
auto[1] |
auto[1] |
auto[1] |
4585 |
1 |
|
|
T4 |
2 |
|
T5 |
9 |
|
T7 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4878 |
1 |
|
|
T4 |
5 |
|
T7 |
5 |
|
T9 |
2 |
auto[1] |
15277 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T5 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8993 |
1 |
|
|
T2 |
1 |
|
T4 |
9 |
|
T5 |
17 |
auto[1] |
11162 |
1 |
|
|
T4 |
4 |
|
T5 |
33 |
|
T7 |
2 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9879 |
1 |
|
|
T4 |
10 |
|
T5 |
25 |
|
T7 |
4 |
auto[1] |
10276 |
1 |
|
|
T2 |
1 |
|
T4 |
3 |
|
T5 |
25 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1154 |
1 |
|
|
T4 |
2 |
|
T7 |
2 |
|
T16 |
1 |
auto[0] |
auto[0] |
auto[1] |
1032 |
1 |
|
|
T7 |
2 |
|
T9 |
1 |
|
T16 |
1 |
auto[0] |
auto[1] |
auto[0] |
3643 |
1 |
|
|
T4 |
6 |
|
T5 |
10 |
|
T7 |
1 |
auto[0] |
auto[1] |
auto[1] |
3164 |
1 |
|
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
7 |
auto[1] |
auto[0] |
auto[0] |
1243 |
1 |
|
|
T4 |
2 |
|
T7 |
1 |
|
T9 |
1 |
auto[1] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T4 |
1 |
|
T15 |
1 |
|
T16 |
1 |
auto[1] |
auto[1] |
auto[0] |
3839 |
1 |
|
|
T5 |
15 |
|
T8 |
12 |
|
T9 |
2 |
auto[1] |
auto[1] |
auto[1] |
4631 |
1 |
|
|
T4 |
1 |
|
T5 |
18 |
|
T7 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4878 |
1 |
|
|
T4 |
5 |
|
T7 |
5 |
|
T9 |
2 |
auto[1] |
15277 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T5 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9078 |
1 |
|
|
T2 |
1 |
|
T4 |
5 |
|
T5 |
30 |
auto[1] |
11077 |
1 |
|
|
T4 |
8 |
|
T5 |
20 |
|
T7 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9844 |
1 |
|
|
T2 |
1 |
|
T4 |
4 |
|
T5 |
21 |
auto[1] |
10311 |
1 |
|
|
T4 |
9 |
|
T5 |
29 |
|
T7 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1185 |
1 |
|
|
T4 |
1 |
|
T7 |
1 |
|
T9 |
2 |
auto[0] |
auto[0] |
auto[1] |
1076 |
1 |
|
|
T4 |
1 |
|
T7 |
3 |
|
T16 |
2 |
auto[0] |
auto[1] |
auto[0] |
3689 |
1 |
|
|
T2 |
1 |
|
T5 |
14 |
|
T7 |
1 |
auto[0] |
auto[1] |
auto[1] |
3128 |
1 |
|
|
T4 |
3 |
|
T5 |
16 |
|
T7 |
1 |
auto[1] |
auto[0] |
auto[0] |
1168 |
1 |
|
|
T4 |
2 |
|
T7 |
1 |
|
T15 |
2 |
auto[1] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T4 |
1 |
|
T16 |
2 |
|
T73 |
2 |
auto[1] |
auto[1] |
auto[0] |
3802 |
1 |
|
|
T4 |
1 |
|
T5 |
7 |
|
T8 |
12 |
auto[1] |
auto[1] |
auto[1] |
4658 |
1 |
|
|
T4 |
4 |
|
T5 |
13 |
|
T8 |
16 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4878 |
1 |
|
|
T4 |
5 |
|
T7 |
5 |
|
T9 |
2 |
auto[1] |
15277 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T5 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9244 |
1 |
|
|
T2 |
1 |
|
T4 |
6 |
|
T5 |
25 |
auto[1] |
10911 |
1 |
|
|
T4 |
7 |
|
T5 |
25 |
|
T7 |
6 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
10099 |
1 |
|
|
T4 |
6 |
|
T5 |
23 |
|
T7 |
4 |
auto[1] |
10056 |
1 |
|
|
T2 |
1 |
|
T4 |
7 |
|
T5 |
27 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1219 |
1 |
|
|
T4 |
3 |
|
T9 |
1 |
|
T16 |
1 |
auto[0] |
auto[0] |
auto[1] |
1059 |
1 |
|
|
T4 |
1 |
|
T7 |
1 |
|
T15 |
1 |
auto[0] |
auto[1] |
auto[0] |
3742 |
1 |
|
|
T4 |
1 |
|
T5 |
13 |
|
T8 |
15 |
auto[0] |
auto[1] |
auto[1] |
3224 |
1 |
|
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
12 |
auto[1] |
auto[0] |
auto[0] |
1242 |
1 |
|
|
T4 |
1 |
|
T7 |
2 |
|
T16 |
1 |
auto[1] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T7 |
2 |
|
T9 |
1 |
|
T15 |
1 |
auto[1] |
auto[1] |
auto[0] |
3896 |
1 |
|
|
T4 |
1 |
|
T5 |
10 |
|
T7 |
2 |
auto[1] |
auto[1] |
auto[1] |
4415 |
1 |
|
|
T4 |
5 |
|
T5 |
15 |
|
T8 |
13 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4878 |
1 |
|
|
T4 |
5 |
|
T7 |
5 |
|
T9 |
2 |
auto[1] |
15277 |
1 |
|
|
T2 |
1 |
|
T4 |
8 |
|
T5 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9177 |
1 |
|
|
T2 |
1 |
|
T4 |
5 |
|
T5 |
25 |
auto[1] |
10978 |
1 |
|
|
T4 |
8 |
|
T5 |
25 |
|
T7 |
6 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9881 |
1 |
|
|
T2 |
1 |
|
T4 |
5 |
|
T5 |
31 |
auto[1] |
10274 |
1 |
|
|
T4 |
8 |
|
T5 |
19 |
|
T7 |
2 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1175 |
1 |
|
|
T4 |
2 |
|
T7 |
1 |
|
T15 |
1 |
auto[0] |
auto[0] |
auto[1] |
1029 |
1 |
|
|
T9 |
1 |
|
T16 |
1 |
|
T73 |
2 |
auto[0] |
auto[1] |
auto[0] |
3706 |
1 |
|
|
T2 |
1 |
|
T4 |
2 |
|
T5 |
18 |
auto[0] |
auto[1] |
auto[1] |
3267 |
1 |
|
|
T4 |
1 |
|
T5 |
7 |
|
T8 |
6 |
auto[1] |
auto[0] |
auto[0] |
1203 |
1 |
|
|
T7 |
2 |
|
T15 |
1 |
|
T16 |
2 |
auto[1] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T4 |
3 |
|
T7 |
2 |
|
T9 |
1 |
auto[1] |
auto[1] |
auto[0] |
3797 |
1 |
|
|
T4 |
1 |
|
T5 |
13 |
|
T7 |
2 |
auto[1] |
auto[1] |
auto[1] |
4507 |
1 |
|
|
T4 |
4 |
|
T5 |
12 |
|
T8 |
12 |