Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4173 |
1 |
|
|
T1 |
2 |
|
T6 |
10 |
|
T10 |
19 |
auto[1] |
13855 |
1 |
|
|
T1 |
3 |
|
T6 |
10 |
|
T10 |
22 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8220 |
1 |
|
|
T1 |
3 |
|
T6 |
8 |
|
T10 |
16 |
auto[1] |
9808 |
1 |
|
|
T1 |
2 |
|
T6 |
12 |
|
T10 |
25 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8938 |
1 |
|
|
T1 |
1 |
|
T6 |
11 |
|
T10 |
26 |
auto[1] |
9090 |
1 |
|
|
T1 |
4 |
|
T6 |
9 |
|
T10 |
15 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1033 |
1 |
|
|
T6 |
4 |
|
T10 |
4 |
|
T40 |
1 |
auto[0] |
auto[0] |
auto[1] |
898 |
1 |
|
|
T6 |
1 |
|
T10 |
3 |
|
T77 |
2 |
auto[0] |
auto[1] |
auto[0] |
3379 |
1 |
|
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
6 |
auto[0] |
auto[1] |
auto[1] |
2910 |
1 |
|
|
T1 |
2 |
|
T6 |
2 |
|
T10 |
3 |
auto[1] |
auto[0] |
auto[0] |
1044 |
1 |
|
|
T6 |
4 |
|
T10 |
8 |
|
T40 |
2 |
auto[1] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T1 |
2 |
|
T6 |
1 |
|
T10 |
4 |
auto[1] |
auto[1] |
auto[0] |
3482 |
1 |
|
|
T6 |
2 |
|
T10 |
8 |
|
T40 |
1 |
auto[1] |
auto[1] |
auto[1] |
4084 |
1 |
|
|
T6 |
5 |
|
T10 |
5 |
|
T40 |
4 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4173 |
1 |
|
|
T1 |
2 |
|
T6 |
10 |
|
T10 |
19 |
auto[1] |
13855 |
1 |
|
|
T1 |
3 |
|
T6 |
10 |
|
T10 |
22 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8219 |
1 |
|
|
T1 |
3 |
|
T6 |
9 |
|
T10 |
18 |
auto[1] |
9809 |
1 |
|
|
T1 |
2 |
|
T6 |
11 |
|
T10 |
23 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
9025 |
1 |
|
|
T1 |
2 |
|
T6 |
16 |
|
T10 |
27 |
auto[1] |
9003 |
1 |
|
|
T1 |
3 |
|
T6 |
4 |
|
T10 |
14 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1042 |
1 |
|
|
T1 |
1 |
|
T6 |
4 |
|
T10 |
6 |
auto[0] |
auto[0] |
auto[1] |
905 |
1 |
|
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
4 |
auto[0] |
auto[1] |
auto[0] |
3436 |
1 |
|
|
T1 |
1 |
|
T6 |
3 |
|
T10 |
6 |
auto[0] |
auto[1] |
auto[1] |
2836 |
1 |
|
|
T6 |
1 |
|
T10 |
2 |
|
T40 |
2 |
auto[1] |
auto[0] |
auto[0] |
1065 |
1 |
|
|
T6 |
4 |
|
T10 |
9 |
|
T40 |
2 |
auto[1] |
auto[0] |
auto[1] |
1161 |
1 |
|
|
T6 |
1 |
|
T76 |
1 |
|
T20 |
31 |
auto[1] |
auto[1] |
auto[0] |
3482 |
1 |
|
|
T6 |
5 |
|
T10 |
6 |
|
T40 |
2 |
auto[1] |
auto[1] |
auto[1] |
4101 |
1 |
|
|
T1 |
2 |
|
T6 |
1 |
|
T10 |
8 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4173 |
1 |
|
|
T1 |
2 |
|
T6 |
10 |
|
T10 |
19 |
auto[1] |
13855 |
1 |
|
|
T1 |
3 |
|
T6 |
10 |
|
T10 |
22 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8112 |
1 |
|
|
T1 |
2 |
|
T6 |
11 |
|
T10 |
19 |
auto[1] |
9916 |
1 |
|
|
T1 |
3 |
|
T6 |
9 |
|
T10 |
22 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8940 |
1 |
|
|
T1 |
5 |
|
T6 |
12 |
|
T10 |
24 |
auto[1] |
9088 |
1 |
|
|
T6 |
8 |
|
T10 |
17 |
|
T40 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1042 |
1 |
|
|
T1 |
1 |
|
T6 |
3 |
|
T10 |
5 |
auto[0] |
auto[0] |
auto[1] |
883 |
1 |
|
|
T6 |
2 |
|
T10 |
3 |
|
T40 |
1 |
auto[0] |
auto[1] |
auto[0] |
3344 |
1 |
|
|
T1 |
1 |
|
T6 |
3 |
|
T10 |
7 |
auto[0] |
auto[1] |
auto[1] |
2843 |
1 |
|
|
T6 |
3 |
|
T10 |
4 |
|
T40 |
2 |
auto[1] |
auto[0] |
auto[0] |
1019 |
1 |
|
|
T1 |
1 |
|
T6 |
3 |
|
T10 |
6 |
auto[1] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T6 |
2 |
|
T10 |
5 |
|
T40 |
1 |
auto[1] |
auto[1] |
auto[0] |
3535 |
1 |
|
|
T1 |
2 |
|
T6 |
3 |
|
T10 |
6 |
auto[1] |
auto[1] |
auto[1] |
4133 |
1 |
|
|
T6 |
1 |
|
T10 |
5 |
|
T20 |
73 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4173 |
1 |
|
|
T1 |
2 |
|
T6 |
10 |
|
T10 |
19 |
auto[1] |
13855 |
1 |
|
|
T1 |
3 |
|
T6 |
10 |
|
T10 |
22 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8107 |
1 |
|
|
T1 |
3 |
|
T6 |
8 |
|
T10 |
18 |
auto[1] |
9921 |
1 |
|
|
T1 |
2 |
|
T6 |
12 |
|
T10 |
23 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8861 |
1 |
|
|
T1 |
4 |
|
T6 |
9 |
|
T10 |
20 |
auto[1] |
9167 |
1 |
|
|
T1 |
1 |
|
T6 |
11 |
|
T10 |
21 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1025 |
1 |
|
|
T1 |
1 |
|
T6 |
2 |
|
T10 |
7 |
auto[0] |
auto[0] |
auto[1] |
834 |
1 |
|
|
T6 |
1 |
|
T10 |
5 |
|
T40 |
2 |
auto[0] |
auto[1] |
auto[0] |
3320 |
1 |
|
|
T1 |
2 |
|
T6 |
3 |
|
T10 |
2 |
auto[0] |
auto[1] |
auto[1] |
2928 |
1 |
|
|
T6 |
2 |
|
T10 |
4 |
|
T77 |
2 |
auto[1] |
auto[0] |
auto[0] |
1071 |
1 |
|
|
T1 |
1 |
|
T6 |
2 |
|
T10 |
4 |
auto[1] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T6 |
5 |
|
T10 |
3 |
|
T20 |
33 |
auto[1] |
auto[1] |
auto[0] |
3445 |
1 |
|
|
T6 |
2 |
|
T10 |
7 |
|
T40 |
1 |
auto[1] |
auto[1] |
auto[1] |
4162 |
1 |
|
|
T1 |
1 |
|
T6 |
3 |
|
T10 |
9 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4173 |
1 |
|
|
T1 |
2 |
|
T6 |
10 |
|
T10 |
19 |
auto[1] |
13855 |
1 |
|
|
T1 |
3 |
|
T6 |
10 |
|
T10 |
22 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8074 |
1 |
|
|
T1 |
2 |
|
T6 |
8 |
|
T10 |
15 |
auto[1] |
9954 |
1 |
|
|
T1 |
3 |
|
T6 |
12 |
|
T10 |
26 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8881 |
1 |
|
|
T6 |
11 |
|
T10 |
17 |
|
T40 |
8 |
auto[1] |
9147 |
1 |
|
|
T1 |
5 |
|
T6 |
9 |
|
T10 |
24 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1028 |
1 |
|
|
T6 |
2 |
|
T10 |
3 |
|
T20 |
28 |
auto[0] |
auto[0] |
auto[1] |
946 |
1 |
|
|
T1 |
1 |
|
T6 |
2 |
|
T10 |
5 |
auto[0] |
auto[1] |
auto[0] |
3278 |
1 |
|
|
T6 |
3 |
|
T10 |
2 |
|
T40 |
1 |
auto[0] |
auto[1] |
auto[1] |
2822 |
1 |
|
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
5 |
auto[1] |
auto[0] |
auto[0] |
1015 |
1 |
|
|
T6 |
1 |
|
T10 |
4 |
|
T40 |
4 |
auto[1] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T1 |
1 |
|
T6 |
5 |
|
T10 |
7 |
auto[1] |
auto[1] |
auto[0] |
3560 |
1 |
|
|
T6 |
5 |
|
T10 |
8 |
|
T40 |
3 |
auto[1] |
auto[1] |
auto[1] |
4195 |
1 |
|
|
T1 |
2 |
|
T6 |
1 |
|
T10 |
7 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
4173 |
1 |
|
|
T1 |
2 |
|
T6 |
10 |
|
T10 |
19 |
auto[1] |
13855 |
1 |
|
|
T1 |
3 |
|
T6 |
10 |
|
T10 |
22 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8190 |
1 |
|
|
T1 |
1 |
|
T6 |
11 |
|
T10 |
18 |
auto[1] |
9838 |
1 |
|
|
T1 |
4 |
|
T6 |
9 |
|
T10 |
23 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8828 |
1 |
|
|
T1 |
1 |
|
T6 |
9 |
|
T10 |
22 |
auto[1] |
9200 |
1 |
|
|
T1 |
4 |
|
T6 |
11 |
|
T10 |
19 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1006 |
1 |
|
|
T6 |
2 |
|
T10 |
7 |
|
T77 |
2 |
auto[0] |
auto[0] |
auto[1] |
842 |
1 |
|
|
T6 |
3 |
|
T10 |
4 |
|
T20 |
27 |
auto[0] |
auto[1] |
auto[0] |
3410 |
1 |
|
|
T6 |
3 |
|
T10 |
3 |
|
T40 |
3 |
auto[0] |
auto[1] |
auto[1] |
2932 |
1 |
|
|
T1 |
1 |
|
T6 |
3 |
|
T10 |
4 |
auto[1] |
auto[0] |
auto[0] |
1045 |
1 |
|
|
T1 |
1 |
|
T6 |
3 |
|
T10 |
3 |
auto[1] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T1 |
1 |
|
T6 |
2 |
|
T10 |
5 |
auto[1] |
auto[1] |
auto[0] |
3367 |
1 |
|
|
T6 |
1 |
|
T10 |
9 |
|
T40 |
2 |
auto[1] |
auto[1] |
auto[1] |
4146 |
1 |
|
|
T1 |
2 |
|
T6 |
3 |
|
T10 |
6 |