| T585 |
/workspace/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.636286039 |
|
|
Mar 05 01:43:32 PM PST 24 |
Mar 05 01:43:34 PM PST 24 |
1013595016 ps |
| T586 |
/workspace/coverage/default/19.pwrmgr_smoke.300329402 |
|
|
Mar 05 01:39:03 PM PST 24 |
Mar 05 01:39:04 PM PST 24 |
50174586 ps |
| T587 |
/workspace/coverage/default/18.pwrmgr_disable_rom_integrity_check.2949151844 |
|
|
Mar 05 01:39:03 PM PST 24 |
Mar 05 01:39:04 PM PST 24 |
54918246 ps |
| T588 |
/workspace/coverage/default/11.pwrmgr_sec_cm_rstmgr_intersig_mubi.1307080145 |
|
|
Mar 05 01:37:56 PM PST 24 |
Mar 05 01:37:57 PM PST 24 |
101626496 ps |
| T589 |
/workspace/coverage/default/49.pwrmgr_stress_all_with_rand_reset.3804946044 |
|
|
Mar 05 01:43:58 PM PST 24 |
Mar 05 01:44:08 PM PST 24 |
8682644148 ps |
| T590 |
/workspace/coverage/default/48.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.182784415 |
|
|
Mar 05 01:43:36 PM PST 24 |
Mar 05 01:43:40 PM PST 24 |
896297500 ps |
| T591 |
/workspace/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.1677940861 |
|
|
Mar 05 01:42:07 PM PST 24 |
Mar 05 01:42:08 PM PST 24 |
111059549 ps |
| T592 |
/workspace/coverage/default/0.pwrmgr_reset_invalid.4028437607 |
|
|
Mar 05 01:35:49 PM PST 24 |
Mar 05 01:35:50 PM PST 24 |
121058189 ps |
| T593 |
/workspace/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.857129501 |
|
|
Mar 05 01:43:19 PM PST 24 |
Mar 05 01:43:20 PM PST 24 |
209165003 ps |
| T594 |
/workspace/coverage/default/10.pwrmgr_stress_all.3481543723 |
|
|
Mar 05 01:37:54 PM PST 24 |
Mar 05 01:37:56 PM PST 24 |
1233768956 ps |
| T595 |
/workspace/coverage/default/41.pwrmgr_wakeup.3667436136 |
|
|
Mar 05 01:42:48 PM PST 24 |
Mar 05 01:42:49 PM PST 24 |
146391722 ps |
| T596 |
/workspace/coverage/default/41.pwrmgr_smoke.3569814534 |
|
|
Mar 05 01:42:37 PM PST 24 |
Mar 05 01:42:38 PM PST 24 |
37334106 ps |
| T597 |
/workspace/coverage/default/17.pwrmgr_reset.1331380715 |
|
|
Mar 05 01:38:50 PM PST 24 |
Mar 05 01:38:51 PM PST 24 |
202619705 ps |
| T598 |
/workspace/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.1074315320 |
|
|
Mar 05 01:42:40 PM PST 24 |
Mar 05 01:42:42 PM PST 24 |
74522501 ps |
| T599 |
/workspace/coverage/default/15.pwrmgr_reset.3338447078 |
|
|
Mar 05 01:38:32 PM PST 24 |
Mar 05 01:38:34 PM PST 24 |
176676516 ps |
| T600 |
/workspace/coverage/default/28.pwrmgr_lowpower_invalid.290902470 |
|
|
Mar 05 01:40:51 PM PST 24 |
Mar 05 01:40:52 PM PST 24 |
78678931 ps |
| T601 |
/workspace/coverage/default/10.pwrmgr_stress_all_with_rand_reset.2890767631 |
|
|
Mar 05 01:37:51 PM PST 24 |
Mar 05 01:38:09 PM PST 24 |
18270994593 ps |
| T602 |
/workspace/coverage/default/15.pwrmgr_glitch.991356748 |
|
|
Mar 05 01:38:40 PM PST 24 |
Mar 05 01:38:41 PM PST 24 |
50832412 ps |
| T603 |
/workspace/coverage/default/11.pwrmgr_stress_all.3978768173 |
|
|
Mar 05 01:37:59 PM PST 24 |
Mar 05 01:38:08 PM PST 24 |
1986459659 ps |
| T604 |
/workspace/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2703662141 |
|
|
Mar 05 01:37:37 PM PST 24 |
Mar 05 01:37:40 PM PST 24 |
1423423188 ps |
| T605 |
/workspace/coverage/default/9.pwrmgr_wakeup.3810374278 |
|
|
Mar 05 01:37:38 PM PST 24 |
Mar 05 01:37:40 PM PST 24 |
315141748 ps |
| T606 |
/workspace/coverage/default/29.pwrmgr_lowpower_wakeup_race.3453816168 |
|
|
Mar 05 01:40:46 PM PST 24 |
Mar 05 01:40:47 PM PST 24 |
307202621 ps |
| T607 |
/workspace/coverage/default/34.pwrmgr_reset_invalid.4127973259 |
|
|
Mar 05 01:41:41 PM PST 24 |
Mar 05 01:41:43 PM PST 24 |
111910235 ps |
| T608 |
/workspace/coverage/default/12.pwrmgr_lowpower_wakeup_race.1907416100 |
|
|
Mar 05 01:38:05 PM PST 24 |
Mar 05 01:38:07 PM PST 24 |
134890295 ps |
| T609 |
/workspace/coverage/default/43.pwrmgr_aborted_low_power.3988529319 |
|
|
Mar 05 01:43:00 PM PST 24 |
Mar 05 01:43:01 PM PST 24 |
18414424 ps |
| T610 |
/workspace/coverage/default/37.pwrmgr_wakeup.2448770417 |
|
|
Mar 05 01:41:58 PM PST 24 |
Mar 05 01:41:59 PM PST 24 |
277563169 ps |
| T611 |
/workspace/coverage/default/31.pwrmgr_stress_all.3924136927 |
|
|
Mar 05 01:41:08 PM PST 24 |
Mar 05 01:41:10 PM PST 24 |
64570847 ps |
| T612 |
/workspace/coverage/default/30.pwrmgr_smoke.3021200188 |
|
|
Mar 05 01:40:55 PM PST 24 |
Mar 05 01:40:56 PM PST 24 |
31527307 ps |
| T613 |
/workspace/coverage/default/3.pwrmgr_aborted_low_power.1717442103 |
|
|
Mar 05 01:36:31 PM PST 24 |
Mar 05 01:36:32 PM PST 24 |
24726843 ps |
| T614 |
/workspace/coverage/default/14.pwrmgr_aborted_low_power.741360999 |
|
|
Mar 05 01:38:27 PM PST 24 |
Mar 05 01:38:28 PM PST 24 |
50504235 ps |
| T615 |
/workspace/coverage/default/46.pwrmgr_aborted_low_power.1683458499 |
|
|
Mar 05 01:43:24 PM PST 24 |
Mar 05 01:43:25 PM PST 24 |
48867408 ps |
| T616 |
/workspace/coverage/default/45.pwrmgr_stress_all.3589082152 |
|
|
Mar 05 01:43:25 PM PST 24 |
Mar 05 01:43:28 PM PST 24 |
2662520165 ps |
| T617 |
/workspace/coverage/default/49.pwrmgr_disable_rom_integrity_check.494395359 |
|
|
Mar 05 01:43:59 PM PST 24 |
Mar 05 01:44:00 PM PST 24 |
82767048 ps |
| T618 |
/workspace/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.1108548546 |
|
|
Mar 05 01:41:30 PM PST 24 |
Mar 05 01:41:31 PM PST 24 |
67032370 ps |
| T619 |
/workspace/coverage/default/16.pwrmgr_stress_all.3814588451 |
|
|
Mar 05 01:38:46 PM PST 24 |
Mar 05 01:38:49 PM PST 24 |
2845673279 ps |
| T620 |
/workspace/coverage/default/5.pwrmgr_reset.1433430586 |
|
|
Mar 05 01:36:54 PM PST 24 |
Mar 05 01:36:56 PM PST 24 |
119499652 ps |
| T621 |
/workspace/coverage/default/7.pwrmgr_smoke.637037998 |
|
|
Mar 05 01:37:09 PM PST 24 |
Mar 05 01:37:10 PM PST 24 |
49529364 ps |
| T622 |
/workspace/coverage/default/43.pwrmgr_reset.3339166304 |
|
|
Mar 05 01:42:55 PM PST 24 |
Mar 05 01:42:57 PM PST 24 |
80848124 ps |
| T623 |
/workspace/coverage/default/26.pwrmgr_lowpower_invalid.4291976155 |
|
|
Mar 05 01:40:20 PM PST 24 |
Mar 05 01:40:21 PM PST 24 |
45149305 ps |
| T624 |
/workspace/coverage/default/13.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2513695303 |
|
|
Mar 05 01:38:13 PM PST 24 |
Mar 05 01:38:16 PM PST 24 |
768579314 ps |
| T625 |
/workspace/coverage/default/14.pwrmgr_wakeup_reset.4263497489 |
|
|
Mar 05 01:38:23 PM PST 24 |
Mar 05 01:38:24 PM PST 24 |
166413592 ps |
| T626 |
/workspace/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.2750714502 |
|
|
Mar 05 01:38:40 PM PST 24 |
Mar 05 01:38:41 PM PST 24 |
196179071 ps |
| T627 |
/workspace/coverage/default/41.pwrmgr_stress_all.1254902967 |
|
|
Mar 05 01:42:47 PM PST 24 |
Mar 05 01:42:50 PM PST 24 |
1755976840 ps |
| T628 |
/workspace/coverage/default/21.pwrmgr_wakeup.639014134 |
|
|
Mar 05 01:39:33 PM PST 24 |
Mar 05 01:39:35 PM PST 24 |
262627367 ps |
| T629 |
/workspace/coverage/default/10.pwrmgr_smoke.4103825118 |
|
|
Mar 05 01:37:44 PM PST 24 |
Mar 05 01:37:47 PM PST 24 |
47148591 ps |
| T630 |
/workspace/coverage/default/9.pwrmgr_lowpower_wakeup_race.2273557297 |
|
|
Mar 05 01:37:35 PM PST 24 |
Mar 05 01:37:36 PM PST 24 |
225902173 ps |
| T631 |
/workspace/coverage/default/19.pwrmgr_reset.3805318196 |
|
|
Mar 05 01:39:02 PM PST 24 |
Mar 05 01:39:04 PM PST 24 |
101618710 ps |
| T632 |
/workspace/coverage/default/19.pwrmgr_wakeup_reset.1731129598 |
|
|
Mar 05 01:39:11 PM PST 24 |
Mar 05 01:39:13 PM PST 24 |
153599179 ps |
| T633 |
/workspace/coverage/default/35.pwrmgr_sec_cm_rstmgr_intersig_mubi.2571422266 |
|
|
Mar 05 01:41:43 PM PST 24 |
Mar 05 01:41:45 PM PST 24 |
53493806 ps |
| T634 |
/workspace/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2824926006 |
|
|
Mar 05 01:42:48 PM PST 24 |
Mar 05 01:42:51 PM PST 24 |
1447853760 ps |
| T139 |
/workspace/coverage/default/43.pwrmgr_stress_all_with_rand_reset.1415979994 |
|
|
Mar 05 01:43:03 PM PST 24 |
Mar 05 01:43:29 PM PST 24 |
8330505718 ps |
| T150 |
/workspace/coverage/default/20.pwrmgr_lowpower_invalid.2902256188 |
|
|
Mar 05 01:39:33 PM PST 24 |
Mar 05 01:39:34 PM PST 24 |
150497464 ps |
| T151 |
/workspace/coverage/default/6.pwrmgr_reset_invalid.502089593 |
|
|
Mar 05 01:37:12 PM PST 24 |
Mar 05 01:37:13 PM PST 24 |
176751241 ps |
| T152 |
/workspace/coverage/default/36.pwrmgr_stress_all_with_rand_reset.875058626 |
|
|
Mar 05 01:42:00 PM PST 24 |
Mar 05 01:42:18 PM PST 24 |
10117848269 ps |
| T153 |
/workspace/coverage/default/11.pwrmgr_reset.1331730526 |
|
|
Mar 05 01:37:51 PM PST 24 |
Mar 05 01:37:53 PM PST 24 |
76634565 ps |
| T154 |
/workspace/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.900867538 |
|
|
Mar 05 01:42:48 PM PST 24 |
Mar 05 01:42:51 PM PST 24 |
766919405 ps |
| T155 |
/workspace/coverage/default/25.pwrmgr_lowpower_wakeup_race.3830248127 |
|
|
Mar 05 01:40:08 PM PST 24 |
Mar 05 01:40:09 PM PST 24 |
116531318 ps |
| T156 |
/workspace/coverage/default/27.pwrmgr_escalation_timeout.602871901 |
|
|
Mar 05 01:40:30 PM PST 24 |
Mar 05 01:40:31 PM PST 24 |
767537962 ps |
| T157 |
/workspace/coverage/default/13.pwrmgr_sec_cm_rstmgr_intersig_mubi.3615957504 |
|
|
Mar 05 01:38:14 PM PST 24 |
Mar 05 01:38:15 PM PST 24 |
112733843 ps |
| T158 |
/workspace/coverage/default/26.pwrmgr_esc_clk_rst_malfunc.963767314 |
|
|
Mar 05 01:40:19 PM PST 24 |
Mar 05 01:40:20 PM PST 24 |
29066090 ps |
| T635 |
/workspace/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.221314619 |
|
|
Mar 05 01:40:54 PM PST 24 |
Mar 05 01:40:55 PM PST 24 |
147993356 ps |
| T636 |
/workspace/coverage/default/0.pwrmgr_glitch.1618494510 |
|
|
Mar 05 01:35:52 PM PST 24 |
Mar 05 01:35:53 PM PST 24 |
44026906 ps |
| T637 |
/workspace/coverage/default/22.pwrmgr_wakeup.161087865 |
|
|
Mar 05 01:39:42 PM PST 24 |
Mar 05 01:39:44 PM PST 24 |
142436607 ps |
| T638 |
/workspace/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1339787964 |
|
|
Mar 05 01:43:45 PM PST 24 |
Mar 05 01:43:49 PM PST 24 |
926929086 ps |
| T639 |
/workspace/coverage/default/1.pwrmgr_smoke.2341660244 |
|
|
Mar 05 01:35:58 PM PST 24 |
Mar 05 01:35:58 PM PST 24 |
61349861 ps |
| T640 |
/workspace/coverage/default/23.pwrmgr_reset.3372134447 |
|
|
Mar 05 01:39:56 PM PST 24 |
Mar 05 01:40:03 PM PST 24 |
63549757 ps |
| T641 |
/workspace/coverage/default/3.pwrmgr_sec_cm_rstmgr_intersig_mubi.1569276444 |
|
|
Mar 05 01:36:32 PM PST 24 |
Mar 05 01:36:33 PM PST 24 |
153082675 ps |
| T642 |
/workspace/coverage/default/35.pwrmgr_glitch.2113914776 |
|
|
Mar 05 01:41:45 PM PST 24 |
Mar 05 01:41:47 PM PST 24 |
54306508 ps |
| T643 |
/workspace/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.784841327 |
|
|
Mar 05 01:39:25 PM PST 24 |
Mar 05 01:39:30 PM PST 24 |
882643569 ps |
| T644 |
/workspace/coverage/default/7.pwrmgr_lowpower_wakeup_race.3728552271 |
|
|
Mar 05 01:37:16 PM PST 24 |
Mar 05 01:37:18 PM PST 24 |
418942513 ps |
| T645 |
/workspace/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3086106339 |
|
|
Mar 05 01:38:05 PM PST 24 |
Mar 05 01:38:10 PM PST 24 |
1026136303 ps |
| T646 |
/workspace/coverage/default/36.pwrmgr_lowpower_wakeup_race.141653326 |
|
|
Mar 05 01:41:51 PM PST 24 |
Mar 05 01:41:52 PM PST 24 |
249624306 ps |
| T647 |
/workspace/coverage/default/7.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1420585162 |
|
|
Mar 05 01:37:19 PM PST 24 |
Mar 05 01:37:21 PM PST 24 |
1003652808 ps |
| T648 |
/workspace/coverage/default/10.pwrmgr_lowpower_wakeup_race.3518838536 |
|
|
Mar 05 01:37:44 PM PST 24 |
Mar 05 01:37:48 PM PST 24 |
361651594 ps |
| T649 |
/workspace/coverage/default/42.pwrmgr_wakeup_reset.1932880688 |
|
|
Mar 05 01:42:47 PM PST 24 |
Mar 05 01:42:49 PM PST 24 |
393997702 ps |
| T650 |
/workspace/coverage/default/25.pwrmgr_glitch.3683161824 |
|
|
Mar 05 01:40:16 PM PST 24 |
Mar 05 01:40:17 PM PST 24 |
60998612 ps |
| T651 |
/workspace/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.2499970770 |
|
|
Mar 05 01:38:50 PM PST 24 |
Mar 05 01:38:52 PM PST 24 |
216574257 ps |
| T652 |
/workspace/coverage/default/19.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1141769813 |
|
|
Mar 05 01:39:10 PM PST 24 |
Mar 05 01:39:12 PM PST 24 |
1068585911 ps |
| T653 |
/workspace/coverage/default/21.pwrmgr_lowpower_wakeup_race.1293995509 |
|
|
Mar 05 01:39:33 PM PST 24 |
Mar 05 01:39:34 PM PST 24 |
247577033 ps |
| T654 |
/workspace/coverage/default/48.pwrmgr_lowpower_wakeup_race.724161468 |
|
|
Mar 05 01:43:41 PM PST 24 |
Mar 05 01:43:41 PM PST 24 |
95155475 ps |
| T655 |
/workspace/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1965350831 |
|
|
Mar 05 01:43:01 PM PST 24 |
Mar 05 01:43:04 PM PST 24 |
1013685778 ps |
| T656 |
/workspace/coverage/default/1.pwrmgr_sec_cm_ctrl_config_regwen.1616096858 |
|
|
Mar 05 01:36:08 PM PST 24 |
Mar 05 01:36:10 PM PST 24 |
245804019 ps |
| T657 |
/workspace/coverage/default/5.pwrmgr_sec_cm_rstmgr_intersig_mubi.2653530409 |
|
|
Mar 05 01:37:02 PM PST 24 |
Mar 05 01:37:03 PM PST 24 |
144771139 ps |
| T658 |
/workspace/coverage/default/4.pwrmgr_esc_clk_rst_malfunc.649916898 |
|
|
Mar 05 01:36:45 PM PST 24 |
Mar 05 01:36:46 PM PST 24 |
29519759 ps |
| T659 |
/workspace/coverage/default/39.pwrmgr_wakeup_reset.1712602769 |
|
|
Mar 05 01:42:22 PM PST 24 |
Mar 05 01:42:23 PM PST 24 |
83466750 ps |
| T660 |
/workspace/coverage/default/25.pwrmgr_wakeup.3672003783 |
|
|
Mar 05 01:40:07 PM PST 24 |
Mar 05 01:40:08 PM PST 24 |
168313806 ps |
| T661 |
/workspace/coverage/default/32.pwrmgr_sec_cm_rstmgr_intersig_mubi.877703825 |
|
|
Mar 05 01:41:21 PM PST 24 |
Mar 05 01:41:22 PM PST 24 |
100467849 ps |
| T662 |
/workspace/coverage/default/5.pwrmgr_disable_rom_integrity_check.922628795 |
|
|
Mar 05 01:37:03 PM PST 24 |
Mar 05 01:37:04 PM PST 24 |
79391856 ps |
| T663 |
/workspace/coverage/default/8.pwrmgr_stress_all.3917920406 |
|
|
Mar 05 01:37:36 PM PST 24 |
Mar 05 01:37:38 PM PST 24 |
462306467 ps |
| T664 |
/workspace/coverage/default/36.pwrmgr_wakeup_reset.1837123405 |
|
|
Mar 05 01:41:53 PM PST 24 |
Mar 05 01:41:55 PM PST 24 |
254706299 ps |
| T665 |
/workspace/coverage/default/45.pwrmgr_aborted_low_power.3259909743 |
|
|
Mar 05 01:43:23 PM PST 24 |
Mar 05 01:43:24 PM PST 24 |
28410749 ps |
| T666 |
/workspace/coverage/default/44.pwrmgr_stress_all.3844888290 |
|
|
Mar 05 01:43:08 PM PST 24 |
Mar 05 01:43:17 PM PST 24 |
1686679255 ps |
| T667 |
/workspace/coverage/default/18.pwrmgr_global_esc.2461772611 |
|
|
Mar 05 01:39:06 PM PST 24 |
Mar 05 01:39:08 PM PST 24 |
38354808 ps |
| T668 |
/workspace/coverage/default/35.pwrmgr_aborted_low_power.2141802968 |
|
|
Mar 05 01:41:43 PM PST 24 |
Mar 05 01:41:45 PM PST 24 |
21197695 ps |
| T669 |
/workspace/coverage/default/44.pwrmgr_reset_invalid.3028259626 |
|
|
Mar 05 01:43:10 PM PST 24 |
Mar 05 01:43:11 PM PST 24 |
184191329 ps |
| T670 |
/workspace/coverage/default/15.pwrmgr_stress_all.3053747688 |
|
|
Mar 05 01:38:44 PM PST 24 |
Mar 05 01:38:48 PM PST 24 |
2820454052 ps |
| T671 |
/workspace/coverage/default/17.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4117363262 |
|
|
Mar 05 01:38:52 PM PST 24 |
Mar 05 01:38:56 PM PST 24 |
853607480 ps |
| T672 |
/workspace/coverage/default/16.pwrmgr_aborted_low_power.974508645 |
|
|
Mar 05 01:38:44 PM PST 24 |
Mar 05 01:38:45 PM PST 24 |
32040351 ps |
| T673 |
/workspace/coverage/default/35.pwrmgr_wakeup_reset.4219722022 |
|
|
Mar 05 01:41:41 PM PST 24 |
Mar 05 01:41:42 PM PST 24 |
349080025 ps |
| T674 |
/workspace/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.293656188 |
|
|
Mar 05 01:37:19 PM PST 24 |
Mar 05 01:37:23 PM PST 24 |
820649307 ps |
| T675 |
/workspace/coverage/default/6.pwrmgr_lowpower_invalid.1587279662 |
|
|
Mar 05 01:37:12 PM PST 24 |
Mar 05 01:37:13 PM PST 24 |
42258318 ps |
| T676 |
/workspace/coverage/default/12.pwrmgr_global_esc.4156840567 |
|
|
Mar 05 01:38:07 PM PST 24 |
Mar 05 01:38:11 PM PST 24 |
28381131 ps |
| T677 |
/workspace/coverage/default/38.pwrmgr_reset.4255755540 |
|
|
Mar 05 01:42:12 PM PST 24 |
Mar 05 01:42:12 PM PST 24 |
187780111 ps |
| T678 |
/workspace/coverage/default/29.pwrmgr_stress_all.4195952125 |
|
|
Mar 05 01:40:48 PM PST 24 |
Mar 05 01:40:54 PM PST 24 |
1929872081 ps |
| T679 |
/workspace/coverage/default/19.pwrmgr_reset_invalid.3313460477 |
|
|
Mar 05 01:39:17 PM PST 24 |
Mar 05 01:39:20 PM PST 24 |
96443918 ps |
| T680 |
/workspace/coverage/default/17.pwrmgr_disable_rom_integrity_check.295325556 |
|
|
Mar 05 01:38:55 PM PST 24 |
Mar 05 01:38:58 PM PST 24 |
64795330 ps |
| T681 |
/workspace/coverage/default/12.pwrmgr_wakeup_reset.2724871951 |
|
|
Mar 05 01:38:08 PM PST 24 |
Mar 05 01:38:11 PM PST 24 |
232433053 ps |
| T682 |
/workspace/coverage/default/29.pwrmgr_smoke.2987483742 |
|
|
Mar 05 01:40:49 PM PST 24 |
Mar 05 01:40:50 PM PST 24 |
36048674 ps |
| T683 |
/workspace/coverage/default/32.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4240974104 |
|
|
Mar 05 01:41:20 PM PST 24 |
Mar 05 01:41:22 PM PST 24 |
1060930420 ps |
| T93 |
/workspace/coverage/default/47.pwrmgr_stress_all_with_rand_reset.2716660845 |
|
|
Mar 05 01:43:36 PM PST 24 |
Mar 05 01:43:46 PM PST 24 |
7052884031 ps |
| T95 |
/workspace/coverage/default/7.pwrmgr_lowpower_invalid.1508073053 |
|
|
Mar 05 01:37:28 PM PST 24 |
Mar 05 01:37:29 PM PST 24 |
45122336 ps |
| T96 |
/workspace/coverage/default/46.pwrmgr_wakeup.1831816624 |
|
|
Mar 05 01:43:25 PM PST 24 |
Mar 05 01:43:26 PM PST 24 |
261509127 ps |
| T97 |
/workspace/coverage/default/19.pwrmgr_glitch.4286937567 |
|
|
Mar 05 01:39:19 PM PST 24 |
Mar 05 01:39:22 PM PST 24 |
52188536 ps |
| T98 |
/workspace/coverage/default/3.pwrmgr_reset.69976727 |
|
|
Mar 05 01:36:32 PM PST 24 |
Mar 05 01:36:33 PM PST 24 |
48403366 ps |
| T99 |
/workspace/coverage/default/2.pwrmgr_lowpower_invalid.324407432 |
|
|
Mar 05 01:36:23 PM PST 24 |
Mar 05 01:36:25 PM PST 24 |
54617499 ps |
| T100 |
/workspace/coverage/default/11.pwrmgr_lowpower_invalid.3201907963 |
|
|
Mar 05 01:37:59 PM PST 24 |
Mar 05 01:37:59 PM PST 24 |
53773851 ps |
| T101 |
/workspace/coverage/default/30.pwrmgr_escalation_timeout.3939247704 |
|
|
Mar 05 01:40:58 PM PST 24 |
Mar 05 01:40:59 PM PST 24 |
166415162 ps |
| T102 |
/workspace/coverage/default/0.pwrmgr_reset.3188914801 |
|
|
Mar 05 01:35:42 PM PST 24 |
Mar 05 01:35:43 PM PST 24 |
127267597 ps |
| T103 |
/workspace/coverage/default/20.pwrmgr_glitch.3426010184 |
|
|
Mar 05 01:39:25 PM PST 24 |
Mar 05 01:39:28 PM PST 24 |
70356816 ps |
| T684 |
/workspace/coverage/default/49.pwrmgr_reset_invalid.3122265975 |
|
|
Mar 05 01:43:56 PM PST 24 |
Mar 05 01:43:56 PM PST 24 |
342893260 ps |
| T685 |
/workspace/coverage/default/36.pwrmgr_global_esc.3489192524 |
|
|
Mar 05 01:41:58 PM PST 24 |
Mar 05 01:41:59 PM PST 24 |
30651223 ps |
| T686 |
/workspace/coverage/default/36.pwrmgr_aborted_low_power.3971415454 |
|
|
Mar 05 01:41:55 PM PST 24 |
Mar 05 01:41:55 PM PST 24 |
44937399 ps |
| T687 |
/workspace/coverage/default/30.pwrmgr_disable_rom_integrity_check.1068885683 |
|
|
Mar 05 01:40:55 PM PST 24 |
Mar 05 01:40:56 PM PST 24 |
61695054 ps |
| T688 |
/workspace/coverage/default/22.pwrmgr_lowpower_invalid.2753232015 |
|
|
Mar 05 01:39:57 PM PST 24 |
Mar 05 01:40:03 PM PST 24 |
43291405 ps |
| T689 |
/workspace/coverage/default/6.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.154653235 |
|
|
Mar 05 01:37:13 PM PST 24 |
Mar 05 01:37:17 PM PST 24 |
935610348 ps |
| T690 |
/workspace/coverage/default/18.pwrmgr_smoke.2076725909 |
|
|
Mar 05 01:38:58 PM PST 24 |
Mar 05 01:38:59 PM PST 24 |
30824348 ps |
| T691 |
/workspace/coverage/default/39.pwrmgr_global_esc.3760858929 |
|
|
Mar 05 01:42:33 PM PST 24 |
Mar 05 01:42:34 PM PST 24 |
67443157 ps |
| T692 |
/workspace/coverage/default/42.pwrmgr_reset.464200263 |
|
|
Mar 05 01:42:45 PM PST 24 |
Mar 05 01:42:46 PM PST 24 |
56141129 ps |
| T693 |
/workspace/coverage/default/23.pwrmgr_aborted_low_power.3165775152 |
|
|
Mar 05 01:39:56 PM PST 24 |
Mar 05 01:40:02 PM PST 24 |
41597231 ps |
| T694 |
/workspace/coverage/default/19.pwrmgr_global_esc.3580165831 |
|
|
Mar 05 01:39:19 PM PST 24 |
Mar 05 01:39:22 PM PST 24 |
20572385 ps |
| T695 |
/workspace/coverage/default/44.pwrmgr_esc_clk_rst_malfunc.1167425353 |
|
|
Mar 05 01:43:12 PM PST 24 |
Mar 05 01:43:13 PM PST 24 |
32203906 ps |
| T696 |
/workspace/coverage/default/45.pwrmgr_lowpower_wakeup_race.3404768416 |
|
|
Mar 05 01:43:11 PM PST 24 |
Mar 05 01:43:12 PM PST 24 |
158388291 ps |
| T51 |
/workspace/coverage/default/42.pwrmgr_stress_all_with_rand_reset.2924540261 |
|
|
Mar 05 01:42:53 PM PST 24 |
Mar 05 01:43:12 PM PST 24 |
3908442277 ps |
| T697 |
/workspace/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.2466746409 |
|
|
Mar 05 01:43:23 PM PST 24 |
Mar 05 01:43:24 PM PST 24 |
28672269 ps |
| T698 |
/workspace/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.3608557418 |
|
|
Mar 05 01:43:34 PM PST 24 |
Mar 05 01:43:34 PM PST 24 |
65911734 ps |
| T699 |
/workspace/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3685886696 |
|
|
Mar 05 01:38:24 PM PST 24 |
Mar 05 01:38:28 PM PST 24 |
791986017 ps |
| T700 |
/workspace/coverage/default/4.pwrmgr_lowpower_invalid.3713306103 |
|
|
Mar 05 01:36:54 PM PST 24 |
Mar 05 01:36:56 PM PST 24 |
56899779 ps |
| T701 |
/workspace/coverage/default/23.pwrmgr_wakeup_reset.2005766303 |
|
|
Mar 05 01:39:56 PM PST 24 |
Mar 05 01:40:02 PM PST 24 |
313813863 ps |
| T702 |
/workspace/coverage/default/14.pwrmgr_global_esc.568835814 |
|
|
Mar 05 01:38:25 PM PST 24 |
Mar 05 01:38:26 PM PST 24 |
33637787 ps |
| T140 |
/workspace/coverage/default/26.pwrmgr_stress_all_with_rand_reset.462228357 |
|
|
Mar 05 01:40:19 PM PST 24 |
Mar 05 01:40:28 PM PST 24 |
6940158226 ps |
| T703 |
/workspace/coverage/default/3.pwrmgr_reset_invalid.4097040960 |
|
|
Mar 05 01:36:38 PM PST 24 |
Mar 05 01:36:39 PM PST 24 |
172835561 ps |
| T704 |
/workspace/coverage/default/4.pwrmgr_lowpower_wakeup_race.2138760198 |
|
|
Mar 05 01:36:51 PM PST 24 |
Mar 05 01:36:53 PM PST 24 |
289755095 ps |
| T705 |
/workspace/coverage/default/47.pwrmgr_wakeup.3420091394 |
|
|
Mar 05 01:43:32 PM PST 24 |
Mar 05 01:43:33 PM PST 24 |
275876899 ps |
| T706 |
/workspace/coverage/default/22.pwrmgr_disable_rom_integrity_check.978171013 |
|
|
Mar 05 01:39:58 PM PST 24 |
Mar 05 01:40:04 PM PST 24 |
56068755 ps |
| T707 |
/workspace/coverage/default/5.pwrmgr_glitch.2019448511 |
|
|
Mar 05 01:37:05 PM PST 24 |
Mar 05 01:37:05 PM PST 24 |
50192014 ps |
| T708 |
/workspace/coverage/default/36.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2854849250 |
|
|
Mar 05 01:41:54 PM PST 24 |
Mar 05 01:41:57 PM PST 24 |
837124807 ps |
| T709 |
/workspace/coverage/default/3.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.896174122 |
|
|
Mar 05 01:36:33 PM PST 24 |
Mar 05 01:36:36 PM PST 24 |
1275167117 ps |
| T710 |
/workspace/coverage/default/5.pwrmgr_wakeup.2255709983 |
|
|
Mar 05 01:36:53 PM PST 24 |
Mar 05 01:36:54 PM PST 24 |
124082755 ps |
| T711 |
/workspace/coverage/default/30.pwrmgr_aborted_low_power.1769987155 |
|
|
Mar 05 01:40:56 PM PST 24 |
Mar 05 01:40:57 PM PST 24 |
38828579 ps |
| T712 |
/workspace/coverage/default/39.pwrmgr_reset_invalid.4261067540 |
|
|
Mar 05 01:42:30 PM PST 24 |
Mar 05 01:42:32 PM PST 24 |
107109553 ps |
| T713 |
/workspace/coverage/default/10.pwrmgr_sec_cm_rstmgr_intersig_mubi.3715415883 |
|
|
Mar 05 01:37:50 PM PST 24 |
Mar 05 01:37:52 PM PST 24 |
287191257 ps |
| T714 |
/workspace/coverage/default/23.pwrmgr_lowpower_wakeup_race.1516248240 |
|
|
Mar 05 01:39:56 PM PST 24 |
Mar 05 01:40:03 PM PST 24 |
163108339 ps |
| T715 |
/workspace/coverage/default/6.pwrmgr_reset.766233557 |
|
|
Mar 05 01:37:01 PM PST 24 |
Mar 05 01:37:02 PM PST 24 |
57029981 ps |
| T716 |
/workspace/coverage/default/2.pwrmgr_sec_cm_rstmgr_intersig_mubi.2515171340 |
|
|
Mar 05 01:36:22 PM PST 24 |
Mar 05 01:36:23 PM PST 24 |
172191624 ps |
| T717 |
/workspace/coverage/default/33.pwrmgr_reset.3312333668 |
|
|
Mar 05 01:41:29 PM PST 24 |
Mar 05 01:41:30 PM PST 24 |
134703122 ps |
| T718 |
/workspace/coverage/default/18.pwrmgr_escalation_timeout.3393869107 |
|
|
Mar 05 01:39:01 PM PST 24 |
Mar 05 01:39:02 PM PST 24 |
316120010 ps |
| T719 |
/workspace/coverage/default/0.pwrmgr_lowpower_invalid.2661699437 |
|
|
Mar 05 01:35:49 PM PST 24 |
Mar 05 01:35:50 PM PST 24 |
57771914 ps |
| T720 |
/workspace/coverage/default/8.pwrmgr_stress_all_with_rand_reset.1690422135 |
|
|
Mar 05 01:37:41 PM PST 24 |
Mar 05 01:37:56 PM PST 24 |
9709497040 ps |
| T721 |
/workspace/coverage/default/11.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1205004896 |
|
|
Mar 05 01:38:00 PM PST 24 |
Mar 05 01:38:04 PM PST 24 |
891011072 ps |
| T722 |
/workspace/coverage/default/37.pwrmgr_global_esc.11275319 |
|
|
Mar 05 01:42:08 PM PST 24 |
Mar 05 01:42:09 PM PST 24 |
41299736 ps |
| T723 |
/workspace/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.294570928 |
|
|
Mar 05 01:36:43 PM PST 24 |
Mar 05 01:36:46 PM PST 24 |
1055631394 ps |
| T724 |
/workspace/coverage/default/2.pwrmgr_wakeup_reset.1165898780 |
|
|
Mar 05 01:36:21 PM PST 24 |
Mar 05 01:36:22 PM PST 24 |
222472975 ps |
| T725 |
/workspace/coverage/default/32.pwrmgr_lowpower_wakeup_race.377676961 |
|
|
Mar 05 01:41:13 PM PST 24 |
Mar 05 01:41:15 PM PST 24 |
408858745 ps |
| T726 |
/workspace/coverage/default/9.pwrmgr_stress_all.270523705 |
|
|
Mar 05 01:37:50 PM PST 24 |
Mar 05 01:37:55 PM PST 24 |
1252114219 ps |
| T727 |
/workspace/coverage/default/40.pwrmgr_stress_all_with_rand_reset.2504176826 |
|
|
Mar 05 01:42:42 PM PST 24 |
Mar 05 01:43:17 PM PST 24 |
10219927331 ps |
| T728 |
/workspace/coverage/default/18.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.748215655 |
|
|
Mar 05 01:38:56 PM PST 24 |
Mar 05 01:39:00 PM PST 24 |
828977540 ps |
| T729 |
/workspace/coverage/default/31.pwrmgr_lowpower_invalid.2960528880 |
|
|
Mar 05 01:41:09 PM PST 24 |
Mar 05 01:41:11 PM PST 24 |
49769807 ps |
| T730 |
/workspace/coverage/default/8.pwrmgr_sec_cm_ctrl_config_regwen.2395109520 |
|
|
Mar 05 01:37:29 PM PST 24 |
Mar 05 01:37:30 PM PST 24 |
89880626 ps |
| T731 |
/workspace/coverage/default/24.pwrmgr_aborted_low_power.2177115493 |
|
|
Mar 05 01:39:58 PM PST 24 |
Mar 05 01:40:05 PM PST 24 |
58009006 ps |
| T732 |
/workspace/coverage/default/24.pwrmgr_lowpower_wakeup_race.280302553 |
|
|
Mar 05 01:39:59 PM PST 24 |
Mar 05 01:40:04 PM PST 24 |
54217671 ps |
| T733 |
/workspace/coverage/default/10.pwrmgr_aborted_low_power.2401963050 |
|
|
Mar 05 01:37:47 PM PST 24 |
Mar 05 01:37:48 PM PST 24 |
52234713 ps |
| T734 |
/workspace/coverage/default/17.pwrmgr_lowpower_invalid.1697855409 |
|
|
Mar 05 01:38:54 PM PST 24 |
Mar 05 01:38:57 PM PST 24 |
46141458 ps |
| T735 |
/workspace/coverage/default/47.pwrmgr_glitch.1543733394 |
|
|
Mar 05 01:43:35 PM PST 24 |
Mar 05 01:43:35 PM PST 24 |
65206737 ps |
| T736 |
/workspace/coverage/default/2.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1937027122 |
|
|
Mar 05 01:36:24 PM PST 24 |
Mar 05 01:36:28 PM PST 24 |
992108059 ps |
| T737 |
/workspace/coverage/default/24.pwrmgr_stress_all.4118093534 |
|
|
Mar 05 01:40:04 PM PST 24 |
Mar 05 01:40:07 PM PST 24 |
55452894 ps |
| T738 |
/workspace/coverage/default/0.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1472367319 |
|
|
Mar 05 01:35:42 PM PST 24 |
Mar 05 01:35:44 PM PST 24 |
2008176150 ps |
| T739 |
/workspace/coverage/default/5.pwrmgr_esc_clk_rst_malfunc.3575904378 |
|
|
Mar 05 01:37:03 PM PST 24 |
Mar 05 01:37:04 PM PST 24 |
104435246 ps |
| T740 |
/workspace/coverage/default/28.pwrmgr_glitch.1090052877 |
|
|
Mar 05 01:40:41 PM PST 24 |
Mar 05 01:40:42 PM PST 24 |
97290904 ps |
| T741 |
/workspace/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3223047994 |
|
|
Mar 05 01:42:41 PM PST 24 |
Mar 05 01:42:45 PM PST 24 |
844110576 ps |
| T742 |
/workspace/coverage/default/2.pwrmgr_glitch.1015297472 |
|
|
Mar 05 01:36:24 PM PST 24 |
Mar 05 01:36:26 PM PST 24 |
48961138 ps |
| T743 |
/workspace/coverage/default/3.pwrmgr_escalation_timeout.2365707733 |
|
|
Mar 05 01:36:37 PM PST 24 |
Mar 05 01:36:38 PM PST 24 |
1517599378 ps |
| T744 |
/workspace/coverage/default/35.pwrmgr_lowpower_invalid.2770092601 |
|
|
Mar 05 01:41:54 PM PST 24 |
Mar 05 01:41:55 PM PST 24 |
58342438 ps |
| T745 |
/workspace/coverage/default/28.pwrmgr_reset_invalid.2133813620 |
|
|
Mar 05 01:40:51 PM PST 24 |
Mar 05 01:40:52 PM PST 24 |
161473925 ps |
| T746 |
/workspace/coverage/default/32.pwrmgr_esc_clk_rst_malfunc.3370660293 |
|
|
Mar 05 01:41:19 PM PST 24 |
Mar 05 01:41:20 PM PST 24 |
29031974 ps |
| T747 |
/workspace/coverage/default/8.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1284373431 |
|
|
Mar 05 01:37:23 PM PST 24 |
Mar 05 01:37:26 PM PST 24 |
1171786514 ps |
| T748 |
/workspace/coverage/default/20.pwrmgr_reset_invalid.3316510816 |
|
|
Mar 05 01:39:25 PM PST 24 |
Mar 05 01:39:28 PM PST 24 |
202447639 ps |
| T749 |
/workspace/coverage/default/48.pwrmgr_escalation_timeout.1571349812 |
|
|
Mar 05 01:43:39 PM PST 24 |
Mar 05 01:43:40 PM PST 24 |
169156532 ps |
| T750 |
/workspace/coverage/default/25.pwrmgr_stress_all.410274993 |
|
|
Mar 05 01:40:11 PM PST 24 |
Mar 05 01:40:13 PM PST 24 |
743909506 ps |
| T751 |
/workspace/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.2345982111 |
|
|
Mar 05 01:42:44 PM PST 24 |
Mar 05 01:42:46 PM PST 24 |
213050202 ps |
| T752 |
/workspace/coverage/default/16.pwrmgr_sec_cm_rstmgr_intersig_mubi.649605666 |
|
|
Mar 05 01:38:44 PM PST 24 |
Mar 05 01:38:46 PM PST 24 |
96836357 ps |
| T753 |
/workspace/coverage/default/23.pwrmgr_global_esc.3305276079 |
|
|
Mar 05 01:39:59 PM PST 24 |
Mar 05 01:40:05 PM PST 24 |
59651721 ps |
| T55 |
/workspace/coverage/default/46.pwrmgr_stress_all_with_rand_reset.364380024 |
|
|
Mar 05 01:43:29 PM PST 24 |
Mar 05 01:43:53 PM PST 24 |
16445056697 ps |
| T754 |
/workspace/coverage/default/36.pwrmgr_wakeup.1011009588 |
|
|
Mar 05 01:41:56 PM PST 24 |
Mar 05 01:41:57 PM PST 24 |
81625029 ps |
| T755 |
/workspace/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2913791595 |
|
|
Mar 05 01:43:38 PM PST 24 |
Mar 05 01:43:42 PM PST 24 |
813536331 ps |
| T756 |
/workspace/coverage/default/26.pwrmgr_sec_cm_ctrl_config_regwen.3061178134 |
|
|
Mar 05 01:40:20 PM PST 24 |
Mar 05 01:40:21 PM PST 24 |
252012456 ps |
| T757 |
/workspace/coverage/default/20.pwrmgr_wakeup_reset.1029027397 |
|
|
Mar 05 01:39:16 PM PST 24 |
Mar 05 01:39:19 PM PST 24 |
102104107 ps |
| T758 |
/workspace/coverage/default/10.pwrmgr_sec_cm_ctrl_config_regwen.2485299753 |
|
|
Mar 05 01:37:42 PM PST 24 |
Mar 05 01:37:44 PM PST 24 |
401911131 ps |
| T759 |
/workspace/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.3464655736 |
|
|
Mar 05 01:42:21 PM PST 24 |
Mar 05 01:42:22 PM PST 24 |
125849145 ps |
| T760 |
/workspace/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.1455580761 |
|
|
Mar 05 01:41:56 PM PST 24 |
Mar 05 01:41:57 PM PST 24 |
135566776 ps |
| T761 |
/workspace/coverage/default/31.pwrmgr_global_esc.1585692003 |
|
|
Mar 05 01:41:02 PM PST 24 |
Mar 05 01:41:03 PM PST 24 |
74321348 ps |
| T762 |
/workspace/coverage/default/42.pwrmgr_sec_cm_rstmgr_intersig_mubi.2025550063 |
|
|
Mar 05 01:42:51 PM PST 24 |
Mar 05 01:42:52 PM PST 24 |
70336853 ps |
| T763 |
/workspace/coverage/default/23.pwrmgr_esc_clk_rst_malfunc.3798290561 |
|
|
Mar 05 01:39:56 PM PST 24 |
Mar 05 01:40:02 PM PST 24 |
32929148 ps |
| T764 |
/workspace/coverage/default/12.pwrmgr_sec_cm_rstmgr_intersig_mubi.1973867322 |
|
|
Mar 05 01:38:05 PM PST 24 |
Mar 05 01:38:07 PM PST 24 |
98801085 ps |
| T765 |
/workspace/coverage/default/32.pwrmgr_glitch.1849339051 |
|
|
Mar 05 01:41:21 PM PST 24 |
Mar 05 01:41:21 PM PST 24 |
73307347 ps |
| T766 |
/workspace/coverage/default/48.pwrmgr_global_esc.3049987344 |
|
|
Mar 05 01:43:46 PM PST 24 |
Mar 05 01:43:47 PM PST 24 |
54990977 ps |
| T767 |
/workspace/coverage/default/26.pwrmgr_smoke.3531685445 |
|
|
Mar 05 01:40:11 PM PST 24 |
Mar 05 01:40:12 PM PST 24 |
40283253 ps |
| T768 |
/workspace/coverage/default/11.pwrmgr_wakeup.1467172464 |
|
|
Mar 05 01:37:51 PM PST 24 |
Mar 05 01:37:52 PM PST 24 |
186975387 ps |
| T769 |
/workspace/coverage/default/37.pwrmgr_smoke.455374628 |
|
|
Mar 05 01:42:00 PM PST 24 |
Mar 05 01:42:01 PM PST 24 |
32794149 ps |
| T770 |
/workspace/coverage/default/3.pwrmgr_glitch.1817748999 |
|
|
Mar 05 01:36:40 PM PST 24 |
Mar 05 01:36:41 PM PST 24 |
41176242 ps |
| T771 |
/workspace/coverage/default/5.pwrmgr_lowpower_wakeup_race.830736096 |
|
|
Mar 05 01:36:56 PM PST 24 |
Mar 05 01:36:57 PM PST 24 |
285821354 ps |
| T772 |
/workspace/coverage/default/7.pwrmgr_reset_invalid.780704614 |
|
|
Mar 05 01:37:24 PM PST 24 |
Mar 05 01:37:25 PM PST 24 |
218859639 ps |
| T773 |
/workspace/coverage/default/48.pwrmgr_reset.2478503744 |
|
|
Mar 05 01:43:36 PM PST 24 |
Mar 05 01:43:37 PM PST 24 |
94940720 ps |
| T774 |
/workspace/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.1207437922 |
|
|
Mar 05 01:42:52 PM PST 24 |
Mar 05 01:42:53 PM PST 24 |
28468492 ps |
| T775 |
/workspace/coverage/default/10.pwrmgr_esc_clk_rst_malfunc.3603630591 |
|
|
Mar 05 01:37:50 PM PST 24 |
Mar 05 01:37:51 PM PST 24 |
33018165 ps |
| T776 |
/workspace/coverage/default/19.pwrmgr_lowpower_invalid.3708091323 |
|
|
Mar 05 01:39:17 PM PST 24 |
Mar 05 01:39:21 PM PST 24 |
106608208 ps |
| T777 |
/workspace/coverage/default/44.pwrmgr_glitch.2829851384 |
|
|
Mar 05 01:43:09 PM PST 24 |
Mar 05 01:43:09 PM PST 24 |
53422838 ps |
| T778 |
/workspace/coverage/default/24.pwrmgr_wakeup.3235583214 |
|
|
Mar 05 01:39:59 PM PST 24 |
Mar 05 01:40:04 PM PST 24 |
106996162 ps |
| T779 |
/workspace/coverage/default/6.pwrmgr_sec_cm_ctrl_config_regwen.4267552128 |
|
|
Mar 05 01:37:11 PM PST 24 |
Mar 05 01:37:12 PM PST 24 |
107127180 ps |
| T780 |
/workspace/coverage/default/49.pwrmgr_escalation_timeout.1976928782 |
|
|
Mar 05 01:43:58 PM PST 24 |
Mar 05 01:43:59 PM PST 24 |
199469048 ps |
| T781 |
/workspace/coverage/default/28.pwrmgr_wakeup_reset.3042018561 |
|
|
Mar 05 01:40:41 PM PST 24 |
Mar 05 01:40:42 PM PST 24 |
181747453 ps |
| T782 |
/workspace/coverage/default/11.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.710534246 |
|
|
Mar 05 01:37:57 PM PST 24 |
Mar 05 01:38:00 PM PST 24 |
1311899605 ps |
| T783 |
/workspace/coverage/default/28.pwrmgr_reset.2609216893 |
|
|
Mar 05 01:40:42 PM PST 24 |
Mar 05 01:40:43 PM PST 24 |
110803468 ps |
| T784 |
/workspace/coverage/default/17.pwrmgr_wakeup_reset.2315506851 |
|
|
Mar 05 01:38:48 PM PST 24 |
Mar 05 01:38:49 PM PST 24 |
36501178 ps |
| T785 |
/workspace/coverage/default/2.pwrmgr_stress_all_with_rand_reset.1374323232 |
|
|
Mar 05 01:36:30 PM PST 24 |
Mar 05 01:36:42 PM PST 24 |
2846592529 ps |
| T786 |
/workspace/coverage/default/16.pwrmgr_wakeup_reset.511641435 |
|
|
Mar 05 01:38:45 PM PST 24 |
Mar 05 01:38:46 PM PST 24 |
592680619 ps |
| T787 |
/workspace/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1311189175 |
|
|
Mar 05 01:40:19 PM PST 24 |
Mar 05 01:40:24 PM PST 24 |
764023117 ps |
| T788 |
/workspace/coverage/default/24.pwrmgr_reset_invalid.1339689263 |
|
|
Mar 05 01:40:06 PM PST 24 |
Mar 05 01:40:08 PM PST 24 |
160586042 ps |
| T789 |
/workspace/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.2948811415 |
|
|
Mar 05 01:39:32 PM PST 24 |
Mar 05 01:39:34 PM PST 24 |
37545657 ps |
| T790 |
/workspace/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4226695544 |
|
|
Mar 05 01:41:41 PM PST 24 |
Mar 05 01:41:46 PM PST 24 |
845804915 ps |
| T791 |
/workspace/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.4145872859 |
|
|
Mar 05 01:39:31 PM PST 24 |
Mar 05 01:39:32 PM PST 24 |
89897387 ps |
| T792 |
/workspace/coverage/default/25.pwrmgr_reset_invalid.247640486 |
|
|
Mar 05 01:40:09 PM PST 24 |
Mar 05 01:40:11 PM PST 24 |
91184002 ps |
| T793 |
/workspace/coverage/default/3.pwrmgr_sec_cm_ctrl_config_regwen.2050882486 |
|
|
Mar 05 01:36:38 PM PST 24 |
Mar 05 01:36:39 PM PST 24 |
73022174 ps |
| T794 |
/workspace/coverage/default/48.pwrmgr_disable_rom_integrity_check.2761815393 |
|
|
Mar 05 01:43:36 PM PST 24 |
Mar 05 01:43:37 PM PST 24 |
68522350 ps |
| T25 |
/workspace/coverage/default/4.pwrmgr_sec_cm.391489991 |
|
|
Mar 05 01:36:53 PM PST 24 |
Mar 05 01:36:54 PM PST 24 |
356261827 ps |
| T795 |
/workspace/coverage/default/32.pwrmgr_global_esc.1517027080 |
|
|
Mar 05 01:41:20 PM PST 24 |
Mar 05 01:41:21 PM PST 24 |
56472040 ps |
| T796 |
/workspace/coverage/default/9.pwrmgr_global_esc.317996330 |
|
|
Mar 05 01:37:38 PM PST 24 |
Mar 05 01:37:39 PM PST 24 |
97151431 ps |
| T797 |
/workspace/coverage/default/31.pwrmgr_reset.454783562 |
|
|
Mar 05 01:41:02 PM PST 24 |
Mar 05 01:41:03 PM PST 24 |
53007216 ps |
| T798 |
/workspace/coverage/default/46.pwrmgr_reset_invalid.333723006 |
|
|
Mar 05 01:43:35 PM PST 24 |
Mar 05 01:43:36 PM PST 24 |
183403173 ps |
| T799 |
/workspace/coverage/default/33.pwrmgr_stress_all_with_rand_reset.4146946892 |
|
|
Mar 05 01:41:35 PM PST 24 |
Mar 05 01:42:06 PM PST 24 |
12568919573 ps |
| T800 |
/workspace/coverage/default/26.pwrmgr_aborted_low_power.1599601737 |
|
|
Mar 05 01:40:17 PM PST 24 |
Mar 05 01:40:18 PM PST 24 |
32490003 ps |
| T801 |
/workspace/coverage/default/36.pwrmgr_lowpower_invalid.3157021083 |
|
|
Mar 05 01:41:59 PM PST 24 |
Mar 05 01:42:00 PM PST 24 |
98999266 ps |
| T802 |
/workspace/coverage/default/31.pwrmgr_disable_rom_integrity_check.1392345460 |
|
|
Mar 05 01:41:10 PM PST 24 |
Mar 05 01:41:11 PM PST 24 |
68461215 ps |
| T803 |
/workspace/coverage/default/30.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1313300070 |
|
|
Mar 05 01:41:01 PM PST 24 |
Mar 05 01:41:04 PM PST 24 |
988047305 ps |
| T804 |
/workspace/coverage/default/40.pwrmgr_global_esc.1146951446 |
|
|
Mar 05 01:42:38 PM PST 24 |
Mar 05 01:42:39 PM PST 24 |
28254366 ps |
| T805 |
/workspace/coverage/default/32.pwrmgr_disable_rom_integrity_check.2526962591 |
|
|
Mar 05 01:41:20 PM PST 24 |
Mar 05 01:41:21 PM PST 24 |
65422827 ps |
| T806 |
/workspace/coverage/default/23.pwrmgr_reset_invalid.3760310983 |
|
|
Mar 05 01:39:55 PM PST 24 |
Mar 05 01:39:59 PM PST 24 |
166164273 ps |
| T807 |
/workspace/coverage/default/28.pwrmgr_escalation_timeout.4161535870 |
|
|
Mar 05 01:40:39 PM PST 24 |
Mar 05 01:40:40 PM PST 24 |
169528275 ps |
| T808 |
/workspace/coverage/default/14.pwrmgr_escalation_timeout.2156958662 |
|
|
Mar 05 01:38:25 PM PST 24 |
Mar 05 01:38:26 PM PST 24 |
161248070 ps |
| T809 |
/workspace/coverage/default/9.pwrmgr_glitch.2951677109 |
|
|
Mar 05 01:37:37 PM PST 24 |
Mar 05 01:37:38 PM PST 24 |
36457997 ps |
| T810 |
/workspace/coverage/default/31.pwrmgr_reset_invalid.2434199780 |
|
|
Mar 05 01:41:11 PM PST 24 |
Mar 05 01:41:13 PM PST 24 |
163774425 ps |