| T816 |
/workspace/coverage/default/10.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2688023504 |
|
|
Mar 07 01:33:19 PM PST 24 |
Mar 07 01:33:22 PM PST 24 |
1278300192 ps |
| T817 |
/workspace/coverage/default/45.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.944998348 |
|
|
Mar 07 01:35:17 PM PST 24 |
Mar 07 01:35:22 PM PST 24 |
834858751 ps |
| T28 |
/workspace/coverage/default/1.pwrmgr_sec_cm.3854560208 |
|
|
Mar 07 01:32:35 PM PST 24 |
Mar 07 01:32:37 PM PST 24 |
716137083 ps |
| T818 |
/workspace/coverage/default/45.pwrmgr_wakeup_reset.2897987561 |
|
|
Mar 07 01:35:20 PM PST 24 |
Mar 07 01:35:23 PM PST 24 |
401533477 ps |
| T819 |
/workspace/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.3059131483 |
|
|
Mar 07 01:34:54 PM PST 24 |
Mar 07 01:34:57 PM PST 24 |
276049044 ps |
| T820 |
/workspace/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1892170454 |
|
|
Mar 07 01:35:17 PM PST 24 |
Mar 07 01:35:22 PM PST 24 |
849837494 ps |
| T821 |
/workspace/coverage/default/28.pwrmgr_global_esc.4131265734 |
|
|
Mar 07 01:34:25 PM PST 24 |
Mar 07 01:34:25 PM PST 24 |
35207144 ps |
| T822 |
/workspace/coverage/default/7.pwrmgr_lowpower_invalid.1887994186 |
|
|
Mar 07 01:33:10 PM PST 24 |
Mar 07 01:33:12 PM PST 24 |
54717008 ps |
| T823 |
/workspace/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.1236160864 |
|
|
Mar 07 01:34:31 PM PST 24 |
Mar 07 01:34:32 PM PST 24 |
146311900 ps |
| T824 |
/workspace/coverage/default/41.pwrmgr_reset.2205187220 |
|
|
Mar 07 01:35:05 PM PST 24 |
Mar 07 01:35:06 PM PST 24 |
49077926 ps |
| T825 |
/workspace/coverage/default/36.pwrmgr_reset_invalid.1332722246 |
|
|
Mar 07 01:34:47 PM PST 24 |
Mar 07 01:34:48 PM PST 24 |
298045065 ps |
| T826 |
/workspace/coverage/default/34.pwrmgr_smoke.307352547 |
|
|
Mar 07 01:34:42 PM PST 24 |
Mar 07 01:34:42 PM PST 24 |
53730319 ps |
| T123 |
/workspace/coverage/default/17.pwrmgr_stress_all_with_rand_reset.1281440160 |
|
|
Mar 07 01:33:46 PM PST 24 |
Mar 07 01:34:01 PM PST 24 |
4116410018 ps |
| T827 |
/workspace/coverage/default/28.pwrmgr_stress_all.2692358190 |
|
|
Mar 07 01:34:25 PM PST 24 |
Mar 07 01:34:29 PM PST 24 |
1263716828 ps |
| T828 |
/workspace/coverage/default/18.pwrmgr_wakeup_reset.2962568370 |
|
|
Mar 07 01:33:42 PM PST 24 |
Mar 07 01:33:44 PM PST 24 |
245569073 ps |
| T829 |
/workspace/coverage/default/23.pwrmgr_smoke.1945050301 |
|
|
Mar 07 01:34:12 PM PST 24 |
Mar 07 01:34:12 PM PST 24 |
58310054 ps |
| T830 |
/workspace/coverage/default/43.pwrmgr_sec_cm_rstmgr_intersig_mubi.4175361675 |
|
|
Mar 07 01:35:15 PM PST 24 |
Mar 07 01:35:16 PM PST 24 |
86689102 ps |
| T831 |
/workspace/coverage/default/29.pwrmgr_wakeup.1734442005 |
|
|
Mar 07 01:34:27 PM PST 24 |
Mar 07 01:34:28 PM PST 24 |
434844462 ps |
| T832 |
/workspace/coverage/default/21.pwrmgr_sec_cm_ctrl_config_regwen.106718150 |
|
|
Mar 07 01:33:57 PM PST 24 |
Mar 07 01:33:58 PM PST 24 |
382030201 ps |
| T833 |
/workspace/coverage/default/45.pwrmgr_reset.4013020027 |
|
|
Mar 07 01:35:18 PM PST 24 |
Mar 07 01:35:23 PM PST 24 |
75570031 ps |
| T834 |
/workspace/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.4093944739 |
|
|
Mar 07 01:35:06 PM PST 24 |
Mar 07 01:35:07 PM PST 24 |
55998216 ps |
| T835 |
/workspace/coverage/default/43.pwrmgr_global_esc.108874486 |
|
|
Mar 07 01:35:15 PM PST 24 |
Mar 07 01:35:16 PM PST 24 |
106487487 ps |
| T836 |
/workspace/coverage/default/24.pwrmgr_lowpower_invalid.3466565710 |
|
|
Mar 07 01:34:14 PM PST 24 |
Mar 07 01:34:14 PM PST 24 |
51413697 ps |
| T85 |
/workspace/coverage/default/21.pwrmgr_stress_all_with_rand_reset.3320405223 |
|
|
Mar 07 01:34:01 PM PST 24 |
Mar 07 01:34:25 PM PST 24 |
4812816646 ps |
| T837 |
/workspace/coverage/default/26.pwrmgr_glitch.1783679380 |
|
|
Mar 07 01:34:20 PM PST 24 |
Mar 07 01:34:20 PM PST 24 |
51092507 ps |
| T838 |
/workspace/coverage/default/30.pwrmgr_stress_all.1802428634 |
|
|
Mar 07 01:34:27 PM PST 24 |
Mar 07 01:34:29 PM PST 24 |
84379818 ps |
| T839 |
/workspace/coverage/default/3.pwrmgr_wakeup.802416298 |
|
|
Mar 07 01:32:38 PM PST 24 |
Mar 07 01:32:39 PM PST 24 |
203118201 ps |
| T840 |
/workspace/coverage/default/29.pwrmgr_lowpower_wakeup_race.3240816905 |
|
|
Mar 07 01:34:23 PM PST 24 |
Mar 07 01:34:24 PM PST 24 |
64938490 ps |
| T841 |
/workspace/coverage/default/4.pwrmgr_sec_cm_ctrl_config_regwen.3651718243 |
|
|
Mar 07 01:32:47 PM PST 24 |
Mar 07 01:32:48 PM PST 24 |
251230564 ps |
| T29 |
/workspace/coverage/default/3.pwrmgr_sec_cm.2547004464 |
|
|
Mar 07 01:32:46 PM PST 24 |
Mar 07 01:32:48 PM PST 24 |
763766173 ps |
| T842 |
/workspace/coverage/default/23.pwrmgr_stress_all_with_rand_reset.1896501019 |
|
|
Mar 07 01:34:12 PM PST 24 |
Mar 07 01:34:45 PM PST 24 |
12174385369 ps |
| T843 |
/workspace/coverage/default/7.pwrmgr_esc_clk_rst_malfunc.1759596562 |
|
|
Mar 07 01:33:12 PM PST 24 |
Mar 07 01:33:12 PM PST 24 |
44321631 ps |
| T844 |
/workspace/coverage/default/5.pwrmgr_smoke.4181662509 |
|
|
Mar 07 01:32:48 PM PST 24 |
Mar 07 01:32:49 PM PST 24 |
34594876 ps |
| T845 |
/workspace/coverage/default/23.pwrmgr_lowpower_wakeup_race.2498138310 |
|
|
Mar 07 01:34:09 PM PST 24 |
Mar 07 01:34:10 PM PST 24 |
70264888 ps |
| T846 |
/workspace/coverage/default/4.pwrmgr_esc_clk_rst_malfunc.1897143717 |
|
|
Mar 07 01:32:44 PM PST 24 |
Mar 07 01:32:44 PM PST 24 |
70924659 ps |
| T847 |
/workspace/coverage/default/3.pwrmgr_escalation_timeout.1760479033 |
|
|
Mar 07 01:32:45 PM PST 24 |
Mar 07 01:32:46 PM PST 24 |
305938590 ps |
| T848 |
/workspace/coverage/default/42.pwrmgr_escalation_timeout.3839604449 |
|
|
Mar 07 01:35:07 PM PST 24 |
Mar 07 01:35:08 PM PST 24 |
716778523 ps |
| T849 |
/workspace/coverage/default/9.pwrmgr_smoke.4041770116 |
|
|
Mar 07 01:33:11 PM PST 24 |
Mar 07 01:33:12 PM PST 24 |
32071193 ps |
| T850 |
/workspace/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.813005705 |
|
|
Mar 07 01:33:35 PM PST 24 |
Mar 07 01:33:36 PM PST 24 |
103354983 ps |
| T851 |
/workspace/coverage/default/7.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.566454884 |
|
|
Mar 07 01:33:09 PM PST 24 |
Mar 07 01:33:12 PM PST 24 |
963846110 ps |
| T852 |
/workspace/coverage/default/12.pwrmgr_sec_cm_rstmgr_intersig_mubi.3277656466 |
|
|
Mar 07 01:33:25 PM PST 24 |
Mar 07 01:33:27 PM PST 24 |
159230176 ps |
| T853 |
/workspace/coverage/default/33.pwrmgr_escalation_timeout.3096375963 |
|
|
Mar 07 01:34:36 PM PST 24 |
Mar 07 01:34:40 PM PST 24 |
169852487 ps |
| T854 |
/workspace/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.793136278 |
|
|
Mar 07 01:35:17 PM PST 24 |
Mar 07 01:35:19 PM PST 24 |
208573962 ps |
| T855 |
/workspace/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3223912026 |
|
|
Mar 07 01:33:50 PM PST 24 |
Mar 07 01:33:52 PM PST 24 |
2246001406 ps |
| T856 |
/workspace/coverage/default/28.pwrmgr_escalation_timeout.475944415 |
|
|
Mar 07 01:34:28 PM PST 24 |
Mar 07 01:34:30 PM PST 24 |
721680996 ps |
| T857 |
/workspace/coverage/default/0.pwrmgr_smoke.3499331905 |
|
|
Mar 07 01:32:32 PM PST 24 |
Mar 07 01:32:33 PM PST 24 |
58486966 ps |
| T858 |
/workspace/coverage/default/32.pwrmgr_aborted_low_power.3498703397 |
|
|
Mar 07 01:34:35 PM PST 24 |
Mar 07 01:34:39 PM PST 24 |
74199463 ps |
| T859 |
/workspace/coverage/default/4.pwrmgr_stress_all_with_rand_reset.3361660861 |
|
|
Mar 07 01:32:48 PM PST 24 |
Mar 07 01:33:03 PM PST 24 |
5004363975 ps |
| T860 |
/workspace/coverage/default/48.pwrmgr_esc_clk_rst_malfunc.3709756899 |
|
|
Mar 07 01:35:40 PM PST 24 |
Mar 07 01:35:42 PM PST 24 |
32457106 ps |
| T861 |
/workspace/coverage/default/15.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2303267632 |
|
|
Mar 07 01:33:34 PM PST 24 |
Mar 07 01:33:36 PM PST 24 |
982248039 ps |
| T862 |
/workspace/coverage/default/16.pwrmgr_glitch.53575121 |
|
|
Mar 07 01:33:39 PM PST 24 |
Mar 07 01:33:41 PM PST 24 |
34476419 ps |
| T863 |
/workspace/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.1874405781 |
|
|
Mar 07 01:33:44 PM PST 24 |
Mar 07 01:33:46 PM PST 24 |
39906567 ps |
| T864 |
/workspace/coverage/default/32.pwrmgr_wakeup_reset.3181498191 |
|
|
Mar 07 01:34:36 PM PST 24 |
Mar 07 01:34:40 PM PST 24 |
529103855 ps |
| T865 |
/workspace/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.2091818201 |
|
|
Mar 07 01:34:52 PM PST 24 |
Mar 07 01:34:56 PM PST 24 |
88075277 ps |
| T83 |
/workspace/coverage/default/8.pwrmgr_stress_all_with_rand_reset.2431103231 |
|
|
Mar 07 01:33:11 PM PST 24 |
Mar 07 01:33:18 PM PST 24 |
2577338733 ps |
| T866 |
/workspace/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1788271042 |
|
|
Mar 07 01:34:36 PM PST 24 |
Mar 07 01:34:41 PM PST 24 |
1214579108 ps |
| T867 |
/workspace/coverage/default/26.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.952383310 |
|
|
Mar 07 01:34:25 PM PST 24 |
Mar 07 01:34:31 PM PST 24 |
864751484 ps |
| T868 |
/workspace/coverage/default/39.pwrmgr_reset_invalid.4032954628 |
|
|
Mar 07 01:34:54 PM PST 24 |
Mar 07 01:34:56 PM PST 24 |
111890189 ps |
| T869 |
/workspace/coverage/default/6.pwrmgr_stress_all.2587158474 |
|
|
Mar 07 01:32:54 PM PST 24 |
Mar 07 01:32:57 PM PST 24 |
1743712488 ps |
| T75 |
/workspace/coverage/default/2.pwrmgr_stress_all_with_rand_reset.2919255499 |
|
|
Mar 07 01:32:36 PM PST 24 |
Mar 07 01:33:01 PM PST 24 |
5264496434 ps |
| T870 |
/workspace/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.282971606 |
|
|
Mar 07 01:35:06 PM PST 24 |
Mar 07 01:35:07 PM PST 24 |
30229132 ps |
| T871 |
/workspace/coverage/default/24.pwrmgr_wakeup_reset.1573921920 |
|
|
Mar 07 01:34:10 PM PST 24 |
Mar 07 01:34:11 PM PST 24 |
102916333 ps |
| T872 |
/workspace/coverage/default/5.pwrmgr_stress_all.4000976106 |
|
|
Mar 07 01:32:57 PM PST 24 |
Mar 07 01:32:57 PM PST 24 |
541586869 ps |
| T873 |
/workspace/coverage/default/15.pwrmgr_wakeup.1508094214 |
|
|
Mar 07 01:33:31 PM PST 24 |
Mar 07 01:33:32 PM PST 24 |
53366217 ps |
| T874 |
/workspace/coverage/default/31.pwrmgr_smoke.1467914676 |
|
|
Mar 07 01:34:25 PM PST 24 |
Mar 07 01:34:26 PM PST 24 |
39505963 ps |
| T875 |
/workspace/coverage/default/4.pwrmgr_lowpower_invalid.375839312 |
|
|
Mar 07 01:32:46 PM PST 24 |
Mar 07 01:32:47 PM PST 24 |
41420725 ps |
| T876 |
/workspace/coverage/default/34.pwrmgr_reset.174057004 |
|
|
Mar 07 01:34:41 PM PST 24 |
Mar 07 01:34:42 PM PST 24 |
71788477 ps |
| T877 |
/workspace/coverage/default/12.pwrmgr_smoke.1282909471 |
|
|
Mar 07 01:33:24 PM PST 24 |
Mar 07 01:33:24 PM PST 24 |
52525288 ps |
| T878 |
/workspace/coverage/default/8.pwrmgr_wakeup.2766435816 |
|
|
Mar 07 01:33:11 PM PST 24 |
Mar 07 01:33:12 PM PST 24 |
121277676 ps |
| T879 |
/workspace/coverage/default/41.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1263268419 |
|
|
Mar 07 01:35:05 PM PST 24 |
Mar 07 01:35:08 PM PST 24 |
1192163446 ps |
| T880 |
/workspace/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4006780108 |
|
|
Mar 07 01:34:17 PM PST 24 |
Mar 07 01:34:19 PM PST 24 |
968663540 ps |
| T881 |
/workspace/coverage/default/25.pwrmgr_wakeup.3510056997 |
|
|
Mar 07 01:34:12 PM PST 24 |
Mar 07 01:34:13 PM PST 24 |
138364316 ps |
| T882 |
/workspace/coverage/default/35.pwrmgr_esc_clk_rst_malfunc.3142806983 |
|
|
Mar 07 01:34:51 PM PST 24 |
Mar 07 01:34:53 PM PST 24 |
30754819 ps |
| T883 |
/workspace/coverage/default/20.pwrmgr_aborted_low_power.3898122264 |
|
|
Mar 07 01:33:52 PM PST 24 |
Mar 07 01:33:53 PM PST 24 |
26411515 ps |
| T884 |
/workspace/coverage/default/31.pwrmgr_reset_invalid.2482696531 |
|
|
Mar 07 01:34:34 PM PST 24 |
Mar 07 01:34:38 PM PST 24 |
122075230 ps |
| T885 |
/workspace/coverage/default/17.pwrmgr_escalation_timeout.2544390006 |
|
|
Mar 07 01:33:42 PM PST 24 |
Mar 07 01:33:43 PM PST 24 |
643983811 ps |
| T886 |
/workspace/coverage/default/33.pwrmgr_reset.1578538708 |
|
|
Mar 07 01:34:34 PM PST 24 |
Mar 07 01:34:37 PM PST 24 |
142226971 ps |
| T887 |
/workspace/coverage/default/28.pwrmgr_smoke.4274263906 |
|
|
Mar 07 01:34:26 PM PST 24 |
Mar 07 01:34:27 PM PST 24 |
192052663 ps |
| T888 |
/workspace/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3212061154 |
|
|
Mar 07 01:33:28 PM PST 24 |
Mar 07 01:33:31 PM PST 24 |
1233681228 ps |
| T889 |
/workspace/coverage/default/27.pwrmgr_smoke.3721438055 |
|
|
Mar 07 01:34:21 PM PST 24 |
Mar 07 01:34:22 PM PST 24 |
28534872 ps |
| T890 |
/workspace/coverage/default/42.pwrmgr_stress_all.1227078223 |
|
|
Mar 07 01:35:16 PM PST 24 |
Mar 07 01:35:24 PM PST 24 |
2005467224 ps |
| T891 |
/workspace/coverage/default/24.pwrmgr_global_esc.194353603 |
|
|
Mar 07 01:34:09 PM PST 24 |
Mar 07 01:34:10 PM PST 24 |
69348934 ps |
| T892 |
/workspace/coverage/default/34.pwrmgr_global_esc.3974223342 |
|
|
Mar 07 01:34:44 PM PST 24 |
Mar 07 01:34:45 PM PST 24 |
112168960 ps |
| T893 |
/workspace/coverage/default/31.pwrmgr_escalation_timeout.4165670144 |
|
|
Mar 07 01:34:34 PM PST 24 |
Mar 07 01:34:37 PM PST 24 |
564576406 ps |
| T894 |
/workspace/coverage/default/38.pwrmgr_disable_rom_integrity_check.184399236 |
|
|
Mar 07 01:34:53 PM PST 24 |
Mar 07 01:34:56 PM PST 24 |
107930046 ps |
| T895 |
/workspace/coverage/default/2.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.254255971 |
|
|
Mar 07 01:32:39 PM PST 24 |
Mar 07 01:32:41 PM PST 24 |
1847087196 ps |
| T896 |
/workspace/coverage/default/43.pwrmgr_lowpower_invalid.1983436466 |
|
|
Mar 07 01:35:20 PM PST 24 |
Mar 07 01:35:23 PM PST 24 |
68622103 ps |
| T897 |
/workspace/coverage/default/47.pwrmgr_glitch.2239760002 |
|
|
Mar 07 01:35:22 PM PST 24 |
Mar 07 01:35:23 PM PST 24 |
30905366 ps |
| T898 |
/workspace/coverage/default/14.pwrmgr_sec_cm_ctrl_config_regwen.4210913957 |
|
|
Mar 07 01:33:30 PM PST 24 |
Mar 07 01:33:31 PM PST 24 |
295037587 ps |
| T899 |
/workspace/coverage/default/6.pwrmgr_lowpower_invalid.1501852257 |
|
|
Mar 07 01:32:57 PM PST 24 |
Mar 07 01:32:58 PM PST 24 |
42379152 ps |
| T164 |
/workspace/coverage/default/15.pwrmgr_disable_rom_integrity_check.2815700844 |
|
|
Mar 07 01:33:33 PM PST 24 |
Mar 07 01:33:34 PM PST 24 |
78420882 ps |
| T900 |
/workspace/coverage/default/44.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2778783806 |
|
|
Mar 07 01:35:14 PM PST 24 |
Mar 07 01:35:17 PM PST 24 |
1067058770 ps |
| T901 |
/workspace/coverage/default/47.pwrmgr_esc_clk_rst_malfunc.3800353971 |
|
|
Mar 07 01:35:20 PM PST 24 |
Mar 07 01:35:22 PM PST 24 |
33077119 ps |
| T902 |
/workspace/coverage/default/10.pwrmgr_sec_cm_ctrl_config_regwen.3690850283 |
|
|
Mar 07 01:33:22 PM PST 24 |
Mar 07 01:33:24 PM PST 24 |
147650461 ps |
| T903 |
/workspace/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.3035912875 |
|
|
Mar 07 01:35:25 PM PST 24 |
Mar 07 01:35:27 PM PST 24 |
250625357 ps |
| T904 |
/workspace/coverage/default/20.pwrmgr_escalation_timeout.3668317236 |
|
|
Mar 07 01:33:56 PM PST 24 |
Mar 07 01:33:57 PM PST 24 |
167979534 ps |
| T905 |
/workspace/coverage/default/45.pwrmgr_aborted_low_power.3304590802 |
|
|
Mar 07 01:35:15 PM PST 24 |
Mar 07 01:35:16 PM PST 24 |
41063838 ps |
| T906 |
/workspace/coverage/default/4.pwrmgr_escalation_timeout.3969261956 |
|
|
Mar 07 01:32:46 PM PST 24 |
Mar 07 01:32:47 PM PST 24 |
308427578 ps |
| T907 |
/workspace/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.2315266172 |
|
|
Mar 07 01:34:46 PM PST 24 |
Mar 07 01:34:46 PM PST 24 |
40487144 ps |
| T908 |
/workspace/coverage/default/8.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1737269095 |
|
|
Mar 07 01:33:11 PM PST 24 |
Mar 07 01:33:15 PM PST 24 |
914388409 ps |
| T909 |
/workspace/coverage/default/10.pwrmgr_sec_cm_rstmgr_intersig_mubi.692291639 |
|
|
Mar 07 01:33:22 PM PST 24 |
Mar 07 01:33:24 PM PST 24 |
101595282 ps |
| T910 |
/workspace/coverage/default/10.pwrmgr_esc_clk_rst_malfunc.1235326073 |
|
|
Mar 07 01:33:24 PM PST 24 |
Mar 07 01:33:26 PM PST 24 |
28111832 ps |
| T911 |
/workspace/coverage/default/4.pwrmgr_aborted_low_power.3770303137 |
|
|
Mar 07 01:32:49 PM PST 24 |
Mar 07 01:32:50 PM PST 24 |
21331467 ps |
| T912 |
/workspace/coverage/default/32.pwrmgr_reset_invalid.2542697421 |
|
|
Mar 07 01:34:36 PM PST 24 |
Mar 07 01:34:40 PM PST 24 |
159264853 ps |
| T913 |
/workspace/coverage/default/10.pwrmgr_disable_rom_integrity_check.1705884149 |
|
|
Mar 07 01:33:26 PM PST 24 |
Mar 07 01:33:27 PM PST 24 |
60695094 ps |
| T914 |
/workspace/coverage/default/47.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1149935824 |
|
|
Mar 07 01:35:19 PM PST 24 |
Mar 07 01:35:24 PM PST 24 |
979276486 ps |
| T915 |
/workspace/coverage/default/2.pwrmgr_reset_invalid.2637145552 |
|
|
Mar 07 01:32:38 PM PST 24 |
Mar 07 01:32:39 PM PST 24 |
113308219 ps |
| T916 |
/workspace/coverage/default/20.pwrmgr_esc_clk_rst_malfunc.164898743 |
|
|
Mar 07 01:33:56 PM PST 24 |
Mar 07 01:33:56 PM PST 24 |
29859741 ps |
| T917 |
/workspace/coverage/default/25.pwrmgr_aborted_low_power.665790680 |
|
|
Mar 07 01:34:12 PM PST 24 |
Mar 07 01:34:12 PM PST 24 |
17363462 ps |
| T918 |
/workspace/coverage/default/3.pwrmgr_stress_all.2628772596 |
|
|
Mar 07 01:32:48 PM PST 24 |
Mar 07 01:32:53 PM PST 24 |
4165667572 ps |
| T919 |
/workspace/coverage/default/23.pwrmgr_disable_rom_integrity_check.3755145394 |
|
|
Mar 07 01:34:09 PM PST 24 |
Mar 07 01:34:10 PM PST 24 |
71582054 ps |
| T920 |
/workspace/coverage/default/49.pwrmgr_lowpower_invalid.2735767591 |
|
|
Mar 07 01:35:26 PM PST 24 |
Mar 07 01:35:27 PM PST 24 |
54106905 ps |
| T921 |
/workspace/coverage/default/14.pwrmgr_reset.671529064 |
|
|
Mar 07 01:33:28 PM PST 24 |
Mar 07 01:33:29 PM PST 24 |
50341867 ps |
| T922 |
/workspace/coverage/default/45.pwrmgr_global_esc.575163402 |
|
|
Mar 07 01:35:21 PM PST 24 |
Mar 07 01:35:23 PM PST 24 |
37845729 ps |
| T923 |
/workspace/coverage/default/20.pwrmgr_wakeup.698109685 |
|
|
Mar 07 01:33:54 PM PST 24 |
Mar 07 01:33:55 PM PST 24 |
224573427 ps |
| T924 |
/workspace/coverage/default/6.pwrmgr_sec_cm_rstmgr_intersig_mubi.168271790 |
|
|
Mar 07 01:32:56 PM PST 24 |
Mar 07 01:32:57 PM PST 24 |
96011789 ps |
| T925 |
/workspace/coverage/default/17.pwrmgr_lowpower_wakeup_race.116199555 |
|
|
Mar 07 01:33:34 PM PST 24 |
Mar 07 01:33:34 PM PST 24 |
134658562 ps |
| T926 |
/workspace/coverage/default/47.pwrmgr_aborted_low_power.1229008505 |
|
|
Mar 07 01:35:19 PM PST 24 |
Mar 07 01:35:22 PM PST 24 |
54225457 ps |
| T927 |
/workspace/coverage/default/42.pwrmgr_reset.2021080287 |
|
|
Mar 07 01:35:05 PM PST 24 |
Mar 07 01:35:06 PM PST 24 |
54360369 ps |
| T928 |
/workspace/coverage/default/28.pwrmgr_lowpower_invalid.1772325295 |
|
|
Mar 07 01:34:23 PM PST 24 |
Mar 07 01:34:24 PM PST 24 |
64614790 ps |
| T929 |
/workspace/coverage/default/16.pwrmgr_disable_rom_integrity_check.2091686061 |
|
|
Mar 07 01:33:33 PM PST 24 |
Mar 07 01:33:35 PM PST 24 |
69532563 ps |
| T930 |
/workspace/coverage/default/32.pwrmgr_stress_all.462597207 |
|
|
Mar 07 01:34:35 PM PST 24 |
Mar 07 01:34:46 PM PST 24 |
3451665474 ps |
| T931 |
/workspace/coverage/default/13.pwrmgr_lowpower_wakeup_race.4280527481 |
|
|
Mar 07 01:33:24 PM PST 24 |
Mar 07 01:33:27 PM PST 24 |
285520802 ps |
| T932 |
/workspace/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2119871262 |
|
|
Mar 07 01:35:05 PM PST 24 |
Mar 07 01:35:09 PM PST 24 |
798516220 ps |
| T933 |
/workspace/coverage/default/47.pwrmgr_wakeup_reset.3972458967 |
|
|
Mar 07 01:35:21 PM PST 24 |
Mar 07 01:35:28 PM PST 24 |
53515044 ps |
| T934 |
/workspace/coverage/default/12.pwrmgr_reset.3137314633 |
|
|
Mar 07 01:33:28 PM PST 24 |
Mar 07 01:33:29 PM PST 24 |
37842861 ps |
| T935 |
/workspace/coverage/default/8.pwrmgr_wakeup_reset.3679113101 |
|
|
Mar 07 01:33:09 PM PST 24 |
Mar 07 01:33:11 PM PST 24 |
97408885 ps |
| T936 |
/workspace/coverage/default/49.pwrmgr_global_esc.1171917119 |
|
|
Mar 07 01:35:24 PM PST 24 |
Mar 07 01:35:25 PM PST 24 |
59859849 ps |
| T937 |
/workspace/coverage/default/15.pwrmgr_wakeup_reset.671047553 |
|
|
Mar 07 01:33:36 PM PST 24 |
Mar 07 01:33:38 PM PST 24 |
220118362 ps |
| T938 |
/workspace/coverage/default/25.pwrmgr_reset.1458067791 |
|
|
Mar 07 01:34:14 PM PST 24 |
Mar 07 01:34:15 PM PST 24 |
52020858 ps |
| T939 |
/workspace/coverage/default/23.pwrmgr_lowpower_invalid.3842678992 |
|
|
Mar 07 01:34:13 PM PST 24 |
Mar 07 01:34:14 PM PST 24 |
43155198 ps |
| T940 |
/workspace/coverage/default/31.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.357678261 |
|
|
Mar 07 01:34:29 PM PST 24 |
Mar 07 01:34:32 PM PST 24 |
1319634458 ps |
| T941 |
/workspace/coverage/default/48.pwrmgr_lowpower_invalid.2492511313 |
|
|
Mar 07 01:35:26 PM PST 24 |
Mar 07 01:35:27 PM PST 24 |
42585104 ps |
| T942 |
/workspace/coverage/default/22.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2970283990 |
|
|
Mar 07 01:34:11 PM PST 24 |
Mar 07 01:34:13 PM PST 24 |
1442790745 ps |
| T943 |
/workspace/coverage/default/11.pwrmgr_escalation_timeout.1833698990 |
|
|
Mar 07 01:33:21 PM PST 24 |
Mar 07 01:33:23 PM PST 24 |
434981379 ps |
| T944 |
/workspace/coverage/default/38.pwrmgr_sec_cm_ctrl_config_regwen.21974833 |
|
|
Mar 07 01:34:59 PM PST 24 |
Mar 07 01:35:00 PM PST 24 |
232194103 ps |
| T945 |
/workspace/coverage/default/44.pwrmgr_lowpower_wakeup_race.1508791474 |
|
|
Mar 07 01:35:16 PM PST 24 |
Mar 07 01:35:19 PM PST 24 |
41857397 ps |
| T946 |
/workspace/coverage/default/24.pwrmgr_stress_all.3691270291 |
|
|
Mar 07 01:34:10 PM PST 24 |
Mar 07 01:34:12 PM PST 24 |
674638943 ps |
| T947 |
/workspace/coverage/default/33.pwrmgr_reset_invalid.3328521260 |
|
|
Mar 07 01:34:45 PM PST 24 |
Mar 07 01:34:46 PM PST 24 |
116842165 ps |
| T948 |
/workspace/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1313202886 |
|
|
Mar 07 01:34:36 PM PST 24 |
Mar 07 01:34:42 PM PST 24 |
1027744613 ps |
| T949 |
/workspace/coverage/default/17.pwrmgr_smoke.1071579779 |
|
|
Mar 07 01:33:34 PM PST 24 |
Mar 07 01:33:35 PM PST 24 |
33514926 ps |
| T950 |
/workspace/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3429814690 |
|
|
Mar 07 01:35:23 PM PST 24 |
Mar 07 01:35:25 PM PST 24 |
2112902502 ps |
| T951 |
/workspace/coverage/default/5.pwrmgr_wakeup.3966687181 |
|
|
Mar 07 01:32:49 PM PST 24 |
Mar 07 01:32:51 PM PST 24 |
213182440 ps |
| T952 |
/workspace/coverage/default/3.pwrmgr_lowpower_wakeup_race.346761396 |
|
|
Mar 07 01:32:38 PM PST 24 |
Mar 07 01:32:40 PM PST 24 |
294989114 ps |
| T953 |
/workspace/coverage/default/26.pwrmgr_lowpower_wakeup_race.3258294485 |
|
|
Mar 07 01:34:25 PM PST 24 |
Mar 07 01:34:27 PM PST 24 |
102264801 ps |
| T954 |
/workspace/coverage/default/27.pwrmgr_lowpower_wakeup_race.3737767288 |
|
|
Mar 07 01:34:25 PM PST 24 |
Mar 07 01:34:26 PM PST 24 |
113277317 ps |
| T955 |
/workspace/coverage/default/44.pwrmgr_global_esc.2606491437 |
|
|
Mar 07 01:35:19 PM PST 24 |
Mar 07 01:35:22 PM PST 24 |
94971352 ps |
| T956 |
/workspace/coverage/default/16.pwrmgr_wakeup.3845147363 |
|
|
Mar 07 01:33:33 PM PST 24 |
Mar 07 01:33:35 PM PST 24 |
160053909 ps |
| T957 |
/workspace/coverage/default/20.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1965057257 |
|
|
Mar 07 01:33:56 PM PST 24 |
Mar 07 01:33:59 PM PST 24 |
1050974580 ps |
| T958 |
/workspace/coverage/default/48.pwrmgr_wakeup_reset.2301705338 |
|
|
Mar 07 01:35:22 PM PST 24 |
Mar 07 01:35:24 PM PST 24 |
126771421 ps |
| T959 |
/workspace/coverage/default/36.pwrmgr_sec_cm_rstmgr_intersig_mubi.122136506 |
|
|
Mar 07 01:34:53 PM PST 24 |
Mar 07 01:34:56 PM PST 24 |
93757111 ps |
| T960 |
/workspace/coverage/default/2.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1878963220 |
|
|
Mar 07 01:32:35 PM PST 24 |
Mar 07 01:32:38 PM PST 24 |
1099298206 ps |
| T961 |
/workspace/coverage/default/7.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.908185805 |
|
|
Mar 07 01:33:09 PM PST 24 |
Mar 07 01:33:12 PM PST 24 |
1483594247 ps |
| T962 |
/workspace/coverage/default/49.pwrmgr_wakeup.2070397850 |
|
|
Mar 07 01:35:24 PM PST 24 |
Mar 07 01:35:25 PM PST 24 |
310949249 ps |
| T963 |
/workspace/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.3334892312 |
|
|
Mar 07 01:34:35 PM PST 24 |
Mar 07 01:34:40 PM PST 24 |
275142093 ps |
| T964 |
/workspace/coverage/default/14.pwrmgr_smoke.4120979839 |
|
|
Mar 07 01:33:26 PM PST 24 |
Mar 07 01:33:27 PM PST 24 |
33705013 ps |
| T965 |
/workspace/coverage/default/22.pwrmgr_wakeup.3857970520 |
|
|
Mar 07 01:34:11 PM PST 24 |
Mar 07 01:34:12 PM PST 24 |
196730246 ps |
| T966 |
/workspace/coverage/default/9.pwrmgr_lowpower_invalid.420253749 |
|
|
Mar 07 01:33:23 PM PST 24 |
Mar 07 01:33:24 PM PST 24 |
70489611 ps |
| T967 |
/workspace/coverage/default/13.pwrmgr_wakeup.3978870038 |
|
|
Mar 07 01:33:24 PM PST 24 |
Mar 07 01:33:26 PM PST 24 |
313618212 ps |
| T968 |
/workspace/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.1305525641 |
|
|
Mar 07 01:33:36 PM PST 24 |
Mar 07 01:33:37 PM PST 24 |
236080750 ps |
| T969 |
/workspace/coverage/default/49.pwrmgr_wakeup_reset.3072217426 |
|
|
Mar 07 01:35:29 PM PST 24 |
Mar 07 01:35:30 PM PST 24 |
178354937 ps |
| T970 |
/workspace/coverage/default/3.pwrmgr_smoke.3005106542 |
|
|
Mar 07 01:32:38 PM PST 24 |
Mar 07 01:32:39 PM PST 24 |
79768453 ps |
| T971 |
/workspace/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.4053027420 |
|
|
Mar 07 01:35:17 PM PST 24 |
Mar 07 01:35:20 PM PST 24 |
170621292 ps |
| T972 |
/workspace/coverage/default/41.pwrmgr_reset_invalid.2854849694 |
|
|
Mar 07 01:35:06 PM PST 24 |
Mar 07 01:35:07 PM PST 24 |
101144180 ps |
| T973 |
/workspace/coverage/default/28.pwrmgr_esc_clk_rst_malfunc.2340429884 |
|
|
Mar 07 01:34:25 PM PST 24 |
Mar 07 01:34:25 PM PST 24 |
40543786 ps |
| T974 |
/workspace/coverage/default/1.pwrmgr_glitch.566536447 |
|
|
Mar 07 01:32:32 PM PST 24 |
Mar 07 01:32:34 PM PST 24 |
42838201 ps |
| T975 |
/workspace/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.54631642 |
|
|
Mar 07 01:34:46 PM PST 24 |
Mar 07 01:34:47 PM PST 24 |
220227534 ps |
| T976 |
/workspace/coverage/default/48.pwrmgr_stress_all.1634122324 |
|
|
Mar 07 01:35:30 PM PST 24 |
Mar 07 01:35:37 PM PST 24 |
2148760220 ps |
| T977 |
/workspace/coverage/default/33.pwrmgr_sec_cm_rstmgr_intersig_mubi.3877897504 |
|
|
Mar 07 01:34:34 PM PST 24 |
Mar 07 01:34:37 PM PST 24 |
65572551 ps |
| T978 |
/workspace/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.3255261433 |
|
|
Mar 07 01:35:20 PM PST 24 |
Mar 07 01:35:23 PM PST 24 |
293537212 ps |
| T979 |
/workspace/coverage/default/6.pwrmgr_global_esc.384779310 |
|
|
Mar 07 01:32:55 PM PST 24 |
Mar 07 01:32:56 PM PST 24 |
20796310 ps |
| T980 |
/workspace/coverage/default/5.pwrmgr_stress_all_with_rand_reset.2593485763 |
|
|
Mar 07 01:32:57 PM PST 24 |
Mar 07 01:33:09 PM PST 24 |
4422289365 ps |
| T981 |
/workspace/coverage/default/45.pwrmgr_wakeup.2762290524 |
|
|
Mar 07 01:35:14 PM PST 24 |
Mar 07 01:35:15 PM PST 24 |
66922857 ps |
| T982 |
/workspace/coverage/default/13.pwrmgr_glitch.1823451005 |
|
|
Mar 07 01:33:26 PM PST 24 |
Mar 07 01:33:27 PM PST 24 |
62062131 ps |
| T983 |
/workspace/coverage/default/24.pwrmgr_lowpower_wakeup_race.2348392713 |
|
|
Mar 07 01:34:12 PM PST 24 |
Mar 07 01:34:13 PM PST 24 |
358853568 ps |
| T984 |
/workspace/coverage/default/35.pwrmgr_sec_cm_ctrl_config_regwen.876773805 |
|
|
Mar 07 01:34:45 PM PST 24 |
Mar 07 01:34:46 PM PST 24 |
88644773 ps |
| T54 |
/workspace/coverage/cover_reg_top/1.pwrmgr_tl_intg_err.225490596 |
|
|
Mar 07 12:54:54 PM PST 24 |
Mar 07 12:54:56 PM PST 24 |
123179115 ps |
| T65 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.2877474419 |
|
|
Mar 07 12:54:49 PM PST 24 |
Mar 07 12:54:51 PM PST 24 |
48558910 ps |
| T72 |
/workspace/coverage/cover_reg_top/3.pwrmgr_intr_test.3529149603 |
|
|
Mar 07 12:55:02 PM PST 24 |
Mar 07 12:55:04 PM PST 24 |
31048567 ps |
| T55 |
/workspace/coverage/cover_reg_top/12.pwrmgr_tl_errors.3484747950 |
|
|
Mar 07 12:54:52 PM PST 24 |
Mar 07 12:54:54 PM PST 24 |
117138102 ps |
| T66 |
/workspace/coverage/cover_reg_top/16.pwrmgr_same_csr_outstanding.3475294180 |
|
|
Mar 07 12:55:12 PM PST 24 |
Mar 07 12:55:13 PM PST 24 |
34891361 ps |
| T73 |
/workspace/coverage/cover_reg_top/48.pwrmgr_intr_test.3184445314 |
|
|
Mar 07 12:55:06 PM PST 24 |
Mar 07 12:55:07 PM PST 24 |
40227286 ps |
| T67 |
/workspace/coverage/cover_reg_top/3.pwrmgr_same_csr_outstanding.1916615733 |
|
|
Mar 07 12:54:49 PM PST 24 |
Mar 07 12:54:50 PM PST 24 |
186202700 ps |
| T56 |
/workspace/coverage/cover_reg_top/8.pwrmgr_tl_intg_err.2437220619 |
|
|
Mar 07 12:54:55 PM PST 24 |
Mar 07 12:54:56 PM PST 24 |
124581773 ps |
| T74 |
/workspace/coverage/cover_reg_top/41.pwrmgr_intr_test.733016654 |
|
|
Mar 07 12:54:59 PM PST 24 |
Mar 07 12:55:00 PM PST 24 |
78166738 ps |
| T155 |
/workspace/coverage/cover_reg_top/30.pwrmgr_intr_test.310760103 |
|
|
Mar 07 12:55:00 PM PST 24 |
Mar 07 12:55:02 PM PST 24 |
36607644 ps |
| T79 |
/workspace/coverage/cover_reg_top/15.pwrmgr_csr_mem_rw_with_rand_reset.833234600 |
|
|
Mar 07 12:54:58 PM PST 24 |
Mar 07 12:54:59 PM PST 24 |
41951652 ps |
| T86 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.4038526732 |
|
|
Mar 07 12:55:06 PM PST 24 |
Mar 07 12:55:08 PM PST 24 |
79539900 ps |
| T60 |
/workspace/coverage/cover_reg_top/15.pwrmgr_tl_errors.4102359773 |
|
|
Mar 07 12:54:47 PM PST 24 |
Mar 07 12:54:50 PM PST 24 |
45591887 ps |
| T157 |
/workspace/coverage/cover_reg_top/1.pwrmgr_intr_test.2663139139 |
|
|
Mar 07 12:55:07 PM PST 24 |
Mar 07 12:55:08 PM PST 24 |
23796623 ps |
| T110 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_hw_reset.4136469129 |
|
|
Mar 07 12:54:53 PM PST 24 |
Mar 07 12:54:54 PM PST 24 |
63688499 ps |
| T61 |
/workspace/coverage/cover_reg_top/15.pwrmgr_tl_intg_err.1232940037 |
|
|
Mar 07 12:54:58 PM PST 24 |
Mar 07 12:55:00 PM PST 24 |
213570696 ps |
| T87 |
/workspace/coverage/cover_reg_top/6.pwrmgr_csr_rw.3509152728 |
|
|
Mar 07 12:54:49 PM PST 24 |
Mar 07 12:54:50 PM PST 24 |
22360952 ps |
| T985 |
/workspace/coverage/cover_reg_top/18.pwrmgr_csr_mem_rw_with_rand_reset.2314142492 |
|
|
Mar 07 12:55:29 PM PST 24 |
Mar 07 12:55:31 PM PST 24 |
41385298 ps |
| T160 |
/workspace/coverage/cover_reg_top/32.pwrmgr_intr_test.692901899 |
|
|
Mar 07 12:54:49 PM PST 24 |
Mar 07 12:54:49 PM PST 24 |
92199812 ps |
| T156 |
/workspace/coverage/cover_reg_top/24.pwrmgr_intr_test.858615598 |
|
|
Mar 07 12:55:21 PM PST 24 |
Mar 07 12:55:22 PM PST 24 |
22138029 ps |
| T88 |
/workspace/coverage/cover_reg_top/19.pwrmgr_csr_rw.2277694529 |
|
|
Mar 07 12:55:08 PM PST 24 |
Mar 07 12:55:09 PM PST 24 |
40115532 ps |
| T158 |
/workspace/coverage/cover_reg_top/22.pwrmgr_intr_test.816678570 |
|
|
Mar 07 12:55:11 PM PST 24 |
Mar 07 12:55:12 PM PST 24 |
17614416 ps |
| T80 |
/workspace/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.258006181 |
|
|
Mar 07 12:54:49 PM PST 24 |
Mar 07 12:54:50 PM PST 24 |
48900664 ps |
| T62 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.3489329067 |
|
|
Mar 07 12:54:48 PM PST 24 |
Mar 07 12:54:49 PM PST 24 |
74414525 ps |
| T159 |
/workspace/coverage/cover_reg_top/45.pwrmgr_intr_test.3056696470 |
|
|
Mar 07 12:54:51 PM PST 24 |
Mar 07 12:54:52 PM PST 24 |
26353314 ps |
| T986 |
/workspace/coverage/cover_reg_top/37.pwrmgr_intr_test.2030679647 |
|
|
Mar 07 12:54:50 PM PST 24 |
Mar 07 12:54:51 PM PST 24 |
26514293 ps |
| T89 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.3136803630 |
|
|
Mar 07 12:54:51 PM PST 24 |
Mar 07 12:54:52 PM PST 24 |
49371508 ps |
| T987 |
/workspace/coverage/cover_reg_top/17.pwrmgr_intr_test.3912807467 |
|
|
Mar 07 12:54:49 PM PST 24 |
Mar 07 12:54:49 PM PST 24 |
125455735 ps |
| T988 |
/workspace/coverage/cover_reg_top/26.pwrmgr_intr_test.2716504049 |
|
|
Mar 07 12:54:53 PM PST 24 |
Mar 07 12:54:53 PM PST 24 |
21262660 ps |
| T989 |
/workspace/coverage/cover_reg_top/34.pwrmgr_intr_test.1165831647 |
|
|
Mar 07 12:54:46 PM PST 24 |
Mar 07 12:54:47 PM PST 24 |
23001660 ps |
| T111 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.1247850284 |
|
|
Mar 07 12:54:45 PM PST 24 |
Mar 07 12:54:45 PM PST 24 |
70502430 ps |
| T77 |
/workspace/coverage/cover_reg_top/6.pwrmgr_tl_errors.3561873830 |
|
|
Mar 07 12:54:56 PM PST 24 |
Mar 07 12:54:58 PM PST 24 |
73101387 ps |
| T990 |
/workspace/coverage/cover_reg_top/2.pwrmgr_intr_test.1796742384 |
|
|
Mar 07 12:54:40 PM PST 24 |
Mar 07 12:54:41 PM PST 24 |
59220311 ps |
| T69 |
/workspace/coverage/cover_reg_top/1.pwrmgr_tl_errors.1617881979 |
|
|
Mar 07 12:54:43 PM PST 24 |
Mar 07 12:54:46 PM PST 24 |
161246638 ps |
| T124 |
/workspace/coverage/cover_reg_top/6.pwrmgr_csr_mem_rw_with_rand_reset.1376352148 |
|
|
Mar 07 12:54:51 PM PST 24 |
Mar 07 12:54:52 PM PST 24 |
59168340 ps |
| T112 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_rw.4124004351 |
|
|
Mar 07 12:54:44 PM PST 24 |
Mar 07 12:54:45 PM PST 24 |
20574475 ps |
| T991 |
/workspace/coverage/cover_reg_top/42.pwrmgr_intr_test.452218133 |
|
|
Mar 07 12:54:59 PM PST 24 |
Mar 07 12:55:00 PM PST 24 |
57944921 ps |
| T992 |
/workspace/coverage/cover_reg_top/25.pwrmgr_intr_test.3890570182 |
|
|
Mar 07 12:54:52 PM PST 24 |
Mar 07 12:54:52 PM PST 24 |
58151146 ps |
| T993 |
/workspace/coverage/cover_reg_top/35.pwrmgr_intr_test.2578196828 |
|
|
Mar 07 12:54:57 PM PST 24 |
Mar 07 12:54:58 PM PST 24 |
23158508 ps |
| T90 |
/workspace/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.3529413261 |
|
|
Mar 07 12:54:43 PM PST 24 |
Mar 07 12:54:44 PM PST 24 |
21398511 ps |
| T994 |
/workspace/coverage/cover_reg_top/10.pwrmgr_csr_mem_rw_with_rand_reset.2572268057 |
|
|
Mar 07 12:54:55 PM PST 24 |
Mar 07 12:54:57 PM PST 24 |
95179691 ps |
| T71 |
/workspace/coverage/cover_reg_top/7.pwrmgr_tl_intg_err.589882616 |
|
|
Mar 07 12:54:50 PM PST 24 |
Mar 07 12:54:52 PM PST 24 |
159021471 ps |
| T70 |
/workspace/coverage/cover_reg_top/14.pwrmgr_tl_errors.2307266411 |
|
|
Mar 07 12:54:40 PM PST 24 |
Mar 07 12:54:41 PM PST 24 |
50629312 ps |
| T91 |
/workspace/coverage/cover_reg_top/15.pwrmgr_same_csr_outstanding.1244529944 |
|
|
Mar 07 12:54:47 PM PST 24 |
Mar 07 12:54:48 PM PST 24 |
77656193 ps |
| T106 |
/workspace/coverage/cover_reg_top/13.pwrmgr_csr_rw.3134327174 |
|
|
Mar 07 12:54:56 PM PST 24 |
Mar 07 12:54:57 PM PST 24 |
21640565 ps |
| T995 |
/workspace/coverage/cover_reg_top/19.pwrmgr_csr_mem_rw_with_rand_reset.1883778325 |
|
|
Mar 07 12:54:53 PM PST 24 |
Mar 07 12:54:54 PM PST 24 |
76280971 ps |
| T107 |
/workspace/coverage/cover_reg_top/9.pwrmgr_csr_rw.1375987591 |
|
|
Mar 07 12:54:51 PM PST 24 |
Mar 07 12:54:51 PM PST 24 |
43748038 ps |
| T108 |
/workspace/coverage/cover_reg_top/13.pwrmgr_same_csr_outstanding.2477769020 |
|
|
Mar 07 12:54:53 PM PST 24 |
Mar 07 12:54:54 PM PST 24 |
480796723 ps |
| T125 |
/workspace/coverage/cover_reg_top/13.pwrmgr_tl_errors.247818537 |
|
|
Mar 07 12:54:51 PM PST 24 |
Mar 07 12:54:53 PM PST 24 |
95682494 ps |
| T92 |
/workspace/coverage/cover_reg_top/2.pwrmgr_same_csr_outstanding.486206252 |
|
|
Mar 07 12:55:27 PM PST 24 |
Mar 07 12:55:28 PM PST 24 |
27764044 ps |
| T996 |
/workspace/coverage/cover_reg_top/17.pwrmgr_tl_intg_err.2509992950 |
|
|
Mar 07 12:54:48 PM PST 24 |
Mar 07 12:54:49 PM PST 24 |
142307408 ps |
| T997 |
/workspace/coverage/cover_reg_top/21.pwrmgr_intr_test.2543481491 |
|
|
Mar 07 12:55:11 PM PST 24 |
Mar 07 12:55:12 PM PST 24 |
38907580 ps |
| T998 |
/workspace/coverage/cover_reg_top/46.pwrmgr_intr_test.3137593742 |
|
|
Mar 07 12:55:03 PM PST 24 |
Mar 07 12:55:05 PM PST 24 |
18987808 ps |
| T109 |
/workspace/coverage/cover_reg_top/7.pwrmgr_csr_rw.3189140684 |
|
|
Mar 07 12:54:56 PM PST 24 |
Mar 07 12:54:57 PM PST 24 |
36482885 ps |
| T93 |
/workspace/coverage/cover_reg_top/19.pwrmgr_same_csr_outstanding.1004935615 |
|
|
Mar 07 12:55:17 PM PST 24 |
Mar 07 12:55:18 PM PST 24 |
40801721 ps |
| T94 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_rw.3503880312 |
|
|
Mar 07 12:54:50 PM PST 24 |
Mar 07 12:54:51 PM PST 24 |
58389879 ps |
| T95 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_rw.870448084 |
|
|
Mar 07 12:54:58 PM PST 24 |
Mar 07 12:54:59 PM PST 24 |
21732238 ps |
| T999 |
/workspace/coverage/cover_reg_top/33.pwrmgr_intr_test.326151485 |
|
|
Mar 07 12:55:04 PM PST 24 |
Mar 07 12:55:06 PM PST 24 |
31057362 ps |
| T1000 |
/workspace/coverage/cover_reg_top/11.pwrmgr_csr_rw.849673517 |
|
|
Mar 07 12:55:05 PM PST 24 |
Mar 07 12:55:06 PM PST 24 |
42626435 ps |
| T143 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.294366329 |
|
|
Mar 07 12:54:56 PM PST 24 |
Mar 07 12:54:58 PM PST 24 |
2255848018 ps |
| T1001 |
/workspace/coverage/cover_reg_top/43.pwrmgr_intr_test.2836915818 |
|
|
Mar 07 12:55:08 PM PST 24 |
Mar 07 12:55:14 PM PST 24 |
22996527 ps |
| T1002 |
/workspace/coverage/cover_reg_top/29.pwrmgr_intr_test.2249047461 |
|
|
Mar 07 12:54:49 PM PST 24 |
Mar 07 12:54:49 PM PST 24 |
20858899 ps |
| T78 |
/workspace/coverage/cover_reg_top/13.pwrmgr_tl_intg_err.3186252484 |
|
|
Mar 07 12:54:42 PM PST 24 |
Mar 07 12:54:43 PM PST 24 |
259951714 ps |
| T1003 |
/workspace/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.2116840136 |
|
|
Mar 07 12:54:44 PM PST 24 |
Mar 07 12:54:45 PM PST 24 |
221892167 ps |
| T1004 |
/workspace/coverage/cover_reg_top/11.pwrmgr_tl_errors.1807205137 |
|
|
Mar 07 12:54:49 PM PST 24 |
Mar 07 12:54:52 PM PST 24 |
461201608 ps |
| T1005 |
/workspace/coverage/cover_reg_top/7.pwrmgr_tl_errors.3706369331 |
|
|
Mar 07 12:54:51 PM PST 24 |
Mar 07 12:54:55 PM PST 24 |
363618438 ps |
| T1006 |
/workspace/coverage/cover_reg_top/4.pwrmgr_tl_errors.3588778199 |
|
|
Mar 07 12:54:44 PM PST 24 |
Mar 07 12:54:46 PM PST 24 |
47668029 ps |
| T1007 |
/workspace/coverage/cover_reg_top/36.pwrmgr_intr_test.491964176 |
|
|
Mar 07 12:54:49 PM PST 24 |
Mar 07 12:54:50 PM PST 24 |
20205479 ps |
| T1008 |
/workspace/coverage/cover_reg_top/16.pwrmgr_csr_rw.3593830172 |
|
|
Mar 07 12:54:52 PM PST 24 |
Mar 07 12:54:53 PM PST 24 |
20987563 ps |
| T1009 |
/workspace/coverage/cover_reg_top/0.pwrmgr_intr_test.497579459 |
|
|
Mar 07 12:54:58 PM PST 24 |
Mar 07 12:54:58 PM PST 24 |
28038047 ps |
| T1010 |
/workspace/coverage/cover_reg_top/31.pwrmgr_intr_test.3554455382 |
|
|
Mar 07 12:54:56 PM PST 24 |
Mar 07 12:54:57 PM PST 24 |
20458432 ps |
| T1011 |
/workspace/coverage/cover_reg_top/18.pwrmgr_tl_errors.1772009628 |
|
|
Mar 07 12:55:14 PM PST 24 |
Mar 07 12:55:15 PM PST 24 |
51636827 ps |
| T1012 |
/workspace/coverage/cover_reg_top/11.pwrmgr_intr_test.2592161174 |
|
|
Mar 07 12:55:12 PM PST 24 |
Mar 07 12:55:13 PM PST 24 |
60831085 ps |
| T1013 |
/workspace/coverage/cover_reg_top/38.pwrmgr_intr_test.1694295630 |
|
|
Mar 07 12:54:45 PM PST 24 |
Mar 07 12:54:46 PM PST 24 |
19536112 ps |