| T808 |
/workspace/coverage/default/30.pwrmgr_smoke.2893804399 |
|
|
Mar 21 01:34:34 PM PDT 24 |
Mar 21 01:34:35 PM PDT 24 |
29890817 ps |
| T809 |
/workspace/coverage/default/9.pwrmgr_wakeup_reset.100589442 |
|
|
Mar 21 01:33:34 PM PDT 24 |
Mar 21 01:33:35 PM PDT 24 |
95341879 ps |
| T810 |
/workspace/coverage/default/22.pwrmgr_aborted_low_power.1315910839 |
|
|
Mar 21 01:34:25 PM PDT 24 |
Mar 21 01:34:26 PM PDT 24 |
28986041 ps |
| T811 |
/workspace/coverage/default/35.pwrmgr_lowpower_wakeup_race.137770494 |
|
|
Mar 21 01:34:52 PM PDT 24 |
Mar 21 01:34:53 PM PDT 24 |
211420684 ps |
| T812 |
/workspace/coverage/default/4.pwrmgr_escalation_timeout.282522133 |
|
|
Mar 21 01:33:16 PM PDT 24 |
Mar 21 01:33:17 PM PDT 24 |
632734156 ps |
| T813 |
/workspace/coverage/default/19.pwrmgr_stress_all.1318605591 |
|
|
Mar 21 01:34:06 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
1364651182 ps |
| T814 |
/workspace/coverage/default/10.pwrmgr_sec_cm_ctrl_config_regwen.3946627625 |
|
|
Mar 21 01:33:32 PM PDT 24 |
Mar 21 01:33:34 PM PDT 24 |
194026900 ps |
| T815 |
/workspace/coverage/default/22.pwrmgr_escalation_timeout.2152850180 |
|
|
Mar 21 01:34:19 PM PDT 24 |
Mar 21 01:34:20 PM PDT 24 |
165468061 ps |
| T816 |
/workspace/coverage/default/5.pwrmgr_aborted_low_power.4222507211 |
|
|
Mar 21 01:33:13 PM PDT 24 |
Mar 21 01:33:14 PM PDT 24 |
110191089 ps |
| T817 |
/workspace/coverage/default/4.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1395358496 |
|
|
Mar 21 01:33:13 PM PDT 24 |
Mar 21 01:33:16 PM PDT 24 |
787594393 ps |
| T818 |
/workspace/coverage/default/6.pwrmgr_escalation_timeout.344581774 |
|
|
Mar 21 01:33:24 PM PDT 24 |
Mar 21 01:33:25 PM PDT 24 |
163011291 ps |
| T143 |
/workspace/coverage/default/10.pwrmgr_stress_all_with_rand_reset.1798026196 |
|
|
Mar 21 01:33:38 PM PDT 24 |
Mar 21 01:33:56 PM PDT 24 |
14060862424 ps |
| T819 |
/workspace/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4217768013 |
|
|
Mar 21 01:34:07 PM PDT 24 |
Mar 21 01:34:14 PM PDT 24 |
885261509 ps |
| T820 |
/workspace/coverage/default/13.pwrmgr_global_esc.2629512714 |
|
|
Mar 21 01:33:42 PM PDT 24 |
Mar 21 01:33:43 PM PDT 24 |
37746127 ps |
| T821 |
/workspace/coverage/default/47.pwrmgr_sec_cm_rstmgr_intersig_mubi.3357124949 |
|
|
Mar 21 01:35:30 PM PDT 24 |
Mar 21 01:35:31 PM PDT 24 |
96162590 ps |
| T822 |
/workspace/coverage/default/15.pwrmgr_wakeup.3272328765 |
|
|
Mar 21 01:33:55 PM PDT 24 |
Mar 21 01:34:03 PM PDT 24 |
120752319 ps |
| T823 |
/workspace/coverage/default/28.pwrmgr_smoke.3338878070 |
|
|
Mar 21 01:34:33 PM PDT 24 |
Mar 21 01:34:34 PM PDT 24 |
50121804 ps |
| T824 |
/workspace/coverage/default/41.pwrmgr_stress_all.784459679 |
|
|
Mar 21 01:35:21 PM PDT 24 |
Mar 21 01:35:24 PM PDT 24 |
2696563134 ps |
| T825 |
/workspace/coverage/default/12.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2037243370 |
|
|
Mar 21 01:33:43 PM PDT 24 |
Mar 21 01:33:46 PM PDT 24 |
1035477030 ps |
| T826 |
/workspace/coverage/default/17.pwrmgr_reset.4182550725 |
|
|
Mar 21 01:33:56 PM PDT 24 |
Mar 21 01:34:03 PM PDT 24 |
51464181 ps |
| T827 |
/workspace/coverage/default/43.pwrmgr_escalation_timeout.1025759913 |
|
|
Mar 21 01:35:16 PM PDT 24 |
Mar 21 01:35:17 PM PDT 24 |
636147413 ps |
| T828 |
/workspace/coverage/default/46.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3636614946 |
|
|
Mar 21 01:35:26 PM PDT 24 |
Mar 21 01:35:29 PM PDT 24 |
861977024 ps |
| T829 |
/workspace/coverage/default/47.pwrmgr_aborted_low_power.4184503230 |
|
|
Mar 21 01:35:29 PM PDT 24 |
Mar 21 01:35:30 PM PDT 24 |
88879341 ps |
| T830 |
/workspace/coverage/default/41.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.293544751 |
|
|
Mar 21 01:35:10 PM PDT 24 |
Mar 21 01:35:12 PM PDT 24 |
974808137 ps |
| T831 |
/workspace/coverage/default/31.pwrmgr_reset_invalid.2085090116 |
|
|
Mar 21 01:35:03 PM PDT 24 |
Mar 21 01:35:05 PM PDT 24 |
110112450 ps |
| T832 |
/workspace/coverage/default/14.pwrmgr_sec_cm_rstmgr_intersig_mubi.4159677073 |
|
|
Mar 21 01:33:56 PM PDT 24 |
Mar 21 01:34:03 PM PDT 24 |
144069731 ps |
| T833 |
/workspace/coverage/default/36.pwrmgr_aborted_low_power.1378440559 |
|
|
Mar 21 01:35:06 PM PDT 24 |
Mar 21 01:35:07 PM PDT 24 |
127925030 ps |
| T834 |
/workspace/coverage/default/22.pwrmgr_lowpower_invalid.3800875757 |
|
|
Mar 21 01:34:19 PM PDT 24 |
Mar 21 01:34:20 PM PDT 24 |
76630412 ps |
| T835 |
/workspace/coverage/default/32.pwrmgr_aborted_low_power.610600690 |
|
|
Mar 21 01:34:52 PM PDT 24 |
Mar 21 01:34:53 PM PDT 24 |
26587596 ps |
| T836 |
/workspace/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.2424559736 |
|
|
Mar 21 01:35:23 PM PDT 24 |
Mar 21 01:35:24 PM PDT 24 |
139368303 ps |
| T837 |
/workspace/coverage/default/23.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.756540745 |
|
|
Mar 21 01:34:25 PM PDT 24 |
Mar 21 01:34:28 PM PDT 24 |
829217285 ps |
| T838 |
/workspace/coverage/default/44.pwrmgr_reset_invalid.1691885732 |
|
|
Mar 21 01:35:21 PM PDT 24 |
Mar 21 01:35:22 PM PDT 24 |
107334915 ps |
| T839 |
/workspace/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.2289903338 |
|
|
Mar 21 01:34:46 PM PDT 24 |
Mar 21 01:34:46 PM PDT 24 |
60302828 ps |
| T840 |
/workspace/coverage/default/24.pwrmgr_lowpower_invalid.167248596 |
|
|
Mar 21 01:34:19 PM PDT 24 |
Mar 21 01:34:20 PM PDT 24 |
63615961 ps |
| T841 |
/workspace/coverage/default/7.pwrmgr_sec_cm_rstmgr_intersig_mubi.1860927198 |
|
|
Mar 21 01:33:25 PM PDT 24 |
Mar 21 01:33:26 PM PDT 24 |
211038610 ps |
| T842 |
/workspace/coverage/default/16.pwrmgr_lowpower_wakeup_race.4088063325 |
|
|
Mar 21 01:33:54 PM PDT 24 |
Mar 21 01:33:58 PM PDT 24 |
51951927 ps |
| T843 |
/workspace/coverage/default/41.pwrmgr_smoke.4052135992 |
|
|
Mar 21 01:35:19 PM PDT 24 |
Mar 21 01:35:19 PM PDT 24 |
55021264 ps |
| T844 |
/workspace/coverage/default/44.pwrmgr_stress_all.2908203640 |
|
|
Mar 21 01:35:27 PM PDT 24 |
Mar 21 01:35:30 PM PDT 24 |
943002007 ps |
| T845 |
/workspace/coverage/default/34.pwrmgr_reset_invalid.2356606226 |
|
|
Mar 21 01:34:50 PM PDT 24 |
Mar 21 01:34:53 PM PDT 24 |
249122047 ps |
| T846 |
/workspace/coverage/default/17.pwrmgr_stress_all.4020443910 |
|
|
Mar 21 01:34:09 PM PDT 24 |
Mar 21 01:34:14 PM PDT 24 |
860834828 ps |
| T847 |
/workspace/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.2222639186 |
|
|
Mar 21 01:34:09 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
81503448 ps |
| T848 |
/workspace/coverage/default/24.pwrmgr_stress_all_with_rand_reset.37260084 |
|
|
Mar 21 01:34:24 PM PDT 24 |
Mar 21 01:34:56 PM PDT 24 |
8951044879 ps |
| T849 |
/workspace/coverage/default/40.pwrmgr_stress_all_with_rand_reset.3075236390 |
|
|
Mar 21 01:35:13 PM PDT 24 |
Mar 21 01:35:22 PM PDT 24 |
3957855190 ps |
| T850 |
/workspace/coverage/default/2.pwrmgr_reset_invalid.255156105 |
|
|
Mar 21 01:33:13 PM PDT 24 |
Mar 21 01:33:15 PM PDT 24 |
115271598 ps |
| T851 |
/workspace/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.1762558692 |
|
|
Mar 21 01:34:06 PM PDT 24 |
Mar 21 01:34:09 PM PDT 24 |
99482932 ps |
| T852 |
/workspace/coverage/default/21.pwrmgr_wakeup.1574822043 |
|
|
Mar 21 01:34:11 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
240535482 ps |
| T853 |
/workspace/coverage/default/46.pwrmgr_wakeup.1467221132 |
|
|
Mar 21 01:35:26 PM PDT 24 |
Mar 21 01:35:27 PM PDT 24 |
178022637 ps |
| T854 |
/workspace/coverage/default/3.pwrmgr_wakeup.432202611 |
|
|
Mar 21 01:33:15 PM PDT 24 |
Mar 21 01:33:16 PM PDT 24 |
67544134 ps |
| T27 |
/workspace/coverage/default/3.pwrmgr_sec_cm.246071980 |
|
|
Mar 21 01:33:16 PM PDT 24 |
Mar 21 01:33:19 PM PDT 24 |
679289812 ps |
| T855 |
/workspace/coverage/default/29.pwrmgr_reset_invalid.382777469 |
|
|
Mar 21 01:34:35 PM PDT 24 |
Mar 21 01:34:37 PM PDT 24 |
106750791 ps |
| T856 |
/workspace/coverage/default/49.pwrmgr_reset.618598679 |
|
|
Mar 21 01:35:33 PM PDT 24 |
Mar 21 01:35:34 PM PDT 24 |
83652718 ps |
| T857 |
/workspace/coverage/default/33.pwrmgr_global_esc.813609849 |
|
|
Mar 21 01:35:03 PM PDT 24 |
Mar 21 01:35:05 PM PDT 24 |
36645648 ps |
| T858 |
/workspace/coverage/default/1.pwrmgr_sec_cm_ctrl_config_regwen.3522766946 |
|
|
Mar 21 01:33:07 PM PDT 24 |
Mar 21 01:33:09 PM PDT 24 |
157408843 ps |
| T859 |
/workspace/coverage/default/9.pwrmgr_esc_clk_rst_malfunc.2725840117 |
|
|
Mar 21 01:33:36 PM PDT 24 |
Mar 21 01:33:37 PM PDT 24 |
33183694 ps |
| T860 |
/workspace/coverage/default/32.pwrmgr_wakeup_reset.212600852 |
|
|
Mar 21 01:34:49 PM PDT 24 |
Mar 21 01:34:52 PM PDT 24 |
139927340 ps |
| T861 |
/workspace/coverage/default/48.pwrmgr_escalation_timeout.2046869875 |
|
|
Mar 21 01:35:46 PM PDT 24 |
Mar 21 01:35:47 PM PDT 24 |
468415679 ps |
| T862 |
/workspace/coverage/default/30.pwrmgr_aborted_low_power.111777911 |
|
|
Mar 21 01:34:48 PM PDT 24 |
Mar 21 01:34:50 PM PDT 24 |
39205050 ps |
| T863 |
/workspace/coverage/default/48.pwrmgr_stress_all_with_rand_reset.2503180852 |
|
|
Mar 21 01:35:53 PM PDT 24 |
Mar 21 01:36:11 PM PDT 24 |
6386710235 ps |
| T864 |
/workspace/coverage/default/13.pwrmgr_disable_rom_integrity_check.302125584 |
|
|
Mar 21 01:33:44 PM PDT 24 |
Mar 21 01:33:44 PM PDT 24 |
64820936 ps |
| T865 |
/workspace/coverage/default/35.pwrmgr_glitch.3251057128 |
|
|
Mar 21 01:35:12 PM PDT 24 |
Mar 21 01:35:14 PM PDT 24 |
250781517 ps |
| T866 |
/workspace/coverage/default/1.pwrmgr_lowpower_wakeup_race.2138160093 |
|
|
Mar 21 01:33:05 PM PDT 24 |
Mar 21 01:33:06 PM PDT 24 |
244884864 ps |
| T867 |
/workspace/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4292185318 |
|
|
Mar 21 01:35:11 PM PDT 24 |
Mar 21 01:35:13 PM PDT 24 |
1141349987 ps |
| T868 |
/workspace/coverage/default/28.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4025272000 |
|
|
Mar 21 01:34:33 PM PDT 24 |
Mar 21 01:34:35 PM PDT 24 |
1202465267 ps |
| T869 |
/workspace/coverage/default/3.pwrmgr_lowpower_invalid.3035750188 |
|
|
Mar 21 01:33:16 PM PDT 24 |
Mar 21 01:33:17 PM PDT 24 |
42564972 ps |
| T870 |
/workspace/coverage/default/23.pwrmgr_wakeup_reset.1409892150 |
|
|
Mar 21 01:34:19 PM PDT 24 |
Mar 21 01:34:20 PM PDT 24 |
428277847 ps |
| T871 |
/workspace/coverage/default/1.pwrmgr_stress_all.2071149539 |
|
|
Mar 21 01:33:07 PM PDT 24 |
Mar 21 01:33:08 PM PDT 24 |
389172819 ps |
| T872 |
/workspace/coverage/default/41.pwrmgr_global_esc.117661515 |
|
|
Mar 21 01:35:13 PM PDT 24 |
Mar 21 01:35:14 PM PDT 24 |
25475166 ps |
| T873 |
/workspace/coverage/default/14.pwrmgr_wakeup_reset.1769087616 |
|
|
Mar 21 01:33:54 PM PDT 24 |
Mar 21 01:34:00 PM PDT 24 |
300384466 ps |
| T874 |
/workspace/coverage/default/49.pwrmgr_wakeup.4013042574 |
|
|
Mar 21 01:35:58 PM PDT 24 |
Mar 21 01:35:59 PM PDT 24 |
298406404 ps |
| T875 |
/workspace/coverage/default/45.pwrmgr_esc_clk_rst_malfunc.1699900426 |
|
|
Mar 21 01:35:44 PM PDT 24 |
Mar 21 01:35:46 PM PDT 24 |
30579756 ps |
| T876 |
/workspace/coverage/default/41.pwrmgr_escalation_timeout.4166668719 |
|
|
Mar 21 01:35:23 PM PDT 24 |
Mar 21 01:35:24 PM PDT 24 |
163101937 ps |
| T877 |
/workspace/coverage/default/24.pwrmgr_aborted_low_power.3263784688 |
|
|
Mar 21 01:34:28 PM PDT 24 |
Mar 21 01:34:29 PM PDT 24 |
40573450 ps |
| T878 |
/workspace/coverage/default/11.pwrmgr_reset_invalid.2303946543 |
|
|
Mar 21 01:33:44 PM PDT 24 |
Mar 21 01:33:49 PM PDT 24 |
117118915 ps |
| T879 |
/workspace/coverage/default/12.pwrmgr_global_esc.2572385927 |
|
|
Mar 21 01:33:43 PM PDT 24 |
Mar 21 01:33:44 PM PDT 24 |
47777093 ps |
| T880 |
/workspace/coverage/default/16.pwrmgr_reset.1589960116 |
|
|
Mar 21 01:33:55 PM PDT 24 |
Mar 21 01:34:01 PM PDT 24 |
22093566 ps |
| T881 |
/workspace/coverage/default/2.pwrmgr_sec_cm_rstmgr_intersig_mubi.1118676077 |
|
|
Mar 21 01:33:13 PM PDT 24 |
Mar 21 01:33:15 PM PDT 24 |
61988961 ps |
| T882 |
/workspace/coverage/default/6.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4284894601 |
|
|
Mar 21 01:33:26 PM PDT 24 |
Mar 21 01:33:30 PM PDT 24 |
794076827 ps |
| T883 |
/workspace/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.2472689491 |
|
|
Mar 21 01:34:53 PM PDT 24 |
Mar 21 01:34:55 PM PDT 24 |
229312578 ps |
| T884 |
/workspace/coverage/default/8.pwrmgr_lowpower_wakeup_race.3022689607 |
|
|
Mar 21 01:33:29 PM PDT 24 |
Mar 21 01:33:30 PM PDT 24 |
533930507 ps |
| T885 |
/workspace/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.999965627 |
|
|
Mar 21 01:33:06 PM PDT 24 |
Mar 21 01:33:07 PM PDT 24 |
30488063 ps |
| T886 |
/workspace/coverage/default/11.pwrmgr_lowpower_wakeup_race.3433667785 |
|
|
Mar 21 01:33:39 PM PDT 24 |
Mar 21 01:33:41 PM PDT 24 |
269317918 ps |
| T887 |
/workspace/coverage/default/39.pwrmgr_escalation_timeout.4120766982 |
|
|
Mar 21 01:35:11 PM PDT 24 |
Mar 21 01:35:12 PM PDT 24 |
633059116 ps |
| T888 |
/workspace/coverage/default/28.pwrmgr_sec_cm_rstmgr_intersig_mubi.556366885 |
|
|
Mar 21 01:34:28 PM PDT 24 |
Mar 21 01:34:29 PM PDT 24 |
376618535 ps |
| T889 |
/workspace/coverage/default/45.pwrmgr_global_esc.535599730 |
|
|
Mar 21 01:35:26 PM PDT 24 |
Mar 21 01:35:27 PM PDT 24 |
24096204 ps |
| T890 |
/workspace/coverage/default/38.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2971538715 |
|
|
Mar 21 01:35:15 PM PDT 24 |
Mar 21 01:35:18 PM PDT 24 |
817097756 ps |
| T891 |
/workspace/coverage/default/22.pwrmgr_sec_cm_ctrl_config_regwen.320121444 |
|
|
Mar 21 01:34:27 PM PDT 24 |
Mar 21 01:34:28 PM PDT 24 |
264936392 ps |
| T892 |
/workspace/coverage/default/24.pwrmgr_lowpower_wakeup_race.876805540 |
|
|
Mar 21 01:34:19 PM PDT 24 |
Mar 21 01:34:19 PM PDT 24 |
49030022 ps |
| T893 |
/workspace/coverage/default/30.pwrmgr_escalation_timeout.1157844685 |
|
|
Mar 21 01:34:48 PM PDT 24 |
Mar 21 01:34:50 PM PDT 24 |
162816521 ps |
| T894 |
/workspace/coverage/default/39.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1177497129 |
|
|
Mar 21 01:35:09 PM PDT 24 |
Mar 21 01:35:12 PM PDT 24 |
1478414882 ps |
| T895 |
/workspace/coverage/default/4.pwrmgr_sec_cm_ctrl_config_regwen.1181601555 |
|
|
Mar 21 01:33:15 PM PDT 24 |
Mar 21 01:33:16 PM PDT 24 |
106777535 ps |
| T896 |
/workspace/coverage/default/39.pwrmgr_sec_cm_rstmgr_intersig_mubi.2788569549 |
|
|
Mar 21 01:35:09 PM PDT 24 |
Mar 21 01:35:11 PM PDT 24 |
55958193 ps |
| T897 |
/workspace/coverage/default/36.pwrmgr_lowpower_invalid.282083268 |
|
|
Mar 21 01:35:05 PM PDT 24 |
Mar 21 01:35:06 PM PDT 24 |
45564685 ps |
| T898 |
/workspace/coverage/default/33.pwrmgr_smoke.3661988383 |
|
|
Mar 21 01:34:49 PM PDT 24 |
Mar 21 01:34:52 PM PDT 24 |
32064018 ps |
| T899 |
/workspace/coverage/default/7.pwrmgr_glitch.1730849607 |
|
|
Mar 21 01:33:24 PM PDT 24 |
Mar 21 01:33:25 PM PDT 24 |
46222058 ps |
| T900 |
/workspace/coverage/default/17.pwrmgr_sec_cm_ctrl_config_regwen.2566786198 |
|
|
Mar 21 01:33:56 PM PDT 24 |
Mar 21 01:34:03 PM PDT 24 |
53407612 ps |
| T901 |
/workspace/coverage/default/41.pwrmgr_reset.162231698 |
|
|
Mar 21 01:35:15 PM PDT 24 |
Mar 21 01:35:16 PM PDT 24 |
224906337 ps |
| T902 |
/workspace/coverage/default/13.pwrmgr_esc_clk_rst_malfunc.953032653 |
|
|
Mar 21 01:33:40 PM PDT 24 |
Mar 21 01:33:40 PM PDT 24 |
38504808 ps |
| T903 |
/workspace/coverage/default/25.pwrmgr_glitch.2653478352 |
|
|
Mar 21 01:34:31 PM PDT 24 |
Mar 21 01:34:32 PM PDT 24 |
48440059 ps |
| T904 |
/workspace/coverage/default/5.pwrmgr_escalation_timeout.249251842 |
|
|
Mar 21 01:33:28 PM PDT 24 |
Mar 21 01:33:29 PM PDT 24 |
627098708 ps |
| T905 |
/workspace/coverage/default/21.pwrmgr_global_esc.1652328868 |
|
|
Mar 21 01:34:10 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
48688074 ps |
| T906 |
/workspace/coverage/default/12.pwrmgr_glitch.1491747089 |
|
|
Mar 21 01:33:44 PM PDT 24 |
Mar 21 01:33:44 PM PDT 24 |
138680846 ps |
| T907 |
/workspace/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.1959946161 |
|
|
Mar 21 01:35:10 PM PDT 24 |
Mar 21 01:35:12 PM PDT 24 |
53489295 ps |
| T908 |
/workspace/coverage/default/34.pwrmgr_lowpower_wakeup_race.358565008 |
|
|
Mar 21 01:35:03 PM PDT 24 |
Mar 21 01:35:05 PM PDT 24 |
231762709 ps |
| T909 |
/workspace/coverage/default/41.pwrmgr_aborted_low_power.2213204475 |
|
|
Mar 21 01:35:20 PM PDT 24 |
Mar 21 01:35:21 PM PDT 24 |
32270831 ps |
| T910 |
/workspace/coverage/default/4.pwrmgr_global_esc.166112641 |
|
|
Mar 21 01:33:16 PM PDT 24 |
Mar 21 01:33:17 PM PDT 24 |
46323803 ps |
| T911 |
/workspace/coverage/default/16.pwrmgr_smoke.1538864554 |
|
|
Mar 21 01:34:00 PM PDT 24 |
Mar 21 01:34:05 PM PDT 24 |
133091274 ps |
| T912 |
/workspace/coverage/default/4.pwrmgr_lowpower_wakeup_race.1939663093 |
|
|
Mar 21 01:33:18 PM PDT 24 |
Mar 21 01:33:19 PM PDT 24 |
405904010 ps |
| T913 |
/workspace/coverage/default/10.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3164658304 |
|
|
Mar 21 01:33:37 PM PDT 24 |
Mar 21 01:33:40 PM PDT 24 |
904753434 ps |
| T914 |
/workspace/coverage/default/32.pwrmgr_disable_rom_integrity_check.3963479921 |
|
|
Mar 21 01:34:49 PM PDT 24 |
Mar 21 01:34:52 PM PDT 24 |
63093309 ps |
| T915 |
/workspace/coverage/default/1.pwrmgr_escalation_timeout.963068451 |
|
|
Mar 21 01:33:07 PM PDT 24 |
Mar 21 01:33:08 PM PDT 24 |
941198158 ps |
| T916 |
/workspace/coverage/default/48.pwrmgr_sec_cm_ctrl_config_regwen.1056459511 |
|
|
Mar 21 01:35:35 PM PDT 24 |
Mar 21 01:35:38 PM PDT 24 |
286447814 ps |
| T917 |
/workspace/coverage/default/12.pwrmgr_wakeup.2948558896 |
|
|
Mar 21 01:33:43 PM PDT 24 |
Mar 21 01:33:44 PM PDT 24 |
235199090 ps |
| T918 |
/workspace/coverage/default/0.pwrmgr_global_esc.4060592484 |
|
|
Mar 21 01:33:07 PM PDT 24 |
Mar 21 01:33:08 PM PDT 24 |
34003167 ps |
| T919 |
/workspace/coverage/default/7.pwrmgr_disable_rom_integrity_check.3668116833 |
|
|
Mar 21 01:33:34 PM PDT 24 |
Mar 21 01:33:34 PM PDT 24 |
85069686 ps |
| T920 |
/workspace/coverage/default/17.pwrmgr_lowpower_invalid.2650424152 |
|
|
Mar 21 01:34:06 PM PDT 24 |
Mar 21 01:34:09 PM PDT 24 |
83167209 ps |
| T921 |
/workspace/coverage/default/27.pwrmgr_lowpower_invalid.2021039191 |
|
|
Mar 21 01:34:33 PM PDT 24 |
Mar 21 01:34:34 PM PDT 24 |
76269607 ps |
| T74 |
/workspace/coverage/default/32.pwrmgr_stress_all_with_rand_reset.3239153073 |
|
|
Mar 21 01:35:03 PM PDT 24 |
Mar 21 01:35:17 PM PDT 24 |
3446835956 ps |
| T922 |
/workspace/coverage/default/0.pwrmgr_escalation_timeout.3835867686 |
|
|
Mar 21 01:33:05 PM PDT 24 |
Mar 21 01:33:06 PM PDT 24 |
848816764 ps |
| T923 |
/workspace/coverage/default/24.pwrmgr_glitch.3143653711 |
|
|
Mar 21 01:34:28 PM PDT 24 |
Mar 21 01:34:29 PM PDT 24 |
47428910 ps |
| T924 |
/workspace/coverage/default/20.pwrmgr_escalation_timeout.1428644265 |
|
|
Mar 21 01:34:08 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
213877716 ps |
| T925 |
/workspace/coverage/default/13.pwrmgr_lowpower_wakeup_race.1982764745 |
|
|
Mar 21 01:33:43 PM PDT 24 |
Mar 21 01:33:44 PM PDT 24 |
226566972 ps |
| T926 |
/workspace/coverage/default/24.pwrmgr_reset.688026666 |
|
|
Mar 21 01:34:19 PM PDT 24 |
Mar 21 01:34:20 PM PDT 24 |
25996440 ps |
| T927 |
/workspace/coverage/default/21.pwrmgr_esc_clk_rst_malfunc.1469189373 |
|
|
Mar 21 01:34:11 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
33565126 ps |
| T928 |
/workspace/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.2593887672 |
|
|
Mar 21 01:35:27 PM PDT 24 |
Mar 21 01:35:28 PM PDT 24 |
319475375 ps |
| T929 |
/workspace/coverage/default/20.pwrmgr_stress_all.2701200866 |
|
|
Mar 21 01:34:09 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
154074890 ps |
| T930 |
/workspace/coverage/default/21.pwrmgr_glitch.92856015 |
|
|
Mar 21 01:34:09 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
62016751 ps |
| T931 |
/workspace/coverage/default/15.pwrmgr_sec_cm_ctrl_config_regwen.445210173 |
|
|
Mar 21 01:33:55 PM PDT 24 |
Mar 21 01:34:01 PM PDT 24 |
42256018 ps |
| T932 |
/workspace/coverage/default/18.pwrmgr_stress_all_with_rand_reset.3935093724 |
|
|
Mar 21 01:34:09 PM PDT 24 |
Mar 21 01:34:31 PM PDT 24 |
5913072893 ps |
| T933 |
/workspace/coverage/default/36.pwrmgr_glitch.4084403108 |
|
|
Mar 21 01:35:18 PM PDT 24 |
Mar 21 01:35:19 PM PDT 24 |
54345569 ps |
| T934 |
/workspace/coverage/default/18.pwrmgr_aborted_low_power.2314186751 |
|
|
Mar 21 01:34:08 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
35715564 ps |
| T935 |
/workspace/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1791047971 |
|
|
Mar 21 01:34:52 PM PDT 24 |
Mar 21 01:34:55 PM PDT 24 |
916130594 ps |
| T936 |
/workspace/coverage/default/31.pwrmgr_disable_rom_integrity_check.3907165459 |
|
|
Mar 21 01:34:48 PM PDT 24 |
Mar 21 01:34:50 PM PDT 24 |
78947676 ps |
| T937 |
/workspace/coverage/default/46.pwrmgr_glitch.1865847446 |
|
|
Mar 21 01:35:28 PM PDT 24 |
Mar 21 01:35:29 PM PDT 24 |
53491229 ps |
| T938 |
/workspace/coverage/default/32.pwrmgr_sec_cm_ctrl_config_regwen.3860065777 |
|
|
Mar 21 01:34:52 PM PDT 24 |
Mar 21 01:34:53 PM PDT 24 |
401150434 ps |
| T939 |
/workspace/coverage/default/28.pwrmgr_reset.1391945871 |
|
|
Mar 21 01:34:40 PM PDT 24 |
Mar 21 01:34:41 PM PDT 24 |
99533825 ps |
| T940 |
/workspace/coverage/default/3.pwrmgr_global_esc.1927341281 |
|
|
Mar 21 01:33:13 PM PDT 24 |
Mar 21 01:33:14 PM PDT 24 |
68966970 ps |
| T941 |
/workspace/coverage/default/31.pwrmgr_wakeup.660408239 |
|
|
Mar 21 01:34:45 PM PDT 24 |
Mar 21 01:34:47 PM PDT 24 |
397675442 ps |
| T942 |
/workspace/coverage/default/6.pwrmgr_aborted_low_power.2981085795 |
|
|
Mar 21 01:33:25 PM PDT 24 |
Mar 21 01:33:25 PM PDT 24 |
48487577 ps |
| T943 |
/workspace/coverage/default/32.pwrmgr_lowpower_wakeup_race.3640627333 |
|
|
Mar 21 01:34:49 PM PDT 24 |
Mar 21 01:34:52 PM PDT 24 |
251451683 ps |
| T944 |
/workspace/coverage/default/12.pwrmgr_esc_clk_rst_malfunc.1029771277 |
|
|
Mar 21 01:33:43 PM PDT 24 |
Mar 21 01:33:43 PM PDT 24 |
38062351 ps |
| T945 |
/workspace/coverage/default/24.pwrmgr_global_esc.3908163294 |
|
|
Mar 21 01:34:28 PM PDT 24 |
Mar 21 01:34:28 PM PDT 24 |
95592790 ps |
| T946 |
/workspace/coverage/default/37.pwrmgr_reset_invalid.23164470 |
|
|
Mar 21 01:35:09 PM PDT 24 |
Mar 21 01:35:11 PM PDT 24 |
124718025 ps |
| T947 |
/workspace/coverage/default/0.pwrmgr_glitch.61314850 |
|
|
Mar 21 01:33:05 PM PDT 24 |
Mar 21 01:33:06 PM PDT 24 |
70297726 ps |
| T948 |
/workspace/coverage/default/33.pwrmgr_stress_all.2109320225 |
|
|
Mar 21 01:35:04 PM PDT 24 |
Mar 21 01:35:09 PM PDT 24 |
1888068092 ps |
| T949 |
/workspace/coverage/default/2.pwrmgr_lowpower_invalid.693159766 |
|
|
Mar 21 01:33:16 PM PDT 24 |
Mar 21 01:33:17 PM PDT 24 |
84476234 ps |
| T950 |
/workspace/coverage/default/33.pwrmgr_sec_cm_ctrl_config_regwen.1013894994 |
|
|
Mar 21 01:34:52 PM PDT 24 |
Mar 21 01:34:54 PM PDT 24 |
257867125 ps |
| T951 |
/workspace/coverage/default/37.pwrmgr_reset.2496862482 |
|
|
Mar 21 01:35:10 PM PDT 24 |
Mar 21 01:35:11 PM PDT 24 |
82721845 ps |
| T952 |
/workspace/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.1313332628 |
|
|
Mar 21 01:35:18 PM PDT 24 |
Mar 21 01:35:18 PM PDT 24 |
31463943 ps |
| T953 |
/workspace/coverage/default/32.pwrmgr_global_esc.1659712462 |
|
|
Mar 21 01:34:54 PM PDT 24 |
Mar 21 01:34:56 PM PDT 24 |
51464105 ps |
| T954 |
/workspace/coverage/default/33.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2884501328 |
|
|
Mar 21 01:34:48 PM PDT 24 |
Mar 21 01:34:53 PM PDT 24 |
867573624 ps |
| T955 |
/workspace/coverage/default/36.pwrmgr_esc_clk_rst_malfunc.591117565 |
|
|
Mar 21 01:35:05 PM PDT 24 |
Mar 21 01:35:06 PM PDT 24 |
44471471 ps |
| T956 |
/workspace/coverage/default/33.pwrmgr_disable_rom_integrity_check.3012165484 |
|
|
Mar 21 01:34:58 PM PDT 24 |
Mar 21 01:35:02 PM PDT 24 |
62397869 ps |
| T957 |
/workspace/coverage/default/7.pwrmgr_lowpower_invalid.2705680110 |
|
|
Mar 21 01:33:27 PM PDT 24 |
Mar 21 01:33:28 PM PDT 24 |
52207846 ps |
| T958 |
/workspace/coverage/default/35.pwrmgr_wakeup.1038990693 |
|
|
Mar 21 01:34:49 PM PDT 24 |
Mar 21 01:34:52 PM PDT 24 |
274248073 ps |
| T959 |
/workspace/coverage/default/19.pwrmgr_sec_cm_rstmgr_intersig_mubi.1398869495 |
|
|
Mar 21 01:34:09 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
337222714 ps |
| T960 |
/workspace/coverage/default/48.pwrmgr_lowpower_wakeup_race.3221273763 |
|
|
Mar 21 01:35:37 PM PDT 24 |
Mar 21 01:35:38 PM PDT 24 |
327072067 ps |
| T961 |
/workspace/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.558775882 |
|
|
Mar 21 01:33:15 PM PDT 24 |
Mar 21 01:33:17 PM PDT 24 |
2922767939 ps |
| T962 |
/workspace/coverage/default/25.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1062411386 |
|
|
Mar 21 01:34:30 PM PDT 24 |
Mar 21 01:34:33 PM PDT 24 |
804513140 ps |
| T963 |
/workspace/coverage/default/23.pwrmgr_wakeup.3127676505 |
|
|
Mar 21 01:34:22 PM PDT 24 |
Mar 21 01:34:26 PM PDT 24 |
215528525 ps |
| T964 |
/workspace/coverage/default/33.pwrmgr_wakeup.4019209424 |
|
|
Mar 21 01:34:50 PM PDT 24 |
Mar 21 01:34:52 PM PDT 24 |
185844941 ps |
| T965 |
/workspace/coverage/default/23.pwrmgr_glitch.3055758033 |
|
|
Mar 21 01:34:23 PM PDT 24 |
Mar 21 01:34:25 PM PDT 24 |
72735325 ps |
| T966 |
/workspace/coverage/default/27.pwrmgr_wakeup_reset.3635573968 |
|
|
Mar 21 01:34:39 PM PDT 24 |
Mar 21 01:34:40 PM PDT 24 |
323549806 ps |
| T967 |
/workspace/coverage/default/6.pwrmgr_glitch.3545798510 |
|
|
Mar 21 01:33:25 PM PDT 24 |
Mar 21 01:33:26 PM PDT 24 |
54149292 ps |
| T968 |
/workspace/coverage/default/20.pwrmgr_lowpower_wakeup_race.129483781 |
|
|
Mar 21 01:34:14 PM PDT 24 |
Mar 21 01:34:16 PM PDT 24 |
218064849 ps |
| T969 |
/workspace/coverage/default/25.pwrmgr_esc_clk_rst_malfunc.527562571 |
|
|
Mar 21 01:34:20 PM PDT 24 |
Mar 21 01:34:20 PM PDT 24 |
39293349 ps |
| T970 |
/workspace/coverage/default/31.pwrmgr_escalation_timeout.3713108996 |
|
|
Mar 21 01:34:48 PM PDT 24 |
Mar 21 01:34:50 PM PDT 24 |
165450191 ps |
| T971 |
/workspace/coverage/default/6.pwrmgr_esc_clk_rst_malfunc.1363344126 |
|
|
Mar 21 01:33:24 PM PDT 24 |
Mar 21 01:33:25 PM PDT 24 |
32726012 ps |
| T972 |
/workspace/coverage/default/22.pwrmgr_global_esc.4237643660 |
|
|
Mar 21 01:34:29 PM PDT 24 |
Mar 21 01:34:30 PM PDT 24 |
219471698 ps |
| T973 |
/workspace/coverage/default/9.pwrmgr_global_esc.699942486 |
|
|
Mar 21 01:33:34 PM PDT 24 |
Mar 21 01:33:35 PM PDT 24 |
30038934 ps |
| T974 |
/workspace/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2690334591 |
|
|
Mar 21 01:35:11 PM PDT 24 |
Mar 21 01:35:14 PM PDT 24 |
827808165 ps |
| T975 |
/workspace/coverage/default/2.pwrmgr_global_esc.1865741904 |
|
|
Mar 21 01:33:15 PM PDT 24 |
Mar 21 01:33:16 PM PDT 24 |
49305359 ps |
| T976 |
/workspace/coverage/default/20.pwrmgr_smoke.2594933236 |
|
|
Mar 21 01:34:08 PM PDT 24 |
Mar 21 01:34:11 PM PDT 24 |
64323742 ps |
| T977 |
/workspace/coverage/default/4.pwrmgr_wakeup_reset.2861749836 |
|
|
Mar 21 01:33:20 PM PDT 24 |
Mar 21 01:33:21 PM PDT 24 |
176682912 ps |
| T978 |
/workspace/coverage/default/32.pwrmgr_stress_all.3957922465 |
|
|
Mar 21 01:34:50 PM PDT 24 |
Mar 21 01:34:53 PM PDT 24 |
473371481 ps |
| T979 |
/workspace/coverage/default/6.pwrmgr_reset_invalid.3265412555 |
|
|
Mar 21 01:33:24 PM PDT 24 |
Mar 21 01:33:25 PM PDT 24 |
106935478 ps |
| T980 |
/workspace/coverage/default/28.pwrmgr_stress_all.629037036 |
|
|
Mar 21 01:34:29 PM PDT 24 |
Mar 21 01:34:36 PM PDT 24 |
1463447946 ps |
| T981 |
/workspace/coverage/default/29.pwrmgr_sec_cm_ctrl_config_regwen.2113586179 |
|
|
Mar 21 01:34:33 PM PDT 24 |
Mar 21 01:34:34 PM PDT 24 |
245938934 ps |
| T982 |
/workspace/coverage/default/27.pwrmgr_disable_rom_integrity_check.2543884220 |
|
|
Mar 21 01:34:29 PM PDT 24 |
Mar 21 01:34:30 PM PDT 24 |
84808872 ps |
| T983 |
/workspace/coverage/default/48.pwrmgr_reset_invalid.731177632 |
|
|
Mar 21 01:35:54 PM PDT 24 |
Mar 21 01:35:55 PM PDT 24 |
372802372 ps |
| T984 |
/workspace/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.4012668061 |
|
|
Mar 21 01:35:06 PM PDT 24 |
Mar 21 01:35:07 PM PDT 24 |
314515800 ps |
| T985 |
/workspace/coverage/default/44.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2361479209 |
|
|
Mar 21 01:35:20 PM PDT 24 |
Mar 21 01:35:22 PM PDT 24 |
850651906 ps |
| T986 |
/workspace/coverage/default/8.pwrmgr_sec_cm_rstmgr_intersig_mubi.359131807 |
|
|
Mar 21 01:33:26 PM PDT 24 |
Mar 21 01:33:27 PM PDT 24 |
123022247 ps |
| T987 |
/workspace/coverage/default/37.pwrmgr_wakeup_reset.4162877573 |
|
|
Mar 21 01:35:06 PM PDT 24 |
Mar 21 01:35:07 PM PDT 24 |
198310806 ps |
| T988 |
/workspace/coverage/default/39.pwrmgr_wakeup_reset.316469806 |
|
|
Mar 21 01:35:06 PM PDT 24 |
Mar 21 01:35:08 PM PDT 24 |
296881431 ps |
| T989 |
/workspace/coverage/default/19.pwrmgr_escalation_timeout.2329086292 |
|
|
Mar 21 01:34:09 PM PDT 24 |
Mar 21 01:34:12 PM PDT 24 |
588954209 ps |
| T990 |
/workspace/coverage/default/4.pwrmgr_glitch.1608440789 |
|
|
Mar 21 01:33:15 PM PDT 24 |
Mar 21 01:33:16 PM PDT 24 |
64137676 ps |
| T991 |
/workspace/coverage/default/10.pwrmgr_lowpower_wakeup_race.1177630085 |
|
|
Mar 21 01:33:52 PM PDT 24 |
Mar 21 01:33:54 PM PDT 24 |
113565110 ps |
| T992 |
/workspace/coverage/default/17.pwrmgr_wakeup_reset.266286275 |
|
|
Mar 21 01:33:58 PM PDT 24 |
Mar 21 01:34:03 PM PDT 24 |
391936430 ps |
| T993 |
/workspace/coverage/default/42.pwrmgr_stress_all.10274601 |
|
|
Mar 21 01:35:20 PM PDT 24 |
Mar 21 01:35:21 PM PDT 24 |
265744802 ps |
| T994 |
/workspace/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.4231744642 |
|
|
Mar 21 01:35:42 PM PDT 24 |
Mar 21 01:35:43 PM PDT 24 |
86510488 ps |
| T995 |
/workspace/coverage/default/40.pwrmgr_wakeup_reset.1388346304 |
|
|
Mar 21 01:35:05 PM PDT 24 |
Mar 21 01:35:06 PM PDT 24 |
293631597 ps |
| T996 |
/workspace/coverage/default/21.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2970838781 |
|
|
Mar 21 01:34:13 PM PDT 24 |
Mar 21 01:34:16 PM PDT 24 |
769810931 ps |
| T997 |
/workspace/coverage/default/4.pwrmgr_sec_cm_rstmgr_intersig_mubi.3165755600 |
|
|
Mar 21 01:33:13 PM PDT 24 |
Mar 21 01:33:14 PM PDT 24 |
164530600 ps |
| T998 |
/workspace/coverage/default/48.pwrmgr_wakeup.3702163865 |
|
|
Mar 21 01:35:34 PM PDT 24 |
Mar 21 01:35:37 PM PDT 24 |
114634816 ps |
| T999 |
/workspace/coverage/default/29.pwrmgr_lowpower_invalid.986460249 |
|
|
Mar 21 01:34:40 PM PDT 24 |
Mar 21 01:34:41 PM PDT 24 |
45992265 ps |
| T1000 |
/workspace/coverage/default/10.pwrmgr_disable_rom_integrity_check.2188716824 |
|
|
Mar 21 01:33:39 PM PDT 24 |
Mar 21 01:33:40 PM PDT 24 |
44200098 ps |
| T1001 |
/workspace/coverage/default/0.pwrmgr_reset.2205851036 |
|
|
Mar 21 01:33:03 PM PDT 24 |
Mar 21 01:33:04 PM PDT 24 |
80487752 ps |
| T1002 |
/workspace/coverage/default/20.pwrmgr_glitch.1156500090 |
|
|
Mar 21 01:34:12 PM PDT 24 |
Mar 21 01:34:13 PM PDT 24 |
57506218 ps |
| T1003 |
/workspace/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3894942595 |
|
|
Mar 21 01:35:22 PM PDT 24 |
Mar 21 01:35:25 PM PDT 24 |
821745959 ps |
| T62 |
/workspace/coverage/cover_reg_top/8.pwrmgr_same_csr_outstanding.3738991359 |
|
|
Mar 21 01:21:40 PM PDT 24 |
Mar 21 01:21:42 PM PDT 24 |
69024366 ps |
| T68 |
/workspace/coverage/cover_reg_top/46.pwrmgr_intr_test.1471205409 |
|
|
Mar 21 01:22:12 PM PDT 24 |
Mar 21 01:22:13 PM PDT 24 |
20036337 ps |
| T52 |
/workspace/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.1654751844 |
|
|
Mar 21 01:21:36 PM PDT 24 |
Mar 21 01:21:38 PM PDT 24 |
200942369 ps |
| T63 |
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.1957149101 |
|
|
Mar 21 01:21:39 PM PDT 24 |
Mar 21 01:21:42 PM PDT 24 |
47500938 ps |
| T144 |
/workspace/coverage/cover_reg_top/10.pwrmgr_csr_rw.1727612959 |
|
|
Mar 21 01:21:42 PM PDT 24 |
Mar 21 01:21:43 PM PDT 24 |
20077943 ps |
| T69 |
/workspace/coverage/cover_reg_top/15.pwrmgr_intr_test.190231199 |
|
|
Mar 21 01:21:53 PM PDT 24 |
Mar 21 01:21:54 PM PDT 24 |
16496296 ps |
| T145 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_rw.3811590060 |
|
|
Mar 21 01:21:41 PM PDT 24 |
Mar 21 01:21:43 PM PDT 24 |
51263087 ps |
| T123 |
/workspace/coverage/cover_reg_top/5.pwrmgr_same_csr_outstanding.2593715721 |
|
|
Mar 21 01:21:36 PM PDT 24 |
Mar 21 01:21:38 PM PDT 24 |
23195778 ps |
| T57 |
/workspace/coverage/cover_reg_top/18.pwrmgr_tl_errors.904004369 |
|
|
Mar 21 01:21:56 PM PDT 24 |
Mar 21 01:21:58 PM PDT 24 |
133148777 ps |
| T188 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.2842376436 |
|
|
Mar 21 01:21:34 PM PDT 24 |
Mar 21 01:21:35 PM PDT 24 |
62213158 ps |
| T70 |
/workspace/coverage/cover_reg_top/27.pwrmgr_intr_test.3021722574 |
|
|
Mar 21 01:21:57 PM PDT 24 |
Mar 21 01:21:58 PM PDT 24 |
36771142 ps |
| T182 |
/workspace/coverage/cover_reg_top/30.pwrmgr_intr_test.4052770219 |
|
|
Mar 21 01:21:59 PM PDT 24 |
Mar 21 01:22:00 PM PDT 24 |
47005721 ps |
| T124 |
/workspace/coverage/cover_reg_top/12.pwrmgr_same_csr_outstanding.2531591589 |
|
|
Mar 21 01:21:41 PM PDT 24 |
Mar 21 01:21:43 PM PDT 24 |
21761421 ps |
| T125 |
/workspace/coverage/cover_reg_top/5.pwrmgr_csr_rw.407912993 |
|
|
Mar 21 01:21:37 PM PDT 24 |
Mar 21 01:21:38 PM PDT 24 |
16443552 ps |
| T53 |
/workspace/coverage/cover_reg_top/18.pwrmgr_tl_intg_err.3542822525 |
|
|
Mar 21 01:21:56 PM PDT 24 |
Mar 21 01:21:58 PM PDT 24 |
105487139 ps |
| T73 |
/workspace/coverage/cover_reg_top/14.pwrmgr_csr_mem_rw_with_rand_reset.3165717135 |
|
|
Mar 21 01:21:43 PM PDT 24 |
Mar 21 01:21:44 PM PDT 24 |
143964442 ps |
| T183 |
/workspace/coverage/cover_reg_top/18.pwrmgr_intr_test.318591931 |
|
|
Mar 21 01:21:58 PM PDT 24 |
Mar 21 01:22:00 PM PDT 24 |
30470321 ps |
| T1004 |
/workspace/coverage/cover_reg_top/34.pwrmgr_intr_test.2473193624 |
|
|
Mar 21 01:21:56 PM PDT 24 |
Mar 21 01:21:57 PM PDT 24 |
53336903 ps |
| T126 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_rw.510404483 |
|
|
Mar 21 01:21:43 PM PDT 24 |
Mar 21 01:21:44 PM PDT 24 |
34059585 ps |
| T54 |
/workspace/coverage/cover_reg_top/1.pwrmgr_tl_errors.2632551535 |
|
|
Mar 21 01:21:34 PM PDT 24 |
Mar 21 01:21:35 PM PDT 24 |
28656565 ps |
| T1005 |
/workspace/coverage/cover_reg_top/49.pwrmgr_intr_test.3618226239 |
|
|
Mar 21 01:22:08 PM PDT 24 |
Mar 21 01:22:08 PM PDT 24 |
46865416 ps |
| T1006 |
/workspace/coverage/cover_reg_top/14.pwrmgr_intr_test.538814926 |
|
|
Mar 21 01:21:45 PM PDT 24 |
Mar 21 01:21:46 PM PDT 24 |
65499584 ps |
| T65 |
/workspace/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.1620897098 |
|
|
Mar 21 01:21:43 PM PDT 24 |
Mar 21 01:21:45 PM PDT 24 |
53070306 ps |
| T111 |
/workspace/coverage/cover_reg_top/18.pwrmgr_csr_rw.353145804 |
|
|
Mar 21 01:22:01 PM PDT 24 |
Mar 21 01:22:02 PM PDT 24 |
31403209 ps |
| T66 |
/workspace/coverage/cover_reg_top/13.pwrmgr_tl_errors.1695837895 |
|
|
Mar 21 01:21:42 PM PDT 24 |
Mar 21 01:21:44 PM PDT 24 |
270585907 ps |
| T186 |
/workspace/coverage/cover_reg_top/37.pwrmgr_intr_test.3083461497 |
|
|
Mar 21 01:22:03 PM PDT 24 |
Mar 21 01:22:03 PM PDT 24 |
48728093 ps |
| T76 |
/workspace/coverage/cover_reg_top/5.pwrmgr_csr_mem_rw_with_rand_reset.3330585564 |
|
|
Mar 21 01:21:41 PM PDT 24 |
Mar 21 01:21:42 PM PDT 24 |
65036820 ps |
| T127 |
/workspace/coverage/cover_reg_top/10.pwrmgr_same_csr_outstanding.1346262730 |
|
|
Mar 21 01:21:45 PM PDT 24 |
Mar 21 01:21:46 PM PDT 24 |
51791796 ps |
| T67 |
/workspace/coverage/cover_reg_top/16.pwrmgr_tl_errors.571965016 |
|
|
Mar 21 01:21:46 PM PDT 24 |
Mar 21 01:21:47 PM PDT 24 |
50971681 ps |
| T121 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.2630757856 |
|
|
Mar 21 01:21:33 PM PDT 24 |
Mar 21 01:21:36 PM PDT 24 |
73681917 ps |
| T58 |
/workspace/coverage/cover_reg_top/14.pwrmgr_tl_intg_err.1905026918 |
|
|
Mar 21 01:21:47 PM PDT 24 |
Mar 21 01:21:48 PM PDT 24 |
1916402814 ps |
| T1007 |
/workspace/coverage/cover_reg_top/11.pwrmgr_tl_errors.2816281340 |
|
|
Mar 21 01:21:44 PM PDT 24 |
Mar 21 01:21:46 PM PDT 24 |
129976300 ps |
| T128 |
/workspace/coverage/cover_reg_top/16.pwrmgr_same_csr_outstanding.2619608939 |
|
|
Mar 21 01:21:40 PM PDT 24 |
Mar 21 01:21:42 PM PDT 24 |
83809616 ps |
| T172 |
/workspace/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.895107156 |
|
|
Mar 21 01:21:40 PM PDT 24 |
Mar 21 01:21:42 PM PDT 24 |
240247939 ps |
| T129 |
/workspace/coverage/cover_reg_top/6.pwrmgr_same_csr_outstanding.3378343659 |
|
|
Mar 21 01:21:44 PM PDT 24 |
Mar 21 01:21:46 PM PDT 24 |
262123024 ps |
| T130 |
/workspace/coverage/cover_reg_top/15.pwrmgr_csr_rw.3938007680 |
|
|
Mar 21 01:21:46 PM PDT 24 |
Mar 21 01:21:46 PM PDT 24 |
19195479 ps |
| T1008 |
/workspace/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.4028728362 |
|
|
Mar 21 01:21:41 PM PDT 24 |
Mar 21 01:21:44 PM PDT 24 |
408831214 ps |
| T1009 |
/workspace/coverage/cover_reg_top/9.pwrmgr_same_csr_outstanding.1907869357 |
|
|
Mar 21 01:21:43 PM PDT 24 |
Mar 21 01:21:44 PM PDT 24 |
76752320 ps |
| T112 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.3050138766 |
|
|
Mar 21 01:21:38 PM PDT 24 |
Mar 21 01:21:39 PM PDT 24 |
21662473 ps |
| T184 |
/workspace/coverage/cover_reg_top/3.pwrmgr_intr_test.313702795 |
|
|
Mar 21 01:21:41 PM PDT 24 |
Mar 21 01:21:43 PM PDT 24 |
23947243 ps |
| T71 |
/workspace/coverage/cover_reg_top/17.pwrmgr_tl_intg_err.1289616345 |
|
|
Mar 21 01:21:59 PM PDT 24 |
Mar 21 01:22:02 PM PDT 24 |
206363074 ps |
| T185 |
/workspace/coverage/cover_reg_top/13.pwrmgr_intr_test.1747558305 |
|
|
Mar 21 01:21:41 PM PDT 24 |
Mar 21 01:21:42 PM PDT 24 |
21137526 ps |
| T1010 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_aliasing.2207435202 |
|
|
Mar 21 01:21:43 PM PDT 24 |
Mar 21 01:21:44 PM PDT 24 |
93354789 ps |
| T1011 |
/workspace/coverage/cover_reg_top/19.pwrmgr_csr_mem_rw_with_rand_reset.3320806145 |
|
|
Mar 21 01:21:59 PM PDT 24 |
Mar 21 01:22:01 PM PDT 24 |
48590884 ps |
| T1012 |
/workspace/coverage/cover_reg_top/16.pwrmgr_tl_intg_err.1261499055 |
|
|
Mar 21 01:21:45 PM PDT 24 |
Mar 21 01:21:46 PM PDT 24 |
234717063 ps |
| T1013 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.684396871 |
|
|
Mar 21 01:21:45 PM PDT 24 |
Mar 21 01:21:46 PM PDT 24 |
158210354 ps |
| T1014 |
/workspace/coverage/cover_reg_top/8.pwrmgr_csr_mem_rw_with_rand_reset.616160014 |
|
|
Mar 21 01:21:39 PM PDT 24 |
Mar 21 01:21:40 PM PDT 24 |
60909356 ps |
| T187 |
/workspace/coverage/cover_reg_top/9.pwrmgr_intr_test.1293524147 |
|
|
Mar 21 01:21:37 PM PDT 24 |
Mar 21 01:21:38 PM PDT 24 |
131523142 ps |
| T1015 |
/workspace/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.2485294724 |
|
|
Mar 21 01:21:45 PM PDT 24 |
Mar 21 01:21:45 PM PDT 24 |
77004710 ps |
| T1016 |
/workspace/coverage/cover_reg_top/19.pwrmgr_tl_intg_err.1993717710 |
|
|
Mar 21 01:21:57 PM PDT 24 |
Mar 21 01:21:59 PM PDT 24 |
101137070 ps |
| T1017 |
/workspace/coverage/cover_reg_top/25.pwrmgr_intr_test.3372734219 |
|
|
Mar 21 01:21:59 PM PDT 24 |
Mar 21 01:22:00 PM PDT 24 |
18625836 ps |