Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6908 |
1 |
|
|
T1 |
1 |
|
T2 |
15 |
|
T4 |
6 |
auto[1] |
19451 |
1 |
|
|
T2 |
17 |
|
T4 |
3 |
|
T5 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11818 |
1 |
|
|
T2 |
12 |
|
T4 |
5 |
|
T8 |
212 |
auto[1] |
14541 |
1 |
|
|
T1 |
1 |
|
T2 |
20 |
|
T4 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12466 |
1 |
|
|
T1 |
1 |
|
T2 |
11 |
|
T4 |
5 |
auto[1] |
13893 |
1 |
|
|
T2 |
21 |
|
T4 |
4 |
|
T5 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1598 |
1 |
|
|
T2 |
4 |
|
T4 |
2 |
|
T8 |
40 |
auto[0] |
auto[0] |
auto[1] |
1548 |
1 |
|
|
T2 |
3 |
|
T4 |
1 |
|
T8 |
34 |
auto[0] |
auto[1] |
auto[0] |
4490 |
1 |
|
|
T2 |
4 |
|
T4 |
1 |
|
T8 |
70 |
auto[0] |
auto[1] |
auto[1] |
4182 |
1 |
|
|
T2 |
1 |
|
T4 |
1 |
|
T8 |
68 |
auto[1] |
auto[0] |
auto[0] |
1601 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T8 |
38 |
auto[1] |
auto[0] |
auto[1] |
2161 |
1 |
|
|
T2 |
8 |
|
T4 |
1 |
|
T8 |
46 |
auto[1] |
auto[1] |
auto[0] |
4777 |
1 |
|
|
T2 |
3 |
|
T8 |
85 |
|
T9 |
4 |
auto[1] |
auto[1] |
auto[1] |
6002 |
1 |
|
|
T2 |
9 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6908 |
1 |
|
|
T1 |
1 |
|
T2 |
15 |
|
T4 |
6 |
auto[1] |
19451 |
1 |
|
|
T2 |
17 |
|
T4 |
3 |
|
T5 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11740 |
1 |
|
|
T2 |
15 |
|
T4 |
5 |
|
T8 |
211 |
auto[1] |
14619 |
1 |
|
|
T1 |
1 |
|
T2 |
17 |
|
T4 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12663 |
1 |
|
|
T2 |
22 |
|
T4 |
3 |
|
T8 |
233 |
auto[1] |
13696 |
1 |
|
|
T1 |
1 |
|
T2 |
10 |
|
T4 |
6 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1577 |
1 |
|
|
T2 |
5 |
|
T4 |
1 |
|
T8 |
28 |
auto[0] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T2 |
2 |
|
T4 |
3 |
|
T8 |
33 |
auto[0] |
auto[1] |
auto[0] |
4525 |
1 |
|
|
T2 |
5 |
|
T8 |
72 |
|
T9 |
6 |
auto[0] |
auto[1] |
auto[1] |
4134 |
1 |
|
|
T2 |
3 |
|
T4 |
1 |
|
T8 |
78 |
auto[1] |
auto[0] |
auto[0] |
1664 |
1 |
|
|
T2 |
5 |
|
T4 |
1 |
|
T8 |
51 |
auto[1] |
auto[0] |
auto[1] |
2163 |
1 |
|
|
T1 |
1 |
|
T2 |
3 |
|
T4 |
1 |
auto[1] |
auto[1] |
auto[0] |
4897 |
1 |
|
|
T2 |
7 |
|
T4 |
1 |
|
T8 |
82 |
auto[1] |
auto[1] |
auto[1] |
5895 |
1 |
|
|
T2 |
2 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6908 |
1 |
|
|
T1 |
1 |
|
T2 |
15 |
|
T4 |
6 |
auto[1] |
19451 |
1 |
|
|
T2 |
17 |
|
T4 |
3 |
|
T5 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11927 |
1 |
|
|
T1 |
1 |
|
T2 |
16 |
|
T4 |
2 |
auto[1] |
14432 |
1 |
|
|
T2 |
16 |
|
T4 |
7 |
|
T5 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12594 |
1 |
|
|
T1 |
1 |
|
T2 |
15 |
|
T4 |
5 |
auto[1] |
13765 |
1 |
|
|
T2 |
17 |
|
T4 |
4 |
|
T8 |
270 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1550 |
1 |
|
|
T1 |
1 |
|
T2 |
6 |
|
T4 |
1 |
auto[0] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T2 |
2 |
|
T8 |
38 |
|
T9 |
1 |
auto[0] |
auto[1] |
auto[0] |
4584 |
1 |
|
|
T2 |
2 |
|
T4 |
1 |
|
T8 |
80 |
auto[0] |
auto[1] |
auto[1] |
4137 |
1 |
|
|
T2 |
6 |
|
T8 |
69 |
|
T9 |
4 |
auto[1] |
auto[0] |
auto[0] |
1600 |
1 |
|
|
T2 |
3 |
|
T4 |
2 |
|
T8 |
33 |
auto[1] |
auto[0] |
auto[1] |
2102 |
1 |
|
|
T2 |
4 |
|
T4 |
3 |
|
T8 |
56 |
auto[1] |
auto[1] |
auto[0] |
4860 |
1 |
|
|
T2 |
4 |
|
T4 |
1 |
|
T5 |
1 |
auto[1] |
auto[1] |
auto[1] |
5870 |
1 |
|
|
T2 |
5 |
|
T4 |
1 |
|
T8 |
107 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6908 |
1 |
|
|
T1 |
1 |
|
T2 |
15 |
|
T4 |
6 |
auto[1] |
19451 |
1 |
|
|
T2 |
17 |
|
T4 |
3 |
|
T5 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11951 |
1 |
|
|
T1 |
1 |
|
T2 |
10 |
|
T4 |
6 |
auto[1] |
14408 |
1 |
|
|
T2 |
22 |
|
T4 |
3 |
|
T5 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12520 |
1 |
|
|
T1 |
1 |
|
T2 |
17 |
|
T4 |
4 |
auto[1] |
13839 |
1 |
|
|
T2 |
15 |
|
T4 |
5 |
|
T5 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1584 |
1 |
|
|
T1 |
1 |
|
T2 |
4 |
|
T8 |
39 |
auto[0] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T2 |
1 |
|
T4 |
3 |
|
T8 |
33 |
auto[0] |
auto[1] |
auto[0] |
4629 |
1 |
|
|
T2 |
3 |
|
T4 |
3 |
|
T8 |
84 |
auto[0] |
auto[1] |
auto[1] |
4170 |
1 |
|
|
T2 |
2 |
|
T8 |
66 |
|
T9 |
5 |
auto[1] |
auto[0] |
auto[0] |
1640 |
1 |
|
|
T2 |
5 |
|
T4 |
1 |
|
T8 |
35 |
auto[1] |
auto[0] |
auto[1] |
2116 |
1 |
|
|
T2 |
5 |
|
T4 |
2 |
|
T8 |
51 |
auto[1] |
auto[1] |
auto[0] |
4667 |
1 |
|
|
T2 |
5 |
|
T8 |
89 |
|
T9 |
2 |
auto[1] |
auto[1] |
auto[1] |
5985 |
1 |
|
|
T2 |
7 |
|
T5 |
1 |
|
T8 |
94 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6908 |
1 |
|
|
T1 |
1 |
|
T2 |
15 |
|
T4 |
6 |
auto[1] |
19451 |
1 |
|
|
T2 |
17 |
|
T4 |
3 |
|
T5 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11866 |
1 |
|
|
T2 |
12 |
|
T4 |
7 |
|
T8 |
229 |
auto[1] |
14493 |
1 |
|
|
T1 |
1 |
|
T2 |
20 |
|
T4 |
2 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12469 |
1 |
|
|
T2 |
14 |
|
T4 |
5 |
|
T5 |
1 |
auto[1] |
13890 |
1 |
|
|
T1 |
1 |
|
T2 |
18 |
|
T4 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1590 |
1 |
|
|
T2 |
3 |
|
T4 |
2 |
|
T8 |
34 |
auto[0] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T2 |
3 |
|
T4 |
3 |
|
T8 |
39 |
auto[0] |
auto[1] |
auto[0] |
4447 |
1 |
|
|
T2 |
1 |
|
T4 |
2 |
|
T8 |
75 |
auto[0] |
auto[1] |
auto[1] |
4246 |
1 |
|
|
T2 |
5 |
|
T8 |
81 |
|
T9 |
1 |
auto[1] |
auto[0] |
auto[0] |
1561 |
1 |
|
|
T2 |
4 |
|
T4 |
1 |
|
T8 |
43 |
auto[1] |
auto[0] |
auto[1] |
2174 |
1 |
|
|
T1 |
1 |
|
T2 |
5 |
|
T8 |
42 |
auto[1] |
auto[1] |
auto[0] |
4871 |
1 |
|
|
T2 |
6 |
|
T5 |
1 |
|
T8 |
83 |
auto[1] |
auto[1] |
auto[1] |
5887 |
1 |
|
|
T2 |
5 |
|
T4 |
1 |
|
T8 |
94 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
6908 |
1 |
|
|
T1 |
1 |
|
T2 |
15 |
|
T4 |
6 |
auto[1] |
19451 |
1 |
|
|
T2 |
17 |
|
T4 |
3 |
|
T5 |
1 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
11956 |
1 |
|
|
T2 |
15 |
|
T4 |
4 |
|
T8 |
221 |
auto[1] |
14403 |
1 |
|
|
T1 |
1 |
|
T2 |
17 |
|
T4 |
5 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12605 |
1 |
|
|
T1 |
1 |
|
T2 |
15 |
|
T4 |
4 |
auto[1] |
13754 |
1 |
|
|
T2 |
17 |
|
T4 |
5 |
|
T5 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1645 |
1 |
|
|
T2 |
4 |
|
T4 |
2 |
|
T8 |
31 |
auto[0] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T2 |
3 |
|
T8 |
41 |
|
T13 |
29 |
auto[0] |
auto[1] |
auto[0] |
4605 |
1 |
|
|
T2 |
4 |
|
T4 |
1 |
|
T8 |
78 |
auto[0] |
auto[1] |
auto[1] |
4144 |
1 |
|
|
T2 |
4 |
|
T4 |
1 |
|
T8 |
71 |
auto[1] |
auto[0] |
auto[0] |
1562 |
1 |
|
|
T1 |
1 |
|
T2 |
4 |
|
T4 |
1 |
auto[1] |
auto[0] |
auto[1] |
2139 |
1 |
|
|
T2 |
4 |
|
T4 |
3 |
|
T8 |
47 |
auto[1] |
auto[1] |
auto[0] |
4793 |
1 |
|
|
T2 |
3 |
|
T8 |
76 |
|
T9 |
3 |
auto[1] |
auto[1] |
auto[1] |
5909 |
1 |
|
|
T2 |
6 |
|
T4 |
1 |
|
T5 |
1 |