| T803 |
/workspace/coverage/default/42.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.455572491 |
|
|
Mar 28 01:26:10 PM PDT 24 |
Mar 28 01:26:13 PM PDT 24 |
808921138 ps |
| T804 |
/workspace/coverage/default/28.pwrmgr_reset_invalid.3612941130 |
|
|
Mar 28 01:25:05 PM PDT 24 |
Mar 28 01:25:06 PM PDT 24 |
113036594 ps |
| T805 |
/workspace/coverage/default/32.pwrmgr_stress_all.3960102603 |
|
|
Mar 28 01:25:35 PM PDT 24 |
Mar 28 01:25:38 PM PDT 24 |
5047297440 ps |
| T806 |
/workspace/coverage/default/27.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3751721731 |
|
|
Mar 28 01:24:48 PM PDT 24 |
Mar 28 01:24:50 PM PDT 24 |
1017045748 ps |
| T807 |
/workspace/coverage/default/39.pwrmgr_smoke.3736037685 |
|
|
Mar 28 01:25:55 PM PDT 24 |
Mar 28 01:25:57 PM PDT 24 |
30825370 ps |
| T808 |
/workspace/coverage/default/7.pwrmgr_reset_invalid.3171715480 |
|
|
Mar 28 01:22:45 PM PDT 24 |
Mar 28 01:22:47 PM PDT 24 |
128817186 ps |
| T809 |
/workspace/coverage/default/29.pwrmgr_lowpower_invalid.2513256217 |
|
|
Mar 28 01:25:09 PM PDT 24 |
Mar 28 01:25:10 PM PDT 24 |
46585699 ps |
| T810 |
/workspace/coverage/default/40.pwrmgr_sec_cm_rstmgr_intersig_mubi.1024316544 |
|
|
Mar 28 01:26:10 PM PDT 24 |
Mar 28 01:26:11 PM PDT 24 |
52690896 ps |
| T811 |
/workspace/coverage/default/5.pwrmgr_sec_cm_rstmgr_intersig_mubi.1829508424 |
|
|
Mar 28 01:22:31 PM PDT 24 |
Mar 28 01:22:32 PM PDT 24 |
53385153 ps |
| T812 |
/workspace/coverage/default/43.pwrmgr_wakeup_reset.2094264177 |
|
|
Mar 28 01:26:08 PM PDT 24 |
Mar 28 01:26:09 PM PDT 24 |
111456793 ps |
| T813 |
/workspace/coverage/default/39.pwrmgr_stress_all_with_rand_reset.3342010829 |
|
|
Mar 28 01:26:09 PM PDT 24 |
Mar 28 01:26:50 PM PDT 24 |
13486939669 ps |
| T814 |
/workspace/coverage/default/23.pwrmgr_global_esc.4058828913 |
|
|
Mar 28 01:24:31 PM PDT 24 |
Mar 28 01:24:32 PM PDT 24 |
46161775 ps |
| T815 |
/workspace/coverage/default/10.pwrmgr_sec_cm_ctrl_config_regwen.4096013028 |
|
|
Mar 28 01:23:18 PM PDT 24 |
Mar 28 01:23:19 PM PDT 24 |
298179922 ps |
| T816 |
/workspace/coverage/default/41.pwrmgr_sec_cm_ctrl_config_regwen.1216751726 |
|
|
Mar 28 01:26:10 PM PDT 24 |
Mar 28 01:26:11 PM PDT 24 |
818265316 ps |
| T817 |
/workspace/coverage/default/22.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3529488890 |
|
|
Mar 28 01:24:31 PM PDT 24 |
Mar 28 01:24:33 PM PDT 24 |
1286011482 ps |
| T818 |
/workspace/coverage/default/33.pwrmgr_lowpower_invalid.1697685765 |
|
|
Mar 28 01:25:30 PM PDT 24 |
Mar 28 01:25:30 PM PDT 24 |
54567183 ps |
| T819 |
/workspace/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3498384128 |
|
|
Mar 28 01:23:23 PM PDT 24 |
Mar 28 01:23:26 PM PDT 24 |
1926791951 ps |
| T820 |
/workspace/coverage/default/37.pwrmgr_smoke.320719432 |
|
|
Mar 28 01:25:53 PM PDT 24 |
Mar 28 01:25:55 PM PDT 24 |
34010301 ps |
| T821 |
/workspace/coverage/default/48.pwrmgr_esc_clk_rst_malfunc.2168182964 |
|
|
Mar 28 01:26:27 PM PDT 24 |
Mar 28 01:26:28 PM PDT 24 |
30075831 ps |
| T822 |
/workspace/coverage/default/42.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4005805207 |
|
|
Mar 28 01:26:11 PM PDT 24 |
Mar 28 01:26:14 PM PDT 24 |
1170950600 ps |
| T823 |
/workspace/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.50044793 |
|
|
Mar 28 01:24:16 PM PDT 24 |
Mar 28 01:24:19 PM PDT 24 |
782636623 ps |
| T824 |
/workspace/coverage/default/19.pwrmgr_sec_cm_ctrl_config_regwen.979212068 |
|
|
Mar 28 01:24:16 PM PDT 24 |
Mar 28 01:24:17 PM PDT 24 |
123078708 ps |
| T825 |
/workspace/coverage/default/36.pwrmgr_reset.1817886606 |
|
|
Mar 28 01:25:53 PM PDT 24 |
Mar 28 01:25:54 PM PDT 24 |
90604458 ps |
| T826 |
/workspace/coverage/default/0.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3560219933 |
|
|
Mar 28 01:21:28 PM PDT 24 |
Mar 28 01:21:31 PM PDT 24 |
1238877290 ps |
| T827 |
/workspace/coverage/default/4.pwrmgr_wakeup_reset.722729789 |
|
|
Mar 28 01:22:18 PM PDT 24 |
Mar 28 01:22:20 PM PDT 24 |
249276308 ps |
| T828 |
/workspace/coverage/default/39.pwrmgr_sec_cm_ctrl_config_regwen.3083679711 |
|
|
Mar 28 01:25:57 PM PDT 24 |
Mar 28 01:25:59 PM PDT 24 |
241134037 ps |
| T829 |
/workspace/coverage/default/7.pwrmgr_esc_clk_rst_malfunc.2715278005 |
|
|
Mar 28 01:22:47 PM PDT 24 |
Mar 28 01:22:48 PM PDT 24 |
31898641 ps |
| T830 |
/workspace/coverage/default/7.pwrmgr_disable_rom_integrity_check.4134727040 |
|
|
Mar 28 01:22:43 PM PDT 24 |
Mar 28 01:22:44 PM PDT 24 |
63795295 ps |
| T831 |
/workspace/coverage/default/38.pwrmgr_wakeup_reset.1393323351 |
|
|
Mar 28 01:25:55 PM PDT 24 |
Mar 28 01:25:57 PM PDT 24 |
146673143 ps |
| T832 |
/workspace/coverage/default/42.pwrmgr_esc_clk_rst_malfunc.4224509260 |
|
|
Mar 28 01:26:08 PM PDT 24 |
Mar 28 01:26:09 PM PDT 24 |
28021741 ps |
| T833 |
/workspace/coverage/default/39.pwrmgr_stress_all.3811129651 |
|
|
Mar 28 01:26:04 PM PDT 24 |
Mar 28 01:26:08 PM PDT 24 |
891439084 ps |
| T834 |
/workspace/coverage/default/17.pwrmgr_sec_cm_rstmgr_intersig_mubi.2431300506 |
|
|
Mar 28 01:23:54 PM PDT 24 |
Mar 28 01:23:55 PM PDT 24 |
67199414 ps |
| T835 |
/workspace/coverage/default/3.pwrmgr_wakeup_reset.3067100448 |
|
|
Mar 28 01:22:18 PM PDT 24 |
Mar 28 01:22:20 PM PDT 24 |
146973354 ps |
| T836 |
/workspace/coverage/default/4.pwrmgr_escalation_timeout.2958115448 |
|
|
Mar 28 01:22:33 PM PDT 24 |
Mar 28 01:22:34 PM PDT 24 |
162693676 ps |
| T837 |
/workspace/coverage/default/43.pwrmgr_reset_invalid.3215539934 |
|
|
Mar 28 01:26:25 PM PDT 24 |
Mar 28 01:26:27 PM PDT 24 |
252559432 ps |
| T838 |
/workspace/coverage/default/13.pwrmgr_smoke.1946647263 |
|
|
Mar 28 01:23:37 PM PDT 24 |
Mar 28 01:23:38 PM PDT 24 |
52548836 ps |
| T839 |
/workspace/coverage/default/26.pwrmgr_glitch.2590408455 |
|
|
Mar 28 01:24:44 PM PDT 24 |
Mar 28 01:24:46 PM PDT 24 |
49411218 ps |
| T840 |
/workspace/coverage/default/9.pwrmgr_reset_invalid.3765651641 |
|
|
Mar 28 01:23:17 PM PDT 24 |
Mar 28 01:23:18 PM PDT 24 |
167061944 ps |
| T841 |
/workspace/coverage/default/35.pwrmgr_escalation_timeout.3177428908 |
|
|
Mar 28 01:25:35 PM PDT 24 |
Mar 28 01:25:36 PM PDT 24 |
214565712 ps |
| T842 |
/workspace/coverage/default/34.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3007818621 |
|
|
Mar 28 01:25:25 PM PDT 24 |
Mar 28 01:25:28 PM PDT 24 |
794035234 ps |
| T843 |
/workspace/coverage/default/1.pwrmgr_smoke.1162889620 |
|
|
Mar 28 01:21:54 PM PDT 24 |
Mar 28 01:21:55 PM PDT 24 |
62094334 ps |
| T844 |
/workspace/coverage/default/15.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4231698894 |
|
|
Mar 28 01:24:02 PM PDT 24 |
Mar 28 01:24:05 PM PDT 24 |
891406208 ps |
| T845 |
/workspace/coverage/default/47.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4081224634 |
|
|
Mar 28 01:26:33 PM PDT 24 |
Mar 28 01:26:35 PM PDT 24 |
2513926344 ps |
| T846 |
/workspace/coverage/default/10.pwrmgr_escalation_timeout.4250223999 |
|
|
Mar 28 01:23:20 PM PDT 24 |
Mar 28 01:23:21 PM PDT 24 |
159998790 ps |
| T36 |
/workspace/coverage/default/23.pwrmgr_stress_all_with_rand_reset.1371578350 |
|
|
Mar 28 01:24:32 PM PDT 24 |
Mar 28 01:24:58 PM PDT 24 |
8091593261 ps |
| T847 |
/workspace/coverage/default/38.pwrmgr_wakeup.2869574141 |
|
|
Mar 28 01:25:55 PM PDT 24 |
Mar 28 01:25:57 PM PDT 24 |
569249610 ps |
| T848 |
/workspace/coverage/default/40.pwrmgr_glitch.636691833 |
|
|
Mar 28 01:26:05 PM PDT 24 |
Mar 28 01:26:06 PM PDT 24 |
65466730 ps |
| T849 |
/workspace/coverage/default/22.pwrmgr_lowpower_invalid.4244434671 |
|
|
Mar 28 01:24:29 PM PDT 24 |
Mar 28 01:24:30 PM PDT 24 |
45257595 ps |
| T850 |
/workspace/coverage/default/5.pwrmgr_wakeup.1991446361 |
|
|
Mar 28 01:22:31 PM PDT 24 |
Mar 28 01:22:32 PM PDT 24 |
192023590 ps |
| T851 |
/workspace/coverage/default/42.pwrmgr_glitch.1230648393 |
|
|
Mar 28 01:26:07 PM PDT 24 |
Mar 28 01:26:08 PM PDT 24 |
59680487 ps |
| T852 |
/workspace/coverage/default/1.pwrmgr_global_esc.2780251824 |
|
|
Mar 28 01:21:44 PM PDT 24 |
Mar 28 01:21:45 PM PDT 24 |
45703533 ps |
| T853 |
/workspace/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.1712969737 |
|
|
Mar 28 01:26:18 PM PDT 24 |
Mar 28 01:26:20 PM PDT 24 |
144044201 ps |
| T854 |
/workspace/coverage/default/40.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1677477231 |
|
|
Mar 28 01:26:06 PM PDT 24 |
Mar 28 01:26:09 PM PDT 24 |
823690475 ps |
| T855 |
/workspace/coverage/default/43.pwrmgr_lowpower_invalid.1284805552 |
|
|
Mar 28 01:26:29 PM PDT 24 |
Mar 28 01:26:30 PM PDT 24 |
52009172 ps |
| T856 |
/workspace/coverage/default/6.pwrmgr_lowpower_wakeup_race.2198266059 |
|
|
Mar 28 01:22:31 PM PDT 24 |
Mar 28 01:22:32 PM PDT 24 |
150036744 ps |
| T857 |
/workspace/coverage/default/49.pwrmgr_wakeup.78246714 |
|
|
Mar 28 01:26:40 PM PDT 24 |
Mar 28 01:26:40 PM PDT 24 |
114145097 ps |
| T858 |
/workspace/coverage/default/23.pwrmgr_wakeup_reset.3932430530 |
|
|
Mar 28 01:24:30 PM PDT 24 |
Mar 28 01:24:32 PM PDT 24 |
402540350 ps |
| T859 |
/workspace/coverage/default/41.pwrmgr_wakeup.75953090 |
|
|
Mar 28 01:26:08 PM PDT 24 |
Mar 28 01:26:09 PM PDT 24 |
108860091 ps |
| T860 |
/workspace/coverage/default/30.pwrmgr_sec_cm_ctrl_config_regwen.3902905906 |
|
|
Mar 28 01:25:24 PM PDT 24 |
Mar 28 01:25:25 PM PDT 24 |
152167917 ps |
| T861 |
/workspace/coverage/default/16.pwrmgr_smoke.2697425247 |
|
|
Mar 28 01:23:57 PM PDT 24 |
Mar 28 01:23:58 PM PDT 24 |
28133313 ps |
| T862 |
/workspace/coverage/default/46.pwrmgr_smoke.1813769980 |
|
|
Mar 28 01:26:23 PM PDT 24 |
Mar 28 01:26:24 PM PDT 24 |
30690218 ps |
| T863 |
/workspace/coverage/default/23.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2935551669 |
|
|
Mar 28 01:24:29 PM PDT 24 |
Mar 28 01:24:32 PM PDT 24 |
882775116 ps |
| T864 |
/workspace/coverage/default/33.pwrmgr_wakeup.49875489 |
|
|
Mar 28 01:25:33 PM PDT 24 |
Mar 28 01:25:34 PM PDT 24 |
91343423 ps |
| T865 |
/workspace/coverage/default/42.pwrmgr_stress_all.2004551231 |
|
|
Mar 28 01:26:15 PM PDT 24 |
Mar 28 01:26:17 PM PDT 24 |
296830418 ps |
| T866 |
/workspace/coverage/default/8.pwrmgr_glitch.3589636846 |
|
|
Mar 28 01:23:01 PM PDT 24 |
Mar 28 01:23:02 PM PDT 24 |
174614363 ps |
| T867 |
/workspace/coverage/default/0.pwrmgr_smoke.2550521884 |
|
|
Mar 28 01:21:30 PM PDT 24 |
Mar 28 01:21:30 PM PDT 24 |
40884512 ps |
| T868 |
/workspace/coverage/default/16.pwrmgr_lowpower_wakeup_race.3556943217 |
|
|
Mar 28 01:24:01 PM PDT 24 |
Mar 28 01:24:02 PM PDT 24 |
312310761 ps |
| T869 |
/workspace/coverage/default/2.pwrmgr_escalation_timeout.1000088217 |
|
|
Mar 28 01:22:00 PM PDT 24 |
Mar 28 01:22:01 PM PDT 24 |
608776815 ps |
| T870 |
/workspace/coverage/default/23.pwrmgr_sec_cm_ctrl_config_regwen.2070905816 |
|
|
Mar 28 01:24:31 PM PDT 24 |
Mar 28 01:24:32 PM PDT 24 |
183266687 ps |
| T871 |
/workspace/coverage/default/7.pwrmgr_aborted_low_power.2757379613 |
|
|
Mar 28 01:22:46 PM PDT 24 |
Mar 28 01:22:48 PM PDT 24 |
67407831 ps |
| T872 |
/workspace/coverage/default/26.pwrmgr_global_esc.4195484117 |
|
|
Mar 28 01:24:51 PM PDT 24 |
Mar 28 01:24:52 PM PDT 24 |
136365845 ps |
| T873 |
/workspace/coverage/default/24.pwrmgr_smoke.3821218903 |
|
|
Mar 28 01:24:33 PM PDT 24 |
Mar 28 01:24:34 PM PDT 24 |
28805820 ps |
| T874 |
/workspace/coverage/default/47.pwrmgr_lowpower_wakeup_race.1150715875 |
|
|
Mar 28 01:26:30 PM PDT 24 |
Mar 28 01:26:31 PM PDT 24 |
180752740 ps |
| T875 |
/workspace/coverage/default/1.pwrmgr_stress_all.3721919720 |
|
|
Mar 28 01:21:46 PM PDT 24 |
Mar 28 01:21:49 PM PDT 24 |
581664415 ps |
| T876 |
/workspace/coverage/default/26.pwrmgr_disable_rom_integrity_check.1387539097 |
|
|
Mar 28 01:24:46 PM PDT 24 |
Mar 28 01:24:47 PM PDT 24 |
58562238 ps |
| T877 |
/workspace/coverage/default/3.pwrmgr_lowpower_wakeup_race.4226641243 |
|
|
Mar 28 01:22:17 PM PDT 24 |
Mar 28 01:22:18 PM PDT 24 |
263849687 ps |
| T148 |
/workspace/coverage/default/42.pwrmgr_disable_rom_integrity_check.2562645963 |
|
|
Mar 28 01:26:11 PM PDT 24 |
Mar 28 01:26:12 PM PDT 24 |
67073254 ps |
| T878 |
/workspace/coverage/default/45.pwrmgr_stress_all_with_rand_reset.3575835469 |
|
|
Mar 28 01:26:23 PM PDT 24 |
Mar 28 01:26:56 PM PDT 24 |
8813876281 ps |
| T879 |
/workspace/coverage/default/33.pwrmgr_glitch.1568909001 |
|
|
Mar 28 01:25:28 PM PDT 24 |
Mar 28 01:25:29 PM PDT 24 |
100071670 ps |
| T880 |
/workspace/coverage/default/38.pwrmgr_lowpower_invalid.1062695503 |
|
|
Mar 28 01:25:55 PM PDT 24 |
Mar 28 01:25:57 PM PDT 24 |
77160299 ps |
| T881 |
/workspace/coverage/default/6.pwrmgr_glitch.2084091484 |
|
|
Mar 28 01:22:47 PM PDT 24 |
Mar 28 01:22:48 PM PDT 24 |
55437450 ps |
| T882 |
/workspace/coverage/default/31.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.31293582 |
|
|
Mar 28 01:25:29 PM PDT 24 |
Mar 28 01:25:32 PM PDT 24 |
773957225 ps |
| T883 |
/workspace/coverage/default/31.pwrmgr_esc_clk_rst_malfunc.1154445512 |
|
|
Mar 28 01:25:24 PM PDT 24 |
Mar 28 01:25:25 PM PDT 24 |
34061006 ps |
| T884 |
/workspace/coverage/default/0.pwrmgr_reset.1662757296 |
|
|
Mar 28 01:21:31 PM PDT 24 |
Mar 28 01:21:32 PM PDT 24 |
61422038 ps |
| T885 |
/workspace/coverage/default/5.pwrmgr_glitch.2125741370 |
|
|
Mar 28 01:22:33 PM PDT 24 |
Mar 28 01:22:34 PM PDT 24 |
50490519 ps |
| T886 |
/workspace/coverage/default/39.pwrmgr_esc_clk_rst_malfunc.4246269866 |
|
|
Mar 28 01:25:54 PM PDT 24 |
Mar 28 01:25:55 PM PDT 24 |
56708912 ps |
| T887 |
/workspace/coverage/default/8.pwrmgr_sec_cm_ctrl_config_regwen.3303971684 |
|
|
Mar 28 01:23:00 PM PDT 24 |
Mar 28 01:23:01 PM PDT 24 |
135919164 ps |
| T888 |
/workspace/coverage/default/24.pwrmgr_lowpower_wakeup_race.2708134475 |
|
|
Mar 28 01:24:31 PM PDT 24 |
Mar 28 01:24:32 PM PDT 24 |
139170967 ps |
| T889 |
/workspace/coverage/default/27.pwrmgr_wakeup.2433942563 |
|
|
Mar 28 01:24:49 PM PDT 24 |
Mar 28 01:24:50 PM PDT 24 |
269645422 ps |
| T890 |
/workspace/coverage/default/35.pwrmgr_reset.1782884184 |
|
|
Mar 28 01:25:34 PM PDT 24 |
Mar 28 01:25:35 PM PDT 24 |
148263884 ps |
| T891 |
/workspace/coverage/default/44.pwrmgr_reset_invalid.2233398792 |
|
|
Mar 28 01:26:20 PM PDT 24 |
Mar 28 01:26:22 PM PDT 24 |
111643746 ps |
| T892 |
/workspace/coverage/default/29.pwrmgr_global_esc.79233805 |
|
|
Mar 28 01:25:05 PM PDT 24 |
Mar 28 01:25:06 PM PDT 24 |
53663794 ps |
| T893 |
/workspace/coverage/default/4.pwrmgr_disable_rom_integrity_check.2331234696 |
|
|
Mar 28 01:22:32 PM PDT 24 |
Mar 28 01:22:33 PM PDT 24 |
103634802 ps |
| T894 |
/workspace/coverage/default/39.pwrmgr_lowpower_wakeup_race.3946756519 |
|
|
Mar 28 01:25:55 PM PDT 24 |
Mar 28 01:25:57 PM PDT 24 |
415712936 ps |
| T895 |
/workspace/coverage/default/12.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1589101783 |
|
|
Mar 28 01:23:43 PM PDT 24 |
Mar 28 01:23:46 PM PDT 24 |
776912225 ps |
| T896 |
/workspace/coverage/default/24.pwrmgr_sec_cm_rstmgr_intersig_mubi.2193396158 |
|
|
Mar 28 01:24:33 PM PDT 24 |
Mar 28 01:24:34 PM PDT 24 |
102631830 ps |
| T897 |
/workspace/coverage/default/17.pwrmgr_disable_rom_integrity_check.1134542636 |
|
|
Mar 28 01:24:06 PM PDT 24 |
Mar 28 01:24:07 PM PDT 24 |
96020803 ps |
| T898 |
/workspace/coverage/default/18.pwrmgr_lowpower_wakeup_race.3779556361 |
|
|
Mar 28 01:23:59 PM PDT 24 |
Mar 28 01:24:00 PM PDT 24 |
169318806 ps |
| T899 |
/workspace/coverage/default/9.pwrmgr_aborted_low_power.1347918334 |
|
|
Mar 28 01:23:19 PM PDT 24 |
Mar 28 01:23:19 PM PDT 24 |
63670819 ps |
| T900 |
/workspace/coverage/default/46.pwrmgr_wakeup.4161234923 |
|
|
Mar 28 01:26:25 PM PDT 24 |
Mar 28 01:26:27 PM PDT 24 |
314518357 ps |
| T901 |
/workspace/coverage/default/3.pwrmgr_wakeup.613824468 |
|
|
Mar 28 01:22:18 PM PDT 24 |
Mar 28 01:22:19 PM PDT 24 |
113604940 ps |
| T144 |
/workspace/coverage/default/40.pwrmgr_disable_rom_integrity_check.567449874 |
|
|
Mar 28 01:26:10 PM PDT 24 |
Mar 28 01:26:11 PM PDT 24 |
68396524 ps |
| T902 |
/workspace/coverage/default/28.pwrmgr_glitch.3484362139 |
|
|
Mar 28 01:25:07 PM PDT 24 |
Mar 28 01:25:08 PM PDT 24 |
99171875 ps |
| T903 |
/workspace/coverage/default/20.pwrmgr_sec_cm_rstmgr_intersig_mubi.1243602240 |
|
|
Mar 28 01:24:19 PM PDT 24 |
Mar 28 01:24:21 PM PDT 24 |
112482358 ps |
| T904 |
/workspace/coverage/default/42.pwrmgr_wakeup.32566878 |
|
|
Mar 28 01:26:14 PM PDT 24 |
Mar 28 01:26:15 PM PDT 24 |
30303214 ps |
| T905 |
/workspace/coverage/default/38.pwrmgr_escalation_timeout.66943105 |
|
|
Mar 28 01:25:51 PM PDT 24 |
Mar 28 01:25:53 PM PDT 24 |
164713015 ps |
| T906 |
/workspace/coverage/default/46.pwrmgr_wakeup_reset.3085489497 |
|
|
Mar 28 01:26:19 PM PDT 24 |
Mar 28 01:26:20 PM PDT 24 |
302671129 ps |
| T907 |
/workspace/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.1170014488 |
|
|
Mar 28 01:21:31 PM PDT 24 |
Mar 28 01:21:31 PM PDT 24 |
34005585 ps |
| T908 |
/workspace/coverage/default/30.pwrmgr_stress_all.1944060219 |
|
|
Mar 28 01:25:21 PM PDT 24 |
Mar 28 01:25:29 PM PDT 24 |
2140339813 ps |
| T909 |
/workspace/coverage/default/16.pwrmgr_aborted_low_power.2423581942 |
|
|
Mar 28 01:23:54 PM PDT 24 |
Mar 28 01:23:55 PM PDT 24 |
41615224 ps |
| T910 |
/workspace/coverage/default/34.pwrmgr_sec_cm_ctrl_config_regwen.3536795549 |
|
|
Mar 28 01:25:32 PM PDT 24 |
Mar 28 01:25:33 PM PDT 24 |
221374246 ps |
| T911 |
/workspace/coverage/default/14.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.751747176 |
|
|
Mar 28 01:23:38 PM PDT 24 |
Mar 28 01:23:40 PM PDT 24 |
1165596658 ps |
| T912 |
/workspace/coverage/default/17.pwrmgr_wakeup_reset.2349497601 |
|
|
Mar 28 01:24:01 PM PDT 24 |
Mar 28 01:24:02 PM PDT 24 |
237026397 ps |
| T913 |
/workspace/coverage/default/39.pwrmgr_disable_rom_integrity_check.3924830638 |
|
|
Mar 28 01:26:06 PM PDT 24 |
Mar 28 01:26:07 PM PDT 24 |
92982228 ps |
| T914 |
/workspace/coverage/default/32.pwrmgr_global_esc.2064235761 |
|
|
Mar 28 01:25:34 PM PDT 24 |
Mar 28 01:25:35 PM PDT 24 |
58407449 ps |
| T915 |
/workspace/coverage/default/5.pwrmgr_reset_invalid.2990946274 |
|
|
Mar 28 01:22:32 PM PDT 24 |
Mar 28 01:22:32 PM PDT 24 |
154224123 ps |
| T916 |
/workspace/coverage/default/40.pwrmgr_stress_all_with_rand_reset.881551252 |
|
|
Mar 28 01:26:07 PM PDT 24 |
Mar 28 01:26:19 PM PDT 24 |
15897008299 ps |
| T917 |
/workspace/coverage/default/21.pwrmgr_disable_rom_integrity_check.1133234707 |
|
|
Mar 28 01:24:28 PM PDT 24 |
Mar 28 01:24:28 PM PDT 24 |
82576401 ps |
| T918 |
/workspace/coverage/default/41.pwrmgr_global_esc.2515271169 |
|
|
Mar 28 01:26:08 PM PDT 24 |
Mar 28 01:26:08 PM PDT 24 |
30099603 ps |
| T919 |
/workspace/coverage/default/28.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1052350685 |
|
|
Mar 28 01:25:07 PM PDT 24 |
Mar 28 01:25:10 PM PDT 24 |
782367274 ps |
| T920 |
/workspace/coverage/default/15.pwrmgr_smoke.1115108413 |
|
|
Mar 28 01:23:40 PM PDT 24 |
Mar 28 01:23:42 PM PDT 24 |
28538304 ps |
| T921 |
/workspace/coverage/default/34.pwrmgr_stress_all.4265509659 |
|
|
Mar 28 01:25:35 PM PDT 24 |
Mar 28 01:25:36 PM PDT 24 |
448770021 ps |
| T922 |
/workspace/coverage/default/19.pwrmgr_reset_invalid.1990497276 |
|
|
Mar 28 01:24:16 PM PDT 24 |
Mar 28 01:24:17 PM PDT 24 |
119079771 ps |
| T923 |
/workspace/coverage/default/40.pwrmgr_global_esc.2194093563 |
|
|
Mar 28 01:26:09 PM PDT 24 |
Mar 28 01:26:10 PM PDT 24 |
81205241 ps |
| T924 |
/workspace/coverage/default/9.pwrmgr_lowpower_wakeup_race.2758940459 |
|
|
Mar 28 01:22:58 PM PDT 24 |
Mar 28 01:22:59 PM PDT 24 |
297846131 ps |
| T925 |
/workspace/coverage/default/12.pwrmgr_reset.1083517110 |
|
|
Mar 28 01:23:41 PM PDT 24 |
Mar 28 01:23:42 PM PDT 24 |
65808331 ps |
| T926 |
/workspace/coverage/default/20.pwrmgr_smoke.4225329323 |
|
|
Mar 28 01:24:17 PM PDT 24 |
Mar 28 01:24:18 PM PDT 24 |
32071099 ps |
| T927 |
/workspace/coverage/default/43.pwrmgr_reset.1527059863 |
|
|
Mar 28 01:26:14 PM PDT 24 |
Mar 28 01:26:16 PM PDT 24 |
129837738 ps |
| T928 |
/workspace/coverage/default/47.pwrmgr_escalation_timeout.2994407936 |
|
|
Mar 28 01:26:32 PM PDT 24 |
Mar 28 01:26:34 PM PDT 24 |
605338099 ps |
| T929 |
/workspace/coverage/default/23.pwrmgr_stress_all.1515411597 |
|
|
Mar 28 01:24:34 PM PDT 24 |
Mar 28 01:24:40 PM PDT 24 |
3652009595 ps |
| T930 |
/workspace/coverage/default/13.pwrmgr_reset_invalid.43115392 |
|
|
Mar 28 01:23:39 PM PDT 24 |
Mar 28 01:23:41 PM PDT 24 |
101375182 ps |
| T145 |
/workspace/coverage/default/38.pwrmgr_disable_rom_integrity_check.4064827876 |
|
|
Mar 28 01:25:55 PM PDT 24 |
Mar 28 01:25:57 PM PDT 24 |
58049374 ps |
| T931 |
/workspace/coverage/default/43.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.12019341 |
|
|
Mar 28 01:26:26 PM PDT 24 |
Mar 28 01:26:28 PM PDT 24 |
974166652 ps |
| T932 |
/workspace/coverage/default/13.pwrmgr_lowpower_wakeup_race.1413915813 |
|
|
Mar 28 01:23:40 PM PDT 24 |
Mar 28 01:23:42 PM PDT 24 |
202005786 ps |
| T933 |
/workspace/coverage/default/31.pwrmgr_sec_cm_ctrl_config_regwen.2259795335 |
|
|
Mar 28 01:25:30 PM PDT 24 |
Mar 28 01:25:31 PM PDT 24 |
259166996 ps |
| T934 |
/workspace/coverage/default/48.pwrmgr_reset_invalid.2244331739 |
|
|
Mar 28 01:26:43 PM PDT 24 |
Mar 28 01:26:45 PM PDT 24 |
216263014 ps |
| T935 |
/workspace/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.2087072365 |
|
|
Mar 28 01:26:14 PM PDT 24 |
Mar 28 01:26:15 PM PDT 24 |
139682721 ps |
| T936 |
/workspace/coverage/default/23.pwrmgr_reset_invalid.3069989246 |
|
|
Mar 28 01:24:31 PM PDT 24 |
Mar 28 01:24:32 PM PDT 24 |
177428698 ps |
| T937 |
/workspace/coverage/default/49.pwrmgr_reset_invalid.1390050165 |
|
|
Mar 28 01:26:40 PM PDT 24 |
Mar 28 01:26:41 PM PDT 24 |
208315715 ps |
| T938 |
/workspace/coverage/default/47.pwrmgr_sec_cm_ctrl_config_regwen.1991700380 |
|
|
Mar 28 01:26:33 PM PDT 24 |
Mar 28 01:26:34 PM PDT 24 |
96148793 ps |
| T939 |
/workspace/coverage/default/49.pwrmgr_sec_cm_ctrl_config_regwen.2490218818 |
|
|
Mar 28 01:26:44 PM PDT 24 |
Mar 28 01:26:45 PM PDT 24 |
122594874 ps |
| T940 |
/workspace/coverage/default/40.pwrmgr_stress_all.324726418 |
|
|
Mar 28 01:26:09 PM PDT 24 |
Mar 28 01:26:13 PM PDT 24 |
2792697203 ps |
| T941 |
/workspace/coverage/default/32.pwrmgr_lowpower_invalid.4147643013 |
|
|
Mar 28 01:25:33 PM PDT 24 |
Mar 28 01:25:34 PM PDT 24 |
119731111 ps |
| T942 |
/workspace/coverage/default/13.pwrmgr_reset.1637968427 |
|
|
Mar 28 01:23:39 PM PDT 24 |
Mar 28 01:23:40 PM PDT 24 |
48698564 ps |
| T943 |
/workspace/coverage/default/39.pwrmgr_lowpower_invalid.2802164428 |
|
|
Mar 28 01:26:04 PM PDT 24 |
Mar 28 01:26:05 PM PDT 24 |
98651992 ps |
| T944 |
/workspace/coverage/default/11.pwrmgr_global_esc.1080656290 |
|
|
Mar 28 01:23:18 PM PDT 24 |
Mar 28 01:23:19 PM PDT 24 |
70554667 ps |
| T945 |
/workspace/coverage/default/30.pwrmgr_lowpower_wakeup_race.724705962 |
|
|
Mar 28 01:25:24 PM PDT 24 |
Mar 28 01:25:25 PM PDT 24 |
222147875 ps |
| T946 |
/workspace/coverage/default/44.pwrmgr_smoke.4082971278 |
|
|
Mar 28 01:26:22 PM PDT 24 |
Mar 28 01:26:23 PM PDT 24 |
30861785 ps |
| T947 |
/workspace/coverage/default/2.pwrmgr_reset.2598707620 |
|
|
Mar 28 01:22:00 PM PDT 24 |
Mar 28 01:22:01 PM PDT 24 |
57195035 ps |
| T948 |
/workspace/coverage/default/23.pwrmgr_escalation_timeout.1680190679 |
|
|
Mar 28 01:24:33 PM PDT 24 |
Mar 28 01:24:34 PM PDT 24 |
692858765 ps |
| T949 |
/workspace/coverage/default/35.pwrmgr_global_esc.3853401143 |
|
|
Mar 28 01:25:30 PM PDT 24 |
Mar 28 01:25:30 PM PDT 24 |
89888718 ps |
| T950 |
/workspace/coverage/default/24.pwrmgr_escalation_timeout.853515512 |
|
|
Mar 28 01:24:36 PM PDT 24 |
Mar 28 01:24:37 PM PDT 24 |
167040758 ps |
| T951 |
/workspace/coverage/default/29.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1367360265 |
|
|
Mar 28 01:25:08 PM PDT 24 |
Mar 28 01:25:11 PM PDT 24 |
1282883264 ps |
| T952 |
/workspace/coverage/default/15.pwrmgr_reset_invalid.417978777 |
|
|
Mar 28 01:24:01 PM PDT 24 |
Mar 28 01:24:03 PM PDT 24 |
108633462 ps |
| T953 |
/workspace/coverage/default/11.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.834652651 |
|
|
Mar 28 01:23:19 PM PDT 24 |
Mar 28 01:23:22 PM PDT 24 |
1030864746 ps |
| T954 |
/workspace/coverage/default/43.pwrmgr_global_esc.2041988584 |
|
|
Mar 28 01:26:21 PM PDT 24 |
Mar 28 01:26:22 PM PDT 24 |
31445718 ps |
| T955 |
/workspace/coverage/default/1.pwrmgr_lowpower_wakeup_race.4189484514 |
|
|
Mar 28 01:21:44 PM PDT 24 |
Mar 28 01:21:45 PM PDT 24 |
174532217 ps |
| T956 |
/workspace/coverage/default/47.pwrmgr_disable_rom_integrity_check.2235758032 |
|
|
Mar 28 01:26:28 PM PDT 24 |
Mar 28 01:26:29 PM PDT 24 |
70000008 ps |
| T957 |
/workspace/coverage/default/41.pwrmgr_disable_rom_integrity_check.123640896 |
|
|
Mar 28 01:26:09 PM PDT 24 |
Mar 28 01:26:10 PM PDT 24 |
69324551 ps |
| T958 |
/workspace/coverage/default/46.pwrmgr_global_esc.1125163890 |
|
|
Mar 28 01:26:28 PM PDT 24 |
Mar 28 01:26:29 PM PDT 24 |
45184495 ps |
| T959 |
/workspace/coverage/default/22.pwrmgr_glitch.587463981 |
|
|
Mar 28 01:24:32 PM PDT 24 |
Mar 28 01:24:32 PM PDT 24 |
82062647 ps |
| T960 |
/workspace/coverage/default/22.pwrmgr_disable_rom_integrity_check.1933376148 |
|
|
Mar 28 01:24:29 PM PDT 24 |
Mar 28 01:24:29 PM PDT 24 |
152052714 ps |
| T961 |
/workspace/coverage/default/2.pwrmgr_disable_rom_integrity_check.4135710165 |
|
|
Mar 28 01:22:18 PM PDT 24 |
Mar 28 01:22:20 PM PDT 24 |
135068416 ps |
| T962 |
/workspace/coverage/default/22.pwrmgr_smoke.3133085899 |
|
|
Mar 28 01:24:29 PM PDT 24 |
Mar 28 01:24:29 PM PDT 24 |
39732042 ps |
| T963 |
/workspace/coverage/default/8.pwrmgr_lowpower_invalid.4223614444 |
|
|
Mar 28 01:23:01 PM PDT 24 |
Mar 28 01:23:02 PM PDT 24 |
78347823 ps |
| T964 |
/workspace/coverage/default/35.pwrmgr_lowpower_wakeup_race.2355386387 |
|
|
Mar 28 01:25:33 PM PDT 24 |
Mar 28 01:25:34 PM PDT 24 |
188771563 ps |
| T965 |
/workspace/coverage/default/27.pwrmgr_esc_clk_rst_malfunc.2710908532 |
|
|
Mar 28 01:25:04 PM PDT 24 |
Mar 28 01:25:05 PM PDT 24 |
30650379 ps |
| T966 |
/workspace/coverage/default/29.pwrmgr_esc_clk_rst_malfunc.3375844011 |
|
|
Mar 28 01:25:10 PM PDT 24 |
Mar 28 01:25:11 PM PDT 24 |
29781266 ps |
| T967 |
/workspace/coverage/default/29.pwrmgr_escalation_timeout.3084250938 |
|
|
Mar 28 01:25:08 PM PDT 24 |
Mar 28 01:25:09 PM PDT 24 |
430582147 ps |
| T968 |
/workspace/coverage/default/42.pwrmgr_lowpower_wakeup_race.1837915628 |
|
|
Mar 28 01:26:08 PM PDT 24 |
Mar 28 01:26:09 PM PDT 24 |
112939384 ps |
| T969 |
/workspace/coverage/default/45.pwrmgr_wakeup_reset.3100476860 |
|
|
Mar 28 01:26:29 PM PDT 24 |
Mar 28 01:26:31 PM PDT 24 |
336667694 ps |
| T970 |
/workspace/coverage/default/30.pwrmgr_sec_cm_rstmgr_intersig_mubi.3465833289 |
|
|
Mar 28 01:25:25 PM PDT 24 |
Mar 28 01:25:27 PM PDT 24 |
85870907 ps |
| T971 |
/workspace/coverage/default/37.pwrmgr_disable_rom_integrity_check.2171725726 |
|
|
Mar 28 01:25:51 PM PDT 24 |
Mar 28 01:25:53 PM PDT 24 |
85143817 ps |
| T972 |
/workspace/coverage/default/49.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.3868048969 |
|
|
Mar 28 01:26:42 PM PDT 24 |
Mar 28 01:26:44 PM PDT 24 |
1306222398 ps |
| T973 |
/workspace/coverage/default/0.pwrmgr_lowpower_wakeup_race.73648382 |
|
|
Mar 28 01:21:32 PM PDT 24 |
Mar 28 01:21:34 PM PDT 24 |
224043100 ps |
| T974 |
/workspace/coverage/default/5.pwrmgr_smoke.234762687 |
|
|
Mar 28 01:22:33 PM PDT 24 |
Mar 28 01:22:34 PM PDT 24 |
53162277 ps |
| T975 |
/workspace/coverage/default/0.pwrmgr_lowpower_invalid.4225269888 |
|
|
Mar 28 01:21:35 PM PDT 24 |
Mar 28 01:21:35 PM PDT 24 |
45348729 ps |
| T976 |
/workspace/coverage/default/9.pwrmgr_esc_clk_rst_malfunc.51108331 |
|
|
Mar 28 01:23:21 PM PDT 24 |
Mar 28 01:23:22 PM PDT 24 |
39964380 ps |
| T977 |
/workspace/coverage/default/18.pwrmgr_stress_all.3241395493 |
|
|
Mar 28 01:24:15 PM PDT 24 |
Mar 28 01:24:23 PM PDT 24 |
2176586786 ps |
| T978 |
/workspace/coverage/default/49.pwrmgr_sec_cm_rstmgr_intersig_mubi.1783779218 |
|
|
Mar 28 01:26:42 PM PDT 24 |
Mar 28 01:26:43 PM PDT 24 |
140688011 ps |
| T979 |
/workspace/coverage/default/8.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4104974120 |
|
|
Mar 28 01:23:00 PM PDT 24 |
Mar 28 01:23:04 PM PDT 24 |
871923636 ps |
| T980 |
/workspace/coverage/default/34.pwrmgr_escalation_timeout.2439612295 |
|
|
Mar 28 01:25:26 PM PDT 24 |
Mar 28 01:25:27 PM PDT 24 |
167879755 ps |
| T981 |
/workspace/coverage/default/10.pwrmgr_lowpower_invalid.2671178901 |
|
|
Mar 28 01:23:20 PM PDT 24 |
Mar 28 01:23:20 PM PDT 24 |
76602279 ps |
| T982 |
/workspace/coverage/default/41.pwrmgr_wakeup_reset.4198588590 |
|
|
Mar 28 01:26:11 PM PDT 24 |
Mar 28 01:26:12 PM PDT 24 |
740297954 ps |
| T983 |
/workspace/coverage/default/18.pwrmgr_escalation_timeout.2698325325 |
|
|
Mar 28 01:24:14 PM PDT 24 |
Mar 28 01:24:15 PM PDT 24 |
164733317 ps |
| T984 |
/workspace/coverage/default/8.pwrmgr_escalation_timeout.225723623 |
|
|
Mar 28 01:22:58 PM PDT 24 |
Mar 28 01:23:00 PM PDT 24 |
607426363 ps |
| T985 |
/workspace/coverage/default/15.pwrmgr_lowpower_invalid.3494064590 |
|
|
Mar 28 01:23:55 PM PDT 24 |
Mar 28 01:23:56 PM PDT 24 |
72318145 ps |
| T986 |
/workspace/coverage/default/16.pwrmgr_reset.3621718903 |
|
|
Mar 28 01:24:07 PM PDT 24 |
Mar 28 01:24:08 PM PDT 24 |
127184422 ps |
| T987 |
/workspace/coverage/default/25.pwrmgr_global_esc.2190695023 |
|
|
Mar 28 01:24:47 PM PDT 24 |
Mar 28 01:24:48 PM PDT 24 |
24865376 ps |
| T988 |
/workspace/coverage/default/8.pwrmgr_disable_rom_integrity_check.3044365774 |
|
|
Mar 28 01:22:59 PM PDT 24 |
Mar 28 01:23:00 PM PDT 24 |
54399039 ps |
| T989 |
/workspace/coverage/default/33.pwrmgr_disable_rom_integrity_check.3779331628 |
|
|
Mar 28 01:25:24 PM PDT 24 |
Mar 28 01:25:25 PM PDT 24 |
55459054 ps |
| T990 |
/workspace/coverage/default/13.pwrmgr_lowpower_invalid.3938290291 |
|
|
Mar 28 01:23:39 PM PDT 24 |
Mar 28 01:23:40 PM PDT 24 |
39683272 ps |
| T991 |
/workspace/coverage/default/14.pwrmgr_lowpower_wakeup_race.1452132968 |
|
|
Mar 28 01:23:40 PM PDT 24 |
Mar 28 01:23:42 PM PDT 24 |
256887197 ps |
| T992 |
/workspace/coverage/default/30.pwrmgr_disable_rom_integrity_check.4231372560 |
|
|
Mar 28 01:25:24 PM PDT 24 |
Mar 28 01:25:25 PM PDT 24 |
73526703 ps |
| T37 |
/workspace/coverage/cover_reg_top/14.pwrmgr_tl_intg_err.3774988140 |
|
|
Mar 28 12:43:06 PM PDT 24 |
Mar 28 12:43:08 PM PDT 24 |
113453685 ps |
| T57 |
/workspace/coverage/cover_reg_top/18.pwrmgr_tl_errors.2730631825 |
|
|
Mar 28 12:43:16 PM PDT 24 |
Mar 28 12:43:17 PM PDT 24 |
434618671 ps |
| T38 |
/workspace/coverage/cover_reg_top/19.pwrmgr_tl_intg_err.1031433046 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:11 PM PDT 24 |
385801587 ps |
| T53 |
/workspace/coverage/cover_reg_top/43.pwrmgr_intr_test.2038585721 |
|
|
Mar 28 12:43:25 PM PDT 24 |
Mar 28 12:43:25 PM PDT 24 |
54304549 ps |
| T42 |
/workspace/coverage/cover_reg_top/3.pwrmgr_tl_errors.302525498 |
|
|
Mar 28 12:43:10 PM PDT 24 |
Mar 28 12:43:12 PM PDT 24 |
64489002 ps |
| T47 |
/workspace/coverage/cover_reg_top/5.pwrmgr_csr_rw.4122339091 |
|
|
Mar 28 12:43:14 PM PDT 24 |
Mar 28 12:43:15 PM PDT 24 |
19379547 ps |
| T44 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_mem_rw_with_rand_reset.1092483560 |
|
|
Mar 28 12:43:10 PM PDT 24 |
Mar 28 12:43:12 PM PDT 24 |
143997259 ps |
| T96 |
/workspace/coverage/cover_reg_top/6.pwrmgr_csr_rw.1634756620 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:09 PM PDT 24 |
30235322 ps |
| T43 |
/workspace/coverage/cover_reg_top/12.pwrmgr_tl_intg_err.407891894 |
|
|
Mar 28 12:43:05 PM PDT 24 |
Mar 28 12:43:06 PM PDT 24 |
94990383 ps |
| T76 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.1421877386 |
|
|
Mar 28 12:43:11 PM PDT 24 |
Mar 28 12:43:11 PM PDT 24 |
65161509 ps |
| T993 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_aliasing.3649777293 |
|
|
Mar 28 12:43:05 PM PDT 24 |
Mar 28 12:43:06 PM PDT 24 |
42081212 ps |
| T52 |
/workspace/coverage/cover_reg_top/13.pwrmgr_tl_errors.469233097 |
|
|
Mar 28 12:43:10 PM PDT 24 |
Mar 28 12:43:13 PM PDT 24 |
361250914 ps |
| T54 |
/workspace/coverage/cover_reg_top/19.pwrmgr_intr_test.3708056420 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
22301561 ps |
| T134 |
/workspace/coverage/cover_reg_top/7.pwrmgr_tl_intg_err.626420049 |
|
|
Mar 28 12:43:21 PM PDT 24 |
Mar 28 12:43:23 PM PDT 24 |
111692998 ps |
| T55 |
/workspace/coverage/cover_reg_top/6.pwrmgr_intr_test.2333481603 |
|
|
Mar 28 12:43:17 PM PDT 24 |
Mar 28 12:43:18 PM PDT 24 |
17924990 ps |
| T138 |
/workspace/coverage/cover_reg_top/41.pwrmgr_intr_test.604924990 |
|
|
Mar 28 12:43:24 PM PDT 24 |
Mar 28 12:43:25 PM PDT 24 |
16458081 ps |
| T97 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_rw.4029633823 |
|
|
Mar 28 12:43:16 PM PDT 24 |
Mar 28 12:43:16 PM PDT 24 |
19417055 ps |
| T98 |
/workspace/coverage/cover_reg_top/10.pwrmgr_csr_rw.1361488623 |
|
|
Mar 28 12:43:04 PM PDT 24 |
Mar 28 12:43:05 PM PDT 24 |
47177252 ps |
| T994 |
/workspace/coverage/cover_reg_top/4.pwrmgr_csr_mem_rw_with_rand_reset.3300383672 |
|
|
Mar 28 12:43:12 PM PDT 24 |
Mar 28 12:43:13 PM PDT 24 |
49406790 ps |
| T135 |
/workspace/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.192779957 |
|
|
Mar 28 12:43:10 PM PDT 24 |
Mar 28 12:43:11 PM PDT 24 |
106688959 ps |
| T48 |
/workspace/coverage/cover_reg_top/11.pwrmgr_tl_errors.86209309 |
|
|
Mar 28 12:43:05 PM PDT 24 |
Mar 28 12:43:07 PM PDT 24 |
84772797 ps |
| T49 |
/workspace/coverage/cover_reg_top/16.pwrmgr_tl_intg_err.3436696828 |
|
|
Mar 28 12:43:17 PM PDT 24 |
Mar 28 12:43:18 PM PDT 24 |
398672870 ps |
| T995 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_aliasing.2715339703 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
59700766 ps |
| T996 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_bit_bash.2155090986 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:12 PM PDT 24 |
74985162 ps |
| T99 |
/workspace/coverage/cover_reg_top/16.pwrmgr_csr_rw.1634183423 |
|
|
Mar 28 12:43:02 PM PDT 24 |
Mar 28 12:43:03 PM PDT 24 |
45065944 ps |
| T139 |
/workspace/coverage/cover_reg_top/23.pwrmgr_intr_test.4267517334 |
|
|
Mar 28 12:43:04 PM PDT 24 |
Mar 28 12:43:04 PM PDT 24 |
25121858 ps |
| T997 |
/workspace/coverage/cover_reg_top/3.pwrmgr_csr_hw_reset.2168739260 |
|
|
Mar 28 12:43:14 PM PDT 24 |
Mar 28 12:43:15 PM PDT 24 |
40271528 ps |
| T100 |
/workspace/coverage/cover_reg_top/9.pwrmgr_csr_rw.2597213827 |
|
|
Mar 28 12:43:07 PM PDT 24 |
Mar 28 12:43:08 PM PDT 24 |
28964544 ps |
| T140 |
/workspace/coverage/cover_reg_top/49.pwrmgr_intr_test.1585139251 |
|
|
Mar 28 12:43:22 PM PDT 24 |
Mar 28 12:43:23 PM PDT 24 |
48569444 ps |
| T998 |
/workspace/coverage/cover_reg_top/16.pwrmgr_csr_mem_rw_with_rand_reset.566418497 |
|
|
Mar 28 12:42:59 PM PDT 24 |
Mar 28 12:43:00 PM PDT 24 |
212862190 ps |
| T101 |
/workspace/coverage/cover_reg_top/9.pwrmgr_same_csr_outstanding.3064599495 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:11 PM PDT 24 |
105802418 ps |
| T141 |
/workspace/coverage/cover_reg_top/27.pwrmgr_intr_test.171362438 |
|
|
Mar 28 12:43:13 PM PDT 24 |
Mar 28 12:43:14 PM PDT 24 |
72116490 ps |
| T999 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.3662405946 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
70741655 ps |
| T102 |
/workspace/coverage/cover_reg_top/11.pwrmgr_same_csr_outstanding.1547308362 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
123784932 ps |
| T132 |
/workspace/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.1387403550 |
|
|
Mar 28 12:43:18 PM PDT 24 |
Mar 28 12:43:20 PM PDT 24 |
184455226 ps |
| T1000 |
/workspace/coverage/cover_reg_top/0.pwrmgr_csr_hw_reset.3343970635 |
|
|
Mar 28 12:43:03 PM PDT 24 |
Mar 28 12:43:04 PM PDT 24 |
36881392 ps |
| T1001 |
/workspace/coverage/cover_reg_top/10.pwrmgr_csr_mem_rw_with_rand_reset.2474585611 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:11 PM PDT 24 |
55001856 ps |
| T103 |
/workspace/coverage/cover_reg_top/13.pwrmgr_same_csr_outstanding.2775162441 |
|
|
Mar 28 12:43:18 PM PDT 24 |
Mar 28 12:43:19 PM PDT 24 |
72252309 ps |
| T1002 |
/workspace/coverage/cover_reg_top/25.pwrmgr_intr_test.1847687644 |
|
|
Mar 28 12:43:08 PM PDT 24 |
Mar 28 12:43:09 PM PDT 24 |
19315407 ps |
| T142 |
/workspace/coverage/cover_reg_top/14.pwrmgr_intr_test.3179012605 |
|
|
Mar 28 12:43:13 PM PDT 24 |
Mar 28 12:43:14 PM PDT 24 |
21696189 ps |
| T1003 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_bit_bash.862934918 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:13 PM PDT 24 |
218680838 ps |
| T60 |
/workspace/coverage/cover_reg_top/13.pwrmgr_tl_intg_err.4268732163 |
|
|
Mar 28 12:43:10 PM PDT 24 |
Mar 28 12:43:12 PM PDT 24 |
96559878 ps |
| T1004 |
/workspace/coverage/cover_reg_top/39.pwrmgr_intr_test.1921426986 |
|
|
Mar 28 12:43:24 PM PDT 24 |
Mar 28 12:43:25 PM PDT 24 |
42764949 ps |
| T56 |
/workspace/coverage/cover_reg_top/2.pwrmgr_tl_intg_err.4287781353 |
|
|
Mar 28 12:43:08 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
631247980 ps |
| T1005 |
/workspace/coverage/cover_reg_top/11.pwrmgr_csr_mem_rw_with_rand_reset.2589877906 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
109547700 ps |
| T1006 |
/workspace/coverage/cover_reg_top/30.pwrmgr_intr_test.3281466522 |
|
|
Mar 28 12:43:23 PM PDT 24 |
Mar 28 12:43:24 PM PDT 24 |
49276218 ps |
| T86 |
/workspace/coverage/cover_reg_top/1.pwrmgr_csr_rw.2663826788 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
23505937 ps |
| T1007 |
/workspace/coverage/cover_reg_top/17.pwrmgr_tl_intg_err.3121843557 |
|
|
Mar 28 12:43:07 PM PDT 24 |
Mar 28 12:43:09 PM PDT 24 |
1369216693 ps |
| T59 |
/workspace/coverage/cover_reg_top/12.pwrmgr_tl_errors.409262853 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:11 PM PDT 24 |
44168843 ps |
| T1008 |
/workspace/coverage/cover_reg_top/1.pwrmgr_tl_errors.4092510668 |
|
|
Mar 28 12:43:04 PM PDT 24 |
Mar 28 12:43:06 PM PDT 24 |
226154346 ps |
| T1009 |
/workspace/coverage/cover_reg_top/13.pwrmgr_intr_test.301547879 |
|
|
Mar 28 12:43:10 PM PDT 24 |
Mar 28 12:43:11 PM PDT 24 |
42968758 ps |
| T1010 |
/workspace/coverage/cover_reg_top/32.pwrmgr_intr_test.2909602345 |
|
|
Mar 28 12:43:27 PM PDT 24 |
Mar 28 12:43:27 PM PDT 24 |
116791323 ps |
| T1011 |
/workspace/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.3083334496 |
|
|
Mar 28 12:43:07 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
354351473 ps |
| T61 |
/workspace/coverage/cover_reg_top/15.pwrmgr_tl_intg_err.4263381382 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
237496193 ps |
| T1012 |
/workspace/coverage/cover_reg_top/1.pwrmgr_intr_test.89838982 |
|
|
Mar 28 12:43:09 PM PDT 24 |
Mar 28 12:43:10 PM PDT 24 |
23064895 ps |
| T1013 |
/workspace/coverage/cover_reg_top/47.pwrmgr_intr_test.1201875004 |
|
|
Mar 28 12:43:25 PM PDT 24 |
Mar 28 12:43:25 PM PDT 24 |
44720804 ps |