Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.92 98.23 96.58 99.44 96.00 96.37 100.00 98.85


Total test records in report: 1111
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T808 /workspace/coverage/default/34.pwrmgr_glitch.1872713773 Apr 02 03:15:01 PM PDT 24 Apr 02 03:15:02 PM PDT 24 74041118 ps
T809 /workspace/coverage/default/48.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2280557715 Apr 02 03:15:45 PM PDT 24 Apr 02 03:15:48 PM PDT 24 821162977 ps
T810 /workspace/coverage/default/47.pwrmgr_disable_rom_integrity_check.3758344496 Apr 02 03:15:40 PM PDT 24 Apr 02 03:15:41 PM PDT 24 59035716 ps
T811 /workspace/coverage/default/45.pwrmgr_smoke.2646025501 Apr 02 03:15:27 PM PDT 24 Apr 02 03:15:28 PM PDT 24 50675323 ps
T812 /workspace/coverage/default/20.pwrmgr_aborted_low_power.1846034149 Apr 02 03:14:14 PM PDT 24 Apr 02 03:14:15 PM PDT 24 22084251 ps
T813 /workspace/coverage/default/33.pwrmgr_aborted_low_power.2894574756 Apr 02 03:14:59 PM PDT 24 Apr 02 03:15:00 PM PDT 24 70737347 ps
T814 /workspace/coverage/default/32.pwrmgr_glitch.3262006078 Apr 02 03:14:59 PM PDT 24 Apr 02 03:15:00 PM PDT 24 32361296 ps
T815 /workspace/coverage/default/11.pwrmgr_smoke.1246943774 Apr 02 03:13:38 PM PDT 24 Apr 02 03:13:39 PM PDT 24 38571230 ps
T816 /workspace/coverage/default/38.pwrmgr_lowpower_invalid.2838528994 Apr 02 03:15:14 PM PDT 24 Apr 02 03:15:14 PM PDT 24 211587353 ps
T817 /workspace/coverage/default/19.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2312745037 Apr 02 03:14:11 PM PDT 24 Apr 02 03:14:13 PM PDT 24 1264306330 ps
T818 /workspace/coverage/default/39.pwrmgr_aborted_low_power.269054580 Apr 02 03:15:14 PM PDT 24 Apr 02 03:15:15 PM PDT 24 358335665 ps
T819 /workspace/coverage/default/38.pwrmgr_wakeup_reset.1868333344 Apr 02 03:15:11 PM PDT 24 Apr 02 03:15:12 PM PDT 24 87788827 ps
T820 /workspace/coverage/default/30.pwrmgr_wakeup_reset.3877726177 Apr 02 03:14:43 PM PDT 24 Apr 02 03:14:44 PM PDT 24 432298075 ps
T821 /workspace/coverage/default/19.pwrmgr_reset_invalid.457136519 Apr 02 03:14:12 PM PDT 24 Apr 02 03:14:13 PM PDT 24 166579232 ps
T822 /workspace/coverage/default/5.pwrmgr_sec_cm_rstmgr_intersig_mubi.3130425224 Apr 02 03:13:18 PM PDT 24 Apr 02 03:13:20 PM PDT 24 94412432 ps
T823 /workspace/coverage/default/39.pwrmgr_glitch.262605614 Apr 02 03:15:16 PM PDT 24 Apr 02 03:15:17 PM PDT 24 37315749 ps
T824 /workspace/coverage/default/0.pwrmgr_esc_clk_rst_malfunc.164999016 Apr 02 03:12:57 PM PDT 24 Apr 02 03:12:57 PM PDT 24 46891536 ps
T825 /workspace/coverage/default/22.pwrmgr_lowpower_invalid.1429937602 Apr 02 03:14:20 PM PDT 24 Apr 02 03:14:21 PM PDT 24 75877410 ps
T826 /workspace/coverage/default/16.pwrmgr_sec_cm_ctrl_config_regwen.3628217379 Apr 02 03:14:06 PM PDT 24 Apr 02 03:14:07 PM PDT 24 568172500 ps
T827 /workspace/coverage/default/30.pwrmgr_reset_invalid.1330439183 Apr 02 03:14:46 PM PDT 24 Apr 02 03:14:47 PM PDT 24 108675092 ps
T828 /workspace/coverage/default/4.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.4171059618 Apr 02 03:13:11 PM PDT 24 Apr 02 03:13:15 PM PDT 24 961490403 ps
T829 /workspace/coverage/default/33.pwrmgr_reset_invalid.1233626125 Apr 02 03:15:03 PM PDT 24 Apr 02 03:15:05 PM PDT 24 209964529 ps
T830 /workspace/coverage/default/10.pwrmgr_reset.433964422 Apr 02 03:13:41 PM PDT 24 Apr 02 03:13:42 PM PDT 24 173751105 ps
T831 /workspace/coverage/default/47.pwrmgr_wakeup.3051364886 Apr 02 03:15:35 PM PDT 24 Apr 02 03:15:37 PM PDT 24 300201269 ps
T832 /workspace/coverage/default/32.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.4205250878 Apr 02 03:14:52 PM PDT 24 Apr 02 03:14:54 PM PDT 24 1216209072 ps
T833 /workspace/coverage/default/34.pwrmgr_lowpower_invalid.2608462273 Apr 02 03:15:09 PM PDT 24 Apr 02 03:15:10 PM PDT 24 71391258 ps
T145 /workspace/coverage/default/46.pwrmgr_stress_all_with_rand_reset.2958652508 Apr 02 03:15:43 PM PDT 24 Apr 02 03:15:53 PM PDT 24 7820193977 ps
T834 /workspace/coverage/default/23.pwrmgr_reset.728218813 Apr 02 03:14:27 PM PDT 24 Apr 02 03:14:28 PM PDT 24 133063472 ps
T835 /workspace/coverage/default/46.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.817142284 Apr 02 03:15:35 PM PDT 24 Apr 02 03:15:38 PM PDT 24 1066788470 ps
T836 /workspace/coverage/default/37.pwrmgr_disable_rom_integrity_check.559314511 Apr 02 03:15:09 PM PDT 24 Apr 02 03:15:10 PM PDT 24 53542149 ps
T837 /workspace/coverage/default/3.pwrmgr_smoke.366750470 Apr 02 03:12:59 PM PDT 24 Apr 02 03:13:00 PM PDT 24 28057591 ps
T838 /workspace/coverage/default/25.pwrmgr_stress_all_with_rand_reset.2742270307 Apr 02 03:14:34 PM PDT 24 Apr 02 03:14:43 PM PDT 24 2309893515 ps
T839 /workspace/coverage/default/27.pwrmgr_stress_all.2075753391 Apr 02 03:14:36 PM PDT 24 Apr 02 03:14:40 PM PDT 24 917502925 ps
T840 /workspace/coverage/default/20.pwrmgr_stress_all.1293470927 Apr 02 03:14:17 PM PDT 24 Apr 02 03:14:19 PM PDT 24 616424662 ps
T841 /workspace/coverage/default/25.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2768861839 Apr 02 03:14:39 PM PDT 24 Apr 02 03:14:42 PM PDT 24 840973929 ps
T842 /workspace/coverage/default/27.pwrmgr_wakeup.1482605401 Apr 02 03:14:41 PM PDT 24 Apr 02 03:14:42 PM PDT 24 91801918 ps
T843 /workspace/coverage/default/43.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1193975122 Apr 02 03:15:22 PM PDT 24 Apr 02 03:15:25 PM PDT 24 815085235 ps
T844 /workspace/coverage/default/2.pwrmgr_esc_clk_rst_malfunc.266809253 Apr 02 03:13:03 PM PDT 24 Apr 02 03:13:04 PM PDT 24 28453311 ps
T845 /workspace/coverage/default/31.pwrmgr_wakeup.2671218215 Apr 02 03:14:52 PM PDT 24 Apr 02 03:14:53 PM PDT 24 103989364 ps
T846 /workspace/coverage/default/43.pwrmgr_stress_all.376022587 Apr 02 03:15:21 PM PDT 24 Apr 02 03:15:22 PM PDT 24 150515897 ps
T847 /workspace/coverage/default/32.pwrmgr_lowpower_invalid.4151074004 Apr 02 03:14:51 PM PDT 24 Apr 02 03:14:52 PM PDT 24 41818058 ps
T848 /workspace/coverage/default/12.pwrmgr_lowpower_invalid.2083968259 Apr 02 03:13:49 PM PDT 24 Apr 02 03:13:50 PM PDT 24 43811782 ps
T849 /workspace/coverage/default/7.pwrmgr_wakeup.4174384404 Apr 02 03:13:24 PM PDT 24 Apr 02 03:13:26 PM PDT 24 128813585 ps
T850 /workspace/coverage/default/49.pwrmgr_disable_rom_integrity_check.1579803871 Apr 02 03:15:42 PM PDT 24 Apr 02 03:15:44 PM PDT 24 83690138 ps
T851 /workspace/coverage/default/4.pwrmgr_sec_cm_rstmgr_intersig_mubi.405312673 Apr 02 03:13:10 PM PDT 24 Apr 02 03:13:11 PM PDT 24 128531587 ps
T852 /workspace/coverage/default/1.pwrmgr_disable_rom_integrity_check.1830950782 Apr 02 03:12:55 PM PDT 24 Apr 02 03:12:56 PM PDT 24 74011546 ps
T853 /workspace/coverage/default/41.pwrmgr_smoke.4228294159 Apr 02 03:15:19 PM PDT 24 Apr 02 03:15:20 PM PDT 24 92072619 ps
T854 /workspace/coverage/default/29.pwrmgr_disable_rom_integrity_check.3935713662 Apr 02 03:14:48 PM PDT 24 Apr 02 03:14:49 PM PDT 24 58037804 ps
T855 /workspace/coverage/default/4.pwrmgr_esc_clk_rst_malfunc.1530050596 Apr 02 03:13:12 PM PDT 24 Apr 02 03:13:13 PM PDT 24 38098500 ps
T856 /workspace/coverage/default/40.pwrmgr_sec_cm_ctrl_config_regwen.2381682227 Apr 02 03:15:16 PM PDT 24 Apr 02 03:15:17 PM PDT 24 116880080 ps
T857 /workspace/coverage/default/25.pwrmgr_escalation_timeout.1011719800 Apr 02 03:14:32 PM PDT 24 Apr 02 03:14:33 PM PDT 24 301611410 ps
T858 /workspace/coverage/default/6.pwrmgr_glitch.1158734359 Apr 02 03:13:23 PM PDT 24 Apr 02 03:13:24 PM PDT 24 47901315 ps
T859 /workspace/coverage/default/33.pwrmgr_escalation_timeout.3613193831 Apr 02 03:14:49 PM PDT 24 Apr 02 03:14:51 PM PDT 24 196366000 ps
T860 /workspace/coverage/default/3.pwrmgr_glitch.3164888255 Apr 02 03:13:04 PM PDT 24 Apr 02 03:13:05 PM PDT 24 42584681 ps
T861 /workspace/coverage/default/13.pwrmgr_stress_all_with_rand_reset.1747777078 Apr 02 03:13:53 PM PDT 24 Apr 02 03:14:12 PM PDT 24 5380029266 ps
T862 /workspace/coverage/default/10.pwrmgr_sec_cm_rstmgr_intersig_mubi.3823478060 Apr 02 03:13:40 PM PDT 24 Apr 02 03:13:41 PM PDT 24 72973405 ps
T863 /workspace/coverage/default/27.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.120673684 Apr 02 03:14:38 PM PDT 24 Apr 02 03:14:40 PM PDT 24 1040133121 ps
T864 /workspace/coverage/default/37.pwrmgr_stress_all_with_rand_reset.4265627176 Apr 02 03:15:09 PM PDT 24 Apr 02 03:15:16 PM PDT 24 3848011493 ps
T865 /workspace/coverage/default/41.pwrmgr_lowpower_wakeup_race.2508517536 Apr 02 03:15:14 PM PDT 24 Apr 02 03:15:15 PM PDT 24 142551261 ps
T866 /workspace/coverage/default/2.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2557025549 Apr 02 03:12:57 PM PDT 24 Apr 02 03:13:00 PM PDT 24 976391858 ps
T867 /workspace/coverage/default/3.pwrmgr_stress_all.3228411331 Apr 02 03:13:07 PM PDT 24 Apr 02 03:13:08 PM PDT 24 776950120 ps
T868 /workspace/coverage/default/8.pwrmgr_global_esc.3314284155 Apr 02 03:13:31 PM PDT 24 Apr 02 03:13:32 PM PDT 24 66247711 ps
T869 /workspace/coverage/default/16.pwrmgr_esc_clk_rst_malfunc.3834765066 Apr 02 03:14:05 PM PDT 24 Apr 02 03:14:06 PM PDT 24 29276204 ps
T870 /workspace/coverage/default/9.pwrmgr_sec_cm_rstmgr_intersig_mubi.1269713857 Apr 02 03:13:35 PM PDT 24 Apr 02 03:13:36 PM PDT 24 70105529 ps
T871 /workspace/coverage/default/39.pwrmgr_lowpower_invalid.2621212105 Apr 02 03:15:14 PM PDT 24 Apr 02 03:15:14 PM PDT 24 52993694 ps
T872 /workspace/coverage/default/27.pwrmgr_reset.3796917457 Apr 02 03:14:35 PM PDT 24 Apr 02 03:14:36 PM PDT 24 48630845 ps
T873 /workspace/coverage/default/19.pwrmgr_esc_clk_rst_malfunc.1193405616 Apr 02 03:14:10 PM PDT 24 Apr 02 03:14:11 PM PDT 24 30264176 ps
T874 /workspace/coverage/default/1.pwrmgr_lowpower_invalid.1257719818 Apr 02 03:12:54 PM PDT 24 Apr 02 03:12:55 PM PDT 24 44704230 ps
T875 /workspace/coverage/default/41.pwrmgr_stress_all.773827624 Apr 02 03:15:19 PM PDT 24 Apr 02 03:15:22 PM PDT 24 568241881 ps
T876 /workspace/coverage/default/15.pwrmgr_reset_invalid.4027575292 Apr 02 03:13:56 PM PDT 24 Apr 02 03:13:57 PM PDT 24 263288776 ps
T877 /workspace/coverage/default/8.pwrmgr_disable_rom_integrity_check.3602200353 Apr 02 03:13:36 PM PDT 24 Apr 02 03:13:37 PM PDT 24 70200604 ps
T878 /workspace/coverage/default/11.pwrmgr_esc_clk_rst_malfunc.2463831623 Apr 02 03:13:42 PM PDT 24 Apr 02 03:13:42 PM PDT 24 29242082 ps
T879 /workspace/coverage/default/20.pwrmgr_smoke.2517104128 Apr 02 03:14:11 PM PDT 24 Apr 02 03:14:12 PM PDT 24 36650825 ps
T880 /workspace/coverage/default/16.pwrmgr_stress_all_with_rand_reset.497661383 Apr 02 03:14:00 PM PDT 24 Apr 02 03:14:38 PM PDT 24 10222331891 ps
T881 /workspace/coverage/default/22.pwrmgr_wakeup_reset.2509745005 Apr 02 03:14:19 PM PDT 24 Apr 02 03:14:20 PM PDT 24 463182384 ps
T882 /workspace/coverage/default/18.pwrmgr_glitch.3989736003 Apr 02 03:14:08 PM PDT 24 Apr 02 03:14:09 PM PDT 24 54037299 ps
T883 /workspace/coverage/default/47.pwrmgr_smoke.3205193871 Apr 02 03:15:47 PM PDT 24 Apr 02 03:15:48 PM PDT 24 31397697 ps
T884 /workspace/coverage/default/27.pwrmgr_sec_cm_ctrl_config_regwen.680015262 Apr 02 03:14:37 PM PDT 24 Apr 02 03:14:38 PM PDT 24 95518201 ps
T885 /workspace/coverage/default/30.pwrmgr_global_esc.734395423 Apr 02 03:14:45 PM PDT 24 Apr 02 03:14:46 PM PDT 24 29043641 ps
T886 /workspace/coverage/default/15.pwrmgr_lowpower_invalid.3560620827 Apr 02 03:13:57 PM PDT 24 Apr 02 03:14:00 PM PDT 24 41384565 ps
T887 /workspace/coverage/default/12.pwrmgr_wakeup_reset.977349690 Apr 02 03:13:46 PM PDT 24 Apr 02 03:13:48 PM PDT 24 266261113 ps
T888 /workspace/coverage/default/24.pwrmgr_sec_cm_ctrl_config_regwen.1724909355 Apr 02 03:14:38 PM PDT 24 Apr 02 03:14:40 PM PDT 24 262604815 ps
T889 /workspace/coverage/default/17.pwrmgr_stress_all_with_rand_reset.3819179576 Apr 02 03:14:05 PM PDT 24 Apr 02 03:14:38 PM PDT 24 9897708159 ps
T890 /workspace/coverage/default/41.pwrmgr_reset_invalid.1557668404 Apr 02 03:15:18 PM PDT 24 Apr 02 03:15:20 PM PDT 24 126677572 ps
T891 /workspace/coverage/default/37.pwrmgr_sec_cm_ctrl_config_regwen.4128004111 Apr 02 03:15:11 PM PDT 24 Apr 02 03:15:13 PM PDT 24 311337496 ps
T892 /workspace/coverage/default/40.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.1282666690 Apr 02 03:15:15 PM PDT 24 Apr 02 03:15:18 PM PDT 24 916579261 ps
T893 /workspace/coverage/default/32.pwrmgr_lowpower_wakeup_race.381684998 Apr 02 03:14:49 PM PDT 24 Apr 02 03:14:50 PM PDT 24 140802150 ps
T894 /workspace/coverage/default/33.pwrmgr_wakeup_reset.2140319777 Apr 02 03:14:52 PM PDT 24 Apr 02 03:14:53 PM PDT 24 138978298 ps
T895 /workspace/coverage/default/24.pwrmgr_reset.2025861942 Apr 02 03:14:38 PM PDT 24 Apr 02 03:14:39 PM PDT 24 90468257 ps
T896 /workspace/coverage/default/3.pwrmgr_sec_cm_ctrl_config_regwen.2592537593 Apr 02 03:13:04 PM PDT 24 Apr 02 03:13:05 PM PDT 24 135754138 ps
T897 /workspace/coverage/default/9.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.2748317980 Apr 02 03:13:32 PM PDT 24 Apr 02 03:13:35 PM PDT 24 1081845831 ps
T898 /workspace/coverage/default/6.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.2070599655 Apr 02 03:13:20 PM PDT 24 Apr 02 03:13:23 PM PDT 24 902561000 ps
T899 /workspace/coverage/default/49.pwrmgr_esc_clk_rst_malfunc.1170280618 Apr 02 03:15:41 PM PDT 24 Apr 02 03:15:43 PM PDT 24 37204140 ps
T900 /workspace/coverage/default/39.pwrmgr_reset.1069031510 Apr 02 03:15:12 PM PDT 24 Apr 02 03:15:13 PM PDT 24 33932177 ps
T901 /workspace/coverage/default/35.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3554100840 Apr 02 03:15:01 PM PDT 24 Apr 02 03:15:04 PM PDT 24 1223401972 ps
T902 /workspace/coverage/default/19.pwrmgr_aborted_low_power.67623679 Apr 02 03:14:12 PM PDT 24 Apr 02 03:14:13 PM PDT 24 62084071 ps
T903 /workspace/coverage/default/6.pwrmgr_global_esc.1341880660 Apr 02 03:13:24 PM PDT 24 Apr 02 03:13:25 PM PDT 24 28180520 ps
T904 /workspace/coverage/default/21.pwrmgr_sec_cm_rstmgr_intersig_mubi.1586977985 Apr 02 03:14:20 PM PDT 24 Apr 02 03:14:21 PM PDT 24 95455750 ps
T905 /workspace/coverage/default/48.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.1499465470 Apr 02 03:15:40 PM PDT 24 Apr 02 03:15:43 PM PDT 24 1176408952 ps
T906 /workspace/coverage/default/35.pwrmgr_disable_rom_integrity_check.3454346718 Apr 02 03:15:05 PM PDT 24 Apr 02 03:15:06 PM PDT 24 332077104 ps
T907 /workspace/coverage/default/41.pwrmgr_stress_all_with_rand_reset.2451110796 Apr 02 03:15:20 PM PDT 24 Apr 02 03:15:31 PM PDT 24 5947729796 ps
T908 /workspace/coverage/default/45.pwrmgr_global_esc.3872497316 Apr 02 03:15:28 PM PDT 24 Apr 02 03:15:29 PM PDT 24 64077315 ps
T909 /workspace/coverage/default/18.pwrmgr_sec_cm_ctrl_config_regwen.1759188791 Apr 02 03:14:06 PM PDT 24 Apr 02 03:14:07 PM PDT 24 233969354 ps
T910 /workspace/coverage/default/48.pwrmgr_escalation_timeout.1993831462 Apr 02 03:15:42 PM PDT 24 Apr 02 03:15:44 PM PDT 24 637989395 ps
T911 /workspace/coverage/default/24.pwrmgr_reset_invalid.642492465 Apr 02 03:14:31 PM PDT 24 Apr 02 03:14:32 PM PDT 24 170787094 ps
T912 /workspace/coverage/default/34.pwrmgr_smoke.2739802069 Apr 02 03:14:59 PM PDT 24 Apr 02 03:14:59 PM PDT 24 30389745 ps
T913 /workspace/coverage/default/2.pwrmgr_sec_cm_rstmgr_intersig_mubi.1452563239 Apr 02 03:12:59 PM PDT 24 Apr 02 03:13:00 PM PDT 24 65261494 ps
T146 /workspace/coverage/default/8.pwrmgr_stress_all_with_rand_reset.3589321913 Apr 02 03:13:30 PM PDT 24 Apr 02 03:13:45 PM PDT 24 4801214901 ps
T914 /workspace/coverage/default/41.pwrmgr_disable_rom_integrity_check.1719189975 Apr 02 03:15:23 PM PDT 24 Apr 02 03:15:24 PM PDT 24 105401759 ps
T915 /workspace/coverage/default/17.pwrmgr_wakeup.617694401 Apr 02 03:14:02 PM PDT 24 Apr 02 03:14:03 PM PDT 24 221512823 ps
T916 /workspace/coverage/default/7.pwrmgr_reset.4103360023 Apr 02 03:13:22 PM PDT 24 Apr 02 03:13:24 PM PDT 24 44451334 ps
T917 /workspace/coverage/default/26.pwrmgr_global_esc.3153649433 Apr 02 03:14:32 PM PDT 24 Apr 02 03:14:33 PM PDT 24 68301551 ps
T918 /workspace/coverage/default/19.pwrmgr_wakeup_reset.4025607946 Apr 02 03:14:05 PM PDT 24 Apr 02 03:14:06 PM PDT 24 239422320 ps
T919 /workspace/coverage/default/5.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.179680758 Apr 02 03:13:14 PM PDT 24 Apr 02 03:13:17 PM PDT 24 2037469989 ps
T920 /workspace/coverage/default/9.pwrmgr_wakeup_reset.3143394812 Apr 02 03:13:33 PM PDT 24 Apr 02 03:13:34 PM PDT 24 92733647 ps
T921 /workspace/coverage/default/44.pwrmgr_sec_cm_rstmgr_intersig_mubi.114809447 Apr 02 03:15:27 PM PDT 24 Apr 02 03:15:29 PM PDT 24 52934247 ps
T922 /workspace/coverage/default/31.pwrmgr_aborted_low_power.3871876989 Apr 02 03:14:46 PM PDT 24 Apr 02 03:14:47 PM PDT 24 29160679 ps
T923 /workspace/coverage/default/14.pwrmgr_disable_rom_integrity_check.1307260167 Apr 02 03:14:00 PM PDT 24 Apr 02 03:14:00 PM PDT 24 73386066 ps
T924 /workspace/coverage/default/13.pwrmgr_reset.1686539497 Apr 02 03:13:48 PM PDT 24 Apr 02 03:13:49 PM PDT 24 46411567 ps
T925 /workspace/coverage/default/3.pwrmgr_reset_invalid.382161529 Apr 02 03:13:04 PM PDT 24 Apr 02 03:13:04 PM PDT 24 156574006 ps
T926 /workspace/coverage/default/17.pwrmgr_reset.1403470810 Apr 02 03:14:01 PM PDT 24 Apr 02 03:14:03 PM PDT 24 97739209 ps
T927 /workspace/coverage/default/49.pwrmgr_lowpower_wakeup_race.2926105884 Apr 02 03:15:51 PM PDT 24 Apr 02 03:15:52 PM PDT 24 272994119 ps
T928 /workspace/coverage/default/11.pwrmgr_wakeup_reset.3775742667 Apr 02 03:13:40 PM PDT 24 Apr 02 03:13:41 PM PDT 24 80215236 ps
T929 /workspace/coverage/default/29.pwrmgr_sec_cm_rstmgr_intersig_mubi.1790407008 Apr 02 03:14:42 PM PDT 24 Apr 02 03:14:43 PM PDT 24 74876299 ps
T930 /workspace/coverage/default/36.pwrmgr_wakeup.2625848589 Apr 02 03:15:20 PM PDT 24 Apr 02 03:15:22 PM PDT 24 267673684 ps
T931 /workspace/coverage/default/16.pwrmgr_smoke.2676679503 Apr 02 03:13:58 PM PDT 24 Apr 02 03:13:59 PM PDT 24 28170701 ps
T932 /workspace/coverage/default/0.pwrmgr_glitch.284414114 Apr 02 03:12:49 PM PDT 24 Apr 02 03:12:50 PM PDT 24 97311015 ps
T933 /workspace/coverage/default/20.pwrmgr_reset.679038455 Apr 02 03:14:13 PM PDT 24 Apr 02 03:14:14 PM PDT 24 69637600 ps
T934 /workspace/coverage/default/12.pwrmgr_smoke.2456006924 Apr 02 03:13:41 PM PDT 24 Apr 02 03:13:42 PM PDT 24 66873546 ps
T935 /workspace/coverage/default/30.pwrmgr_stress_all.2038968684 Apr 02 03:14:47 PM PDT 24 Apr 02 03:14:51 PM PDT 24 1528516253 ps
T936 /workspace/coverage/default/25.pwrmgr_lowpower_wakeup_race.3418184839 Apr 02 03:14:30 PM PDT 24 Apr 02 03:14:31 PM PDT 24 266526908 ps
T937 /workspace/coverage/default/7.pwrmgr_global_esc.3803500799 Apr 02 03:13:27 PM PDT 24 Apr 02 03:13:28 PM PDT 24 44414635 ps
T938 /workspace/coverage/default/49.pwrmgr_global_esc.4280021919 Apr 02 03:15:45 PM PDT 24 Apr 02 03:15:46 PM PDT 24 24275646 ps
T939 /workspace/coverage/default/27.pwrmgr_escalation_timeout.1791919633 Apr 02 03:14:35 PM PDT 24 Apr 02 03:14:36 PM PDT 24 164924443 ps
T940 /workspace/coverage/default/15.pwrmgr_escalation_timeout.1775029296 Apr 02 03:13:58 PM PDT 24 Apr 02 03:14:00 PM PDT 24 160743924 ps
T941 /workspace/coverage/default/8.pwrmgr_smoke.1755771014 Apr 02 03:13:30 PM PDT 24 Apr 02 03:13:31 PM PDT 24 29872552 ps
T942 /workspace/coverage/default/30.pwrmgr_lowpower_wakeup_race.2066264349 Apr 02 03:14:47 PM PDT 24 Apr 02 03:14:48 PM PDT 24 113576112 ps
T943 /workspace/coverage/default/5.pwrmgr_stress_all.61088424 Apr 02 03:13:21 PM PDT 24 Apr 02 03:13:25 PM PDT 24 667045723 ps
T944 /workspace/coverage/default/39.pwrmgr_smoke.3458421688 Apr 02 03:15:11 PM PDT 24 Apr 02 03:15:12 PM PDT 24 37167076 ps
T945 /workspace/coverage/default/36.pwrmgr_sec_cm_ctrl_config_regwen.94077736 Apr 02 03:15:04 PM PDT 24 Apr 02 03:15:06 PM PDT 24 271579798 ps
T946 /workspace/coverage/default/37.pwrmgr_sec_cm_rstmgr_intersig_mubi.1315367233 Apr 02 03:15:07 PM PDT 24 Apr 02 03:15:09 PM PDT 24 95524569 ps
T947 /workspace/coverage/default/49.pwrmgr_lowpower_invalid.4207925055 Apr 02 03:15:49 PM PDT 24 Apr 02 03:15:50 PM PDT 24 41597971 ps
T948 /workspace/coverage/default/14.pwrmgr_aborted_low_power.3009986655 Apr 02 03:13:51 PM PDT 24 Apr 02 03:13:52 PM PDT 24 47674919 ps
T949 /workspace/coverage/default/25.pwrmgr_reset.3200599829 Apr 02 03:14:38 PM PDT 24 Apr 02 03:14:39 PM PDT 24 104053238 ps
T950 /workspace/coverage/default/32.pwrmgr_reset.2042452280 Apr 02 03:14:47 PM PDT 24 Apr 02 03:14:48 PM PDT 24 53316955 ps
T24 /workspace/coverage/default/0.pwrmgr_sec_cm.1046230093 Apr 02 03:12:53 PM PDT 24 Apr 02 03:12:55 PM PDT 24 681829593 ps
T951 /workspace/coverage/default/34.pwrmgr_wakeup.2003316947 Apr 02 03:14:56 PM PDT 24 Apr 02 03:14:57 PM PDT 24 248927268 ps
T952 /workspace/coverage/default/3.pwrmgr_aborted_low_power.1206515123 Apr 02 03:13:05 PM PDT 24 Apr 02 03:13:06 PM PDT 24 29270375 ps
T953 /workspace/coverage/default/36.pwrmgr_glitch.1653459001 Apr 02 03:15:06 PM PDT 24 Apr 02 03:15:08 PM PDT 24 58730777 ps
T954 /workspace/coverage/default/45.pwrmgr_sec_cm_rstmgr_intersig_mubi.1607749106 Apr 02 03:15:30 PM PDT 24 Apr 02 03:15:31 PM PDT 24 153638345 ps
T955 /workspace/coverage/default/36.pwrmgr_disable_rom_integrity_check.3502219323 Apr 02 03:15:05 PM PDT 24 Apr 02 03:15:06 PM PDT 24 56642529 ps
T956 /workspace/coverage/default/38.pwrmgr_stress_all.4184595559 Apr 02 03:15:10 PM PDT 24 Apr 02 03:15:13 PM PDT 24 673142772 ps
T957 /workspace/coverage/default/40.pwrmgr_esc_clk_rst_malfunc.3073684100 Apr 02 03:15:14 PM PDT 24 Apr 02 03:15:15 PM PDT 24 38493658 ps
T958 /workspace/coverage/default/3.pwrmgr_lowpower_wakeup_race.4255327994 Apr 02 03:13:00 PM PDT 24 Apr 02 03:13:01 PM PDT 24 87378717 ps
T959 /workspace/coverage/default/45.pwrmgr_sec_cm_ctrl_config_regwen.1097848873 Apr 02 03:15:29 PM PDT 24 Apr 02 03:15:30 PM PDT 24 161894165 ps
T960 /workspace/coverage/default/2.pwrmgr_aborted_low_power.3292820985 Apr 02 03:13:03 PM PDT 24 Apr 02 03:13:04 PM PDT 24 33136186 ps
T961 /workspace/coverage/default/38.pwrmgr_sec_cm_rstmgr_intersig_mubi.2134164579 Apr 02 03:15:11 PM PDT 24 Apr 02 03:15:12 PM PDT 24 49299732 ps
T962 /workspace/coverage/default/26.pwrmgr_stress_all.2480845288 Apr 02 03:14:39 PM PDT 24 Apr 02 03:14:40 PM PDT 24 180352595 ps
T963 /workspace/coverage/default/37.pwrmgr_aborted_low_power.2526600796 Apr 02 03:15:05 PM PDT 24 Apr 02 03:15:07 PM PDT 24 53242875 ps
T964 /workspace/coverage/default/47.pwrmgr_global_esc.2803778544 Apr 02 03:15:48 PM PDT 24 Apr 02 03:15:49 PM PDT 24 68069545 ps
T965 /workspace/coverage/default/41.pwrmgr_sec_cm_rstmgr_intersig_mubi.3334659458 Apr 02 03:15:22 PM PDT 24 Apr 02 03:15:23 PM PDT 24 100493118 ps
T966 /workspace/coverage/default/38.pwrmgr_reset_invalid.2841153075 Apr 02 03:15:14 PM PDT 24 Apr 02 03:15:15 PM PDT 24 163649152 ps
T967 /workspace/coverage/default/2.pwrmgr_sec_cm_ctrl_config_regwen.1290190568 Apr 02 03:13:03 PM PDT 24 Apr 02 03:13:04 PM PDT 24 216823529 ps
T968 /workspace/coverage/default/6.pwrmgr_disable_rom_integrity_check.4046087670 Apr 02 03:13:28 PM PDT 24 Apr 02 03:13:29 PM PDT 24 57962030 ps
T969 /workspace/coverage/default/32.pwrmgr_global_esc.1289247316 Apr 02 03:14:49 PM PDT 24 Apr 02 03:14:49 PM PDT 24 41059844 ps
T970 /workspace/coverage/default/40.pwrmgr_glitch.2156837608 Apr 02 03:15:18 PM PDT 24 Apr 02 03:15:19 PM PDT 24 42326996 ps
T971 /workspace/coverage/default/17.pwrmgr_wakeup_reset.2315147480 Apr 02 03:14:02 PM PDT 24 Apr 02 03:14:03 PM PDT 24 247322649 ps
T972 /workspace/coverage/default/18.pwrmgr_sec_cm_rstmgr_intersig_mubi.3645751150 Apr 02 03:14:10 PM PDT 24 Apr 02 03:14:11 PM PDT 24 111091929 ps
T973 /workspace/coverage/default/36.pwrmgr_smoke.1868800668 Apr 02 03:15:06 PM PDT 24 Apr 02 03:15:07 PM PDT 24 37508135 ps
T974 /workspace/coverage/default/26.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.3866644232 Apr 02 03:14:32 PM PDT 24 Apr 02 03:14:35 PM PDT 24 790553390 ps
T975 /workspace/coverage/default/47.pwrmgr_lowpower_wakeup_race.3289964398 Apr 02 03:15:45 PM PDT 24 Apr 02 03:15:46 PM PDT 24 43680792 ps
T976 /workspace/coverage/default/7.pwrmgr_sec_cm_ctrl_config_regwen.3796015999 Apr 02 03:13:26 PM PDT 24 Apr 02 03:13:27 PM PDT 24 283864647 ps
T977 /workspace/coverage/default/40.pwrmgr_aborted_low_power.2357667025 Apr 02 03:15:15 PM PDT 24 Apr 02 03:15:16 PM PDT 24 113310132 ps
T978 /workspace/coverage/default/42.pwrmgr_escalation_timeout.3640788831 Apr 02 03:15:28 PM PDT 24 Apr 02 03:15:30 PM PDT 24 606345315 ps
T979 /workspace/coverage/default/6.pwrmgr_sec_cm_ctrl_config_regwen.2120337015 Apr 02 03:13:23 PM PDT 24 Apr 02 03:13:25 PM PDT 24 173426292 ps
T980 /workspace/coverage/default/0.pwrmgr_wakeup_reset.376102041 Apr 02 03:12:45 PM PDT 24 Apr 02 03:12:47 PM PDT 24 295634135 ps
T981 /workspace/coverage/default/48.pwrmgr_sec_cm_rstmgr_intersig_mubi.2187219490 Apr 02 03:15:46 PM PDT 24 Apr 02 03:15:47 PM PDT 24 108881262 ps
T982 /workspace/coverage/default/5.pwrmgr_stress_all_with_rand_reset.1694984127 Apr 02 03:13:17 PM PDT 24 Apr 02 03:13:28 PM PDT 24 9460432225 ps
T983 /workspace/coverage/default/39.pwrmgr_global_esc.3447170883 Apr 02 03:15:10 PM PDT 24 Apr 02 03:15:11 PM PDT 24 45352465 ps
T984 /workspace/coverage/default/1.pwrmgr_escalation_timeout.3116208358 Apr 02 03:12:53 PM PDT 24 Apr 02 03:12:55 PM PDT 24 656899934 ps
T985 /workspace/coverage/default/34.pwrmgr_reset.1570975883 Apr 02 03:14:56 PM PDT 24 Apr 02 03:14:57 PM PDT 24 70206744 ps
T986 /workspace/coverage/default/14.pwrmgr_reset_invalid.1662273150 Apr 02 03:13:54 PM PDT 24 Apr 02 03:13:56 PM PDT 24 110149215 ps
T987 /workspace/coverage/default/43.pwrmgr_reset.3873759735 Apr 02 03:15:24 PM PDT 24 Apr 02 03:15:24 PM PDT 24 57415366 ps
T988 /workspace/coverage/default/2.pwrmgr_sec_cm_rom_ctrl_intersig_mubi.312069400 Apr 02 03:12:59 PM PDT 24 Apr 02 03:13:01 PM PDT 24 1395655799 ps
T989 /workspace/coverage/default/39.pwrmgr_sec_cm_lc_ctrl_intersig_mubi.412436682 Apr 02 03:15:12 PM PDT 24 Apr 02 03:15:14 PM PDT 24 1191373466 ps
T990 /workspace/coverage/default/26.pwrmgr_wakeup_reset.1718757287 Apr 02 03:14:32 PM PDT 24 Apr 02 03:14:33 PM PDT 24 58548551 ps
T991 /workspace/coverage/default/5.pwrmgr_reset_invalid.2678682555 Apr 02 03:13:17 PM PDT 24 Apr 02 03:13:18 PM PDT 24 219886168 ps
T992 /workspace/coverage/default/21.pwrmgr_global_esc.3354245157 Apr 02 03:14:15 PM PDT 24 Apr 02 03:14:16 PM PDT 24 124924949 ps
T993 /workspace/coverage/default/38.pwrmgr_smoke.4122146740 Apr 02 03:15:09 PM PDT 24 Apr 02 03:15:10 PM PDT 24 61668176 ps
T994 /workspace/coverage/default/9.pwrmgr_lowpower_wakeup_race.1623800298 Apr 02 03:13:33 PM PDT 24 Apr 02 03:13:34 PM PDT 24 187263941 ps
T995 /workspace/coverage/default/32.pwrmgr_escalation_timeout.1868286186 Apr 02 03:14:52 PM PDT 24 Apr 02 03:14:53 PM PDT 24 633462851 ps
T996 /workspace/coverage/default/43.pwrmgr_sec_cm_rstmgr_intersig_mubi.626162381 Apr 02 03:15:25 PM PDT 24 Apr 02 03:15:26 PM PDT 24 331880214 ps
T997 /workspace/coverage/default/32.pwrmgr_aborted_low_power.1985804287 Apr 02 03:14:53 PM PDT 24 Apr 02 03:14:57 PM PDT 24 46561281 ps
T998 /workspace/coverage/default/22.pwrmgr_wakeup.1053551001 Apr 02 03:14:18 PM PDT 24 Apr 02 03:14:19 PM PDT 24 279948938 ps
T999 /workspace/coverage/default/27.pwrmgr_reset_invalid.4131019169 Apr 02 03:14:34 PM PDT 24 Apr 02 03:14:35 PM PDT 24 106362894 ps
T1000 /workspace/coverage/default/16.pwrmgr_disable_rom_integrity_check.769565232 Apr 02 03:14:07 PM PDT 24 Apr 02 03:14:08 PM PDT 24 72748496 ps
T53 /workspace/coverage/cover_reg_top/6.pwrmgr_csr_mem_rw_with_rand_reset.1796267475 Apr 02 12:43:17 PM PDT 24 Apr 02 12:43:18 PM PDT 24 327904433 ps
T54 /workspace/coverage/cover_reg_top/12.pwrmgr_csr_mem_rw_with_rand_reset.2232512796 Apr 02 12:43:18 PM PDT 24 Apr 02 12:43:20 PM PDT 24 48798215 ps
T63 /workspace/coverage/cover_reg_top/18.pwrmgr_csr_mem_rw_with_rand_reset.1910177510 Apr 02 12:43:26 PM PDT 24 Apr 02 12:43:27 PM PDT 24 97722602 ps
T60 /workspace/coverage/cover_reg_top/3.pwrmgr_intr_test.1299101653 Apr 02 12:43:06 PM PDT 24 Apr 02 12:43:07 PM PDT 24 29684552 ps
T40 /workspace/coverage/cover_reg_top/19.pwrmgr_tl_intg_err.2121807791 Apr 02 12:43:31 PM PDT 24 Apr 02 12:43:32 PM PDT 24 190739964 ps
T41 /workspace/coverage/cover_reg_top/4.pwrmgr_tl_intg_err.4234534291 Apr 02 12:43:09 PM PDT 24 Apr 02 12:43:11 PM PDT 24 420704465 ps
T99 /workspace/coverage/cover_reg_top/19.pwrmgr_csr_mem_rw_with_rand_reset.2143321771 Apr 02 12:43:25 PM PDT 24 Apr 02 12:43:26 PM PDT 24 89410245 ps
T61 /workspace/coverage/cover_reg_top/36.pwrmgr_intr_test.4180369433 Apr 02 12:43:33 PM PDT 24 Apr 02 12:43:34 PM PDT 24 45485090 ps
T62 /workspace/coverage/cover_reg_top/29.pwrmgr_intr_test.4279173278 Apr 02 12:43:31 PM PDT 24 Apr 02 12:43:31 PM PDT 24 24567697 ps
T42 /workspace/coverage/cover_reg_top/7.pwrmgr_tl_intg_err.2385584309 Apr 02 12:43:14 PM PDT 24 Apr 02 12:43:16 PM PDT 24 203889080 ps
T46 /workspace/coverage/cover_reg_top/14.pwrmgr_csr_mem_rw_with_rand_reset.2939224559 Apr 02 12:43:23 PM PDT 24 Apr 02 12:43:25 PM PDT 24 37849696 ps
T165 /workspace/coverage/cover_reg_top/44.pwrmgr_intr_test.2864919667 Apr 02 12:43:34 PM PDT 24 Apr 02 12:43:34 PM PDT 24 22709578 ps
T45 /workspace/coverage/cover_reg_top/11.pwrmgr_tl_intg_err.3162041997 Apr 02 12:43:19 PM PDT 24 Apr 02 12:43:21 PM PDT 24 249836064 ps
T162 /workspace/coverage/cover_reg_top/10.pwrmgr_intr_test.2286902016 Apr 02 12:43:17 PM PDT 24 Apr 02 12:43:18 PM PDT 24 24315792 ps
T164 /workspace/coverage/cover_reg_top/15.pwrmgr_intr_test.441421313 Apr 02 12:43:21 PM PDT 24 Apr 02 12:43:22 PM PDT 24 89758883 ps
T163 /workspace/coverage/cover_reg_top/13.pwrmgr_intr_test.197579955 Apr 02 12:43:18 PM PDT 24 Apr 02 12:43:19 PM PDT 24 51348206 ps
T147 /workspace/coverage/cover_reg_top/0.pwrmgr_csr_bit_bash.4243404806 Apr 02 12:43:04 PM PDT 24 Apr 02 12:43:07 PM PDT 24 324627679 ps
T1001 /workspace/coverage/cover_reg_top/0.pwrmgr_intr_test.2187404715 Apr 02 12:42:59 PM PDT 24 Apr 02 12:43:00 PM PDT 24 19660236 ps
T1002 /workspace/coverage/cover_reg_top/4.pwrmgr_intr_test.1136516762 Apr 02 12:43:11 PM PDT 24 Apr 02 12:43:12 PM PDT 24 42453328 ps
T1003 /workspace/coverage/cover_reg_top/49.pwrmgr_intr_test.2804044835 Apr 02 12:43:35 PM PDT 24 Apr 02 12:43:36 PM PDT 24 40136497 ps
T1004 /workspace/coverage/cover_reg_top/38.pwrmgr_intr_test.3281765661 Apr 02 12:43:36 PM PDT 24 Apr 02 12:43:37 PM PDT 24 24513555 ps
T1005 /workspace/coverage/cover_reg_top/40.pwrmgr_intr_test.2448984359 Apr 02 12:43:36 PM PDT 24 Apr 02 12:43:37 PM PDT 24 18536340 ps
T1006 /workspace/coverage/cover_reg_top/48.pwrmgr_intr_test.1615906455 Apr 02 12:43:36 PM PDT 24 Apr 02 12:43:37 PM PDT 24 17172119 ps
T129 /workspace/coverage/cover_reg_top/16.pwrmgr_same_csr_outstanding.1060375229 Apr 02 12:43:23 PM PDT 24 Apr 02 12:43:25 PM PDT 24 31535531 ps
T1007 /workspace/coverage/cover_reg_top/35.pwrmgr_intr_test.1398497802 Apr 02 12:43:33 PM PDT 24 Apr 02 12:43:34 PM PDT 24 22370231 ps
T1008 /workspace/coverage/cover_reg_top/27.pwrmgr_intr_test.1493776717 Apr 02 12:43:32 PM PDT 24 Apr 02 12:43:33 PM PDT 24 16907827 ps
T130 /workspace/coverage/cover_reg_top/17.pwrmgr_same_csr_outstanding.3148805783 Apr 02 12:43:22 PM PDT 24 Apr 02 12:43:23 PM PDT 24 35841798 ps
T1009 /workspace/coverage/cover_reg_top/7.pwrmgr_intr_test.619778197 Apr 02 12:43:16 PM PDT 24 Apr 02 12:43:16 PM PDT 24 90180998 ps
T48 /workspace/coverage/cover_reg_top/1.pwrmgr_csr_mem_rw_with_rand_reset.1930306443 Apr 02 12:43:04 PM PDT 24 Apr 02 12:43:05 PM PDT 24 48862252 ps
T67 /workspace/coverage/cover_reg_top/0.pwrmgr_tl_intg_err.3754912175 Apr 02 12:42:59 PM PDT 24 Apr 02 12:43:00 PM PDT 24 225223531 ps
T117 /workspace/coverage/cover_reg_top/1.pwrmgr_csr_rw.3947889144 Apr 02 12:43:04 PM PDT 24 Apr 02 12:43:05 PM PDT 24 42431420 ps
T1010 /workspace/coverage/cover_reg_top/2.pwrmgr_csr_bit_bash.3516317655 Apr 02 12:43:04 PM PDT 24 Apr 02 12:43:06 PM PDT 24 622953635 ps
T1011 /workspace/coverage/cover_reg_top/31.pwrmgr_intr_test.1264032181 Apr 02 12:43:30 PM PDT 24 Apr 02 12:43:31 PM PDT 24 39229515 ps
T131 /workspace/coverage/cover_reg_top/1.pwrmgr_same_csr_outstanding.2105175581 Apr 02 12:43:03 PM PDT 24 Apr 02 12:43:03 PM PDT 24 55040258 ps
T49 /workspace/coverage/cover_reg_top/18.pwrmgr_tl_errors.2393701896 Apr 02 12:43:26 PM PDT 24 Apr 02 12:43:28 PM PDT 24 61253576 ps
T1012 /workspace/coverage/cover_reg_top/46.pwrmgr_intr_test.681072308 Apr 02 12:43:33 PM PDT 24 Apr 02 12:43:34 PM PDT 24 58804543 ps
T118 /workspace/coverage/cover_reg_top/0.pwrmgr_csr_aliasing.417943727 Apr 02 12:43:03 PM PDT 24 Apr 02 12:43:04 PM PDT 24 48678684 ps
T132 /workspace/coverage/cover_reg_top/6.pwrmgr_same_csr_outstanding.395495523 Apr 02 12:43:11 PM PDT 24 Apr 02 12:43:12 PM PDT 24 162599098 ps
T56 /workspace/coverage/cover_reg_top/7.pwrmgr_csr_mem_rw_with_rand_reset.4190043203 Apr 02 12:43:17 PM PDT 24 Apr 02 12:43:19 PM PDT 24 94314734 ps
T1013 /workspace/coverage/cover_reg_top/1.pwrmgr_intr_test.1677490155 Apr 02 12:43:03 PM PDT 24 Apr 02 12:43:03 PM PDT 24 36319289 ps
T59 /workspace/coverage/cover_reg_top/19.pwrmgr_tl_errors.976789931 Apr 02 12:43:26 PM PDT 24 Apr 02 12:43:28 PM PDT 24 196324371 ps
T1014 /workspace/coverage/cover_reg_top/41.pwrmgr_intr_test.60562242 Apr 02 12:43:34 PM PDT 24 Apr 02 12:43:34 PM PDT 24 53066009 ps
T1015 /workspace/coverage/cover_reg_top/37.pwrmgr_intr_test.4198136203 Apr 02 12:43:34 PM PDT 24 Apr 02 12:43:34 PM PDT 24 33396157 ps
T1016 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_hw_reset.191291732 Apr 02 12:43:09 PM PDT 24 Apr 02 12:43:09 PM PDT 24 36415643 ps
T1017 /workspace/coverage/cover_reg_top/4.pwrmgr_csr_bit_bash.2764738039 Apr 02 12:43:10 PM PDT 24 Apr 02 12:43:12 PM PDT 24 70869633 ps
T69 /workspace/coverage/cover_reg_top/10.pwrmgr_tl_errors.3243536367 Apr 02 12:43:23 PM PDT 24 Apr 02 12:43:26 PM PDT 24 184464903 ps
T1018 /workspace/coverage/cover_reg_top/9.pwrmgr_intr_test.2252333205 Apr 02 12:43:16 PM PDT 24 Apr 02 12:43:17 PM PDT 24 114402545 ps
T133 /workspace/coverage/cover_reg_top/15.pwrmgr_same_csr_outstanding.3244619645 Apr 02 12:43:25 PM PDT 24 Apr 02 12:43:26 PM PDT 24 82318060 ps
T70 /workspace/coverage/cover_reg_top/3.pwrmgr_csr_mem_rw_with_rand_reset.569757656 Apr 02 12:43:05 PM PDT 24 Apr 02 12:43:06 PM PDT 24 39684286 ps
T1019 /workspace/coverage/cover_reg_top/11.pwrmgr_intr_test.3174149653 Apr 02 12:43:23 PM PDT 24 Apr 02 12:43:25 PM PDT 24 22251638 ps
T57 /workspace/coverage/cover_reg_top/3.pwrmgr_tl_intg_err.3045743202 Apr 02 12:43:05 PM PDT 24 Apr 02 12:43:06 PM PDT 24 182280716 ps
T119 /workspace/coverage/cover_reg_top/7.pwrmgr_csr_rw.3660605772 Apr 02 12:43:16 PM PDT 24 Apr 02 12:43:17 PM PDT 24 19523063 ps
T71 /workspace/coverage/cover_reg_top/1.pwrmgr_tl_errors.433174663 Apr 02 12:43:03 PM PDT 24 Apr 02 12:43:06 PM PDT 24 437892617 ps
T1020 /workspace/coverage/cover_reg_top/15.pwrmgr_csr_rw.3282315069 Apr 02 12:43:24 PM PDT 24 Apr 02 12:43:25 PM PDT 24 28700218 ps
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