Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7297 |
1 |
|
|
T4 |
3 |
|
T5 |
9 |
|
T8 |
6 |
auto[1] |
19921 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12275 |
1 |
|
|
T3 |
26 |
|
T4 |
3 |
|
T5 |
21 |
auto[1] |
14943 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
24 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13080 |
1 |
|
|
T1 |
1 |
|
T3 |
25 |
|
T4 |
5 |
auto[1] |
14138 |
1 |
|
|
T2 |
1 |
|
T3 |
25 |
|
T4 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1669 |
1 |
|
|
T4 |
1 |
|
T5 |
3 |
|
T8 |
3 |
auto[0] |
auto[0] |
auto[1] |
1700 |
1 |
|
|
T5 |
2 |
|
T8 |
2 |
|
T14 |
47 |
auto[0] |
auto[1] |
auto[0] |
4669 |
1 |
|
|
T3 |
14 |
|
T4 |
1 |
|
T5 |
7 |
auto[0] |
auto[1] |
auto[1] |
4237 |
1 |
|
|
T3 |
12 |
|
T4 |
1 |
|
T5 |
9 |
auto[1] |
auto[0] |
auto[0] |
1674 |
1 |
|
|
T4 |
2 |
|
T5 |
3 |
|
T14 |
44 |
auto[1] |
auto[0] |
auto[1] |
2254 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T14 |
52 |
auto[1] |
auto[1] |
auto[0] |
5068 |
1 |
|
|
T1 |
1 |
|
T3 |
11 |
|
T4 |
1 |
auto[1] |
auto[1] |
auto[1] |
5947 |
1 |
|
|
T2 |
1 |
|
T3 |
13 |
|
T4 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7297 |
1 |
|
|
T4 |
3 |
|
T5 |
9 |
|
T8 |
6 |
auto[1] |
19921 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12176 |
1 |
|
|
T3 |
12 |
|
T4 |
7 |
|
T5 |
26 |
auto[1] |
15042 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
38 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12975 |
1 |
|
|
T2 |
1 |
|
T3 |
20 |
|
T4 |
5 |
auto[1] |
14243 |
1 |
|
|
T1 |
1 |
|
T3 |
30 |
|
T4 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1638 |
1 |
|
|
T4 |
1 |
|
T5 |
4 |
|
T8 |
3 |
auto[0] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T5 |
4 |
|
T8 |
1 |
|
T14 |
41 |
auto[0] |
auto[1] |
auto[0] |
4661 |
1 |
|
|
T3 |
8 |
|
T4 |
3 |
|
T5 |
9 |
auto[0] |
auto[1] |
auto[1] |
4202 |
1 |
|
|
T3 |
4 |
|
T4 |
3 |
|
T5 |
9 |
auto[1] |
auto[0] |
auto[0] |
1680 |
1 |
|
|
T4 |
1 |
|
T5 |
1 |
|
T8 |
1 |
auto[1] |
auto[0] |
auto[1] |
2304 |
1 |
|
|
T4 |
1 |
|
T8 |
1 |
|
T14 |
61 |
auto[1] |
auto[1] |
auto[0] |
4996 |
1 |
|
|
T2 |
1 |
|
T3 |
12 |
|
T5 |
7 |
auto[1] |
auto[1] |
auto[1] |
6062 |
1 |
|
|
T1 |
1 |
|
T3 |
26 |
|
T5 |
13 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7297 |
1 |
|
|
T4 |
3 |
|
T5 |
9 |
|
T8 |
6 |
auto[1] |
19921 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12301 |
1 |
|
|
T3 |
27 |
|
T4 |
2 |
|
T5 |
16 |
auto[1] |
14917 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
23 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13007 |
1 |
|
|
T3 |
19 |
|
T4 |
5 |
|
T5 |
27 |
auto[1] |
14211 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
31 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1662 |
1 |
|
|
T5 |
3 |
|
T14 |
39 |
|
T15 |
22 |
auto[0] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T4 |
1 |
|
T8 |
1 |
|
T14 |
56 |
auto[0] |
auto[1] |
auto[0] |
4648 |
1 |
|
|
T3 |
10 |
|
T5 |
7 |
|
T8 |
5 |
auto[0] |
auto[1] |
auto[1] |
4256 |
1 |
|
|
T3 |
17 |
|
T4 |
1 |
|
T5 |
6 |
auto[1] |
auto[0] |
auto[0] |
1668 |
1 |
|
|
T4 |
1 |
|
T5 |
2 |
|
T8 |
2 |
auto[1] |
auto[0] |
auto[1] |
2232 |
1 |
|
|
T4 |
1 |
|
T5 |
4 |
|
T8 |
3 |
auto[1] |
auto[1] |
auto[0] |
5029 |
1 |
|
|
T3 |
9 |
|
T4 |
4 |
|
T5 |
15 |
auto[1] |
auto[1] |
auto[1] |
5988 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
14 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7297 |
1 |
|
|
T4 |
3 |
|
T5 |
9 |
|
T8 |
6 |
auto[1] |
19921 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12070 |
1 |
|
|
T3 |
28 |
|
T4 |
6 |
|
T5 |
17 |
auto[1] |
15148 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
22 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12814 |
1 |
|
|
T2 |
1 |
|
T3 |
27 |
|
T4 |
5 |
auto[1] |
14404 |
1 |
|
|
T1 |
1 |
|
T3 |
23 |
|
T4 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1595 |
1 |
|
|
T4 |
2 |
|
T5 |
1 |
|
T8 |
1 |
auto[0] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T4 |
1 |
|
T5 |
4 |
|
T8 |
1 |
auto[0] |
auto[1] |
auto[0] |
4588 |
1 |
|
|
T3 |
17 |
|
T4 |
2 |
|
T5 |
8 |
auto[0] |
auto[1] |
auto[1] |
4211 |
1 |
|
|
T3 |
11 |
|
T4 |
1 |
|
T5 |
4 |
auto[1] |
auto[0] |
auto[0] |
1735 |
1 |
|
|
T5 |
3 |
|
T8 |
2 |
|
T14 |
48 |
auto[1] |
auto[0] |
auto[1] |
2291 |
1 |
|
|
T5 |
1 |
|
T8 |
2 |
|
T14 |
62 |
auto[1] |
auto[1] |
auto[0] |
4896 |
1 |
|
|
T2 |
1 |
|
T3 |
10 |
|
T4 |
1 |
auto[1] |
auto[1] |
auto[1] |
6226 |
1 |
|
|
T1 |
1 |
|
T3 |
12 |
|
T4 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7297 |
1 |
|
|
T4 |
3 |
|
T5 |
9 |
|
T8 |
6 |
auto[1] |
19921 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12277 |
1 |
|
|
T3 |
21 |
|
T4 |
5 |
|
T5 |
19 |
auto[1] |
14941 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
29 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12865 |
1 |
|
|
T1 |
1 |
|
T3 |
25 |
|
T4 |
3 |
auto[1] |
14353 |
1 |
|
|
T2 |
1 |
|
T3 |
25 |
|
T4 |
6 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1711 |
1 |
|
|
T5 |
2 |
|
T8 |
2 |
|
T14 |
42 |
auto[0] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T5 |
2 |
|
T8 |
2 |
|
T14 |
53 |
auto[0] |
auto[1] |
auto[0] |
4631 |
1 |
|
|
T3 |
9 |
|
T4 |
1 |
|
T5 |
9 |
auto[0] |
auto[1] |
auto[1] |
4273 |
1 |
|
|
T3 |
12 |
|
T4 |
4 |
|
T5 |
6 |
auto[1] |
auto[0] |
auto[0] |
1654 |
1 |
|
|
T4 |
1 |
|
T5 |
3 |
|
T8 |
1 |
auto[1] |
auto[0] |
auto[1] |
2270 |
1 |
|
|
T4 |
2 |
|
T5 |
2 |
|
T8 |
1 |
auto[1] |
auto[1] |
auto[0] |
4869 |
1 |
|
|
T1 |
1 |
|
T3 |
16 |
|
T4 |
1 |
auto[1] |
auto[1] |
auto[1] |
6148 |
1 |
|
|
T2 |
1 |
|
T3 |
13 |
|
T5 |
13 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7297 |
1 |
|
|
T4 |
3 |
|
T5 |
9 |
|
T8 |
6 |
auto[1] |
19921 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12300 |
1 |
|
|
T3 |
23 |
|
T4 |
5 |
|
T5 |
19 |
auto[1] |
14918 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
27 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12949 |
1 |
|
|
T2 |
1 |
|
T3 |
24 |
|
T4 |
4 |
auto[1] |
14269 |
1 |
|
|
T1 |
1 |
|
T3 |
26 |
|
T4 |
5 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1717 |
1 |
|
|
T4 |
1 |
|
T5 |
3 |
|
T14 |
47 |
auto[0] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T4 |
1 |
|
T5 |
1 |
|
T8 |
2 |
auto[0] |
auto[1] |
auto[0] |
4593 |
1 |
|
|
T3 |
10 |
|
T4 |
1 |
|
T5 |
9 |
auto[0] |
auto[1] |
auto[1] |
4235 |
1 |
|
|
T3 |
13 |
|
T4 |
2 |
|
T5 |
6 |
auto[1] |
auto[0] |
auto[0] |
1625 |
1 |
|
|
T5 |
2 |
|
T8 |
2 |
|
T14 |
36 |
auto[1] |
auto[0] |
auto[1] |
2200 |
1 |
|
|
T4 |
1 |
|
T5 |
3 |
|
T8 |
2 |
auto[1] |
auto[1] |
auto[0] |
5014 |
1 |
|
|
T2 |
1 |
|
T3 |
14 |
|
T4 |
2 |
auto[1] |
auto[1] |
auto[1] |
6079 |
1 |
|
|
T1 |
1 |
|
T3 |
13 |
|
T4 |
1 |