Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7470 |
1 |
|
|
T5 |
4 |
|
T8 |
8 |
|
T9 |
4 |
auto[1] |
20543 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12557 |
1 |
|
|
T5 |
4 |
|
T7 |
19 |
|
T8 |
9 |
auto[1] |
15456 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
31 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13217 |
1 |
|
|
T5 |
4 |
|
T7 |
24 |
|
T8 |
10 |
auto[1] |
14796 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
26 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1655 |
1 |
|
|
T5 |
2 |
|
T8 |
2 |
|
T53 |
1 |
auto[0] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T8 |
2 |
|
T9 |
2 |
|
T46 |
2 |
auto[0] |
auto[1] |
auto[0] |
4701 |
1 |
|
|
T5 |
1 |
|
T7 |
11 |
|
T8 |
3 |
auto[0] |
auto[1] |
auto[1] |
4509 |
1 |
|
|
T5 |
1 |
|
T7 |
8 |
|
T8 |
2 |
auto[1] |
auto[0] |
auto[0] |
1771 |
1 |
|
|
T5 |
1 |
|
T8 |
4 |
|
T9 |
1 |
auto[1] |
auto[0] |
auto[1] |
2352 |
1 |
|
|
T5 |
1 |
|
T9 |
1 |
|
T10 |
1 |
auto[1] |
auto[1] |
auto[0] |
5090 |
1 |
|
|
T7 |
13 |
|
T8 |
1 |
|
T9 |
2 |
auto[1] |
auto[1] |
auto[1] |
6243 |
1 |
|
|
T3 |
1 |
|
T7 |
18 |
|
T9 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7470 |
1 |
|
|
T5 |
4 |
|
T8 |
8 |
|
T9 |
4 |
auto[1] |
20543 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12614 |
1 |
|
|
T5 |
1 |
|
T7 |
24 |
|
T8 |
9 |
auto[1] |
15399 |
1 |
|
|
T3 |
1 |
|
T5 |
5 |
|
T7 |
26 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13349 |
1 |
|
|
T3 |
1 |
|
T5 |
4 |
|
T7 |
25 |
auto[1] |
14664 |
1 |
|
|
T5 |
2 |
|
T7 |
25 |
|
T8 |
7 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1727 |
1 |
|
|
T8 |
4 |
|
T9 |
1 |
|
T46 |
3 |
auto[0] |
auto[0] |
auto[1] |
1711 |
1 |
|
|
T8 |
2 |
|
T9 |
1 |
|
T10 |
1 |
auto[0] |
auto[1] |
auto[0] |
4798 |
1 |
|
|
T5 |
1 |
|
T7 |
13 |
|
T8 |
1 |
auto[0] |
auto[1] |
auto[1] |
4378 |
1 |
|
|
T7 |
11 |
|
T8 |
2 |
|
T9 |
1 |
auto[1] |
auto[0] |
auto[0] |
1741 |
1 |
|
|
T5 |
3 |
|
T8 |
1 |
|
T9 |
1 |
auto[1] |
auto[0] |
auto[1] |
2291 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T9 |
1 |
auto[1] |
auto[1] |
auto[0] |
5083 |
1 |
|
|
T3 |
1 |
|
T7 |
12 |
|
T8 |
1 |
auto[1] |
auto[1] |
auto[1] |
6284 |
1 |
|
|
T5 |
1 |
|
T7 |
14 |
|
T8 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7470 |
1 |
|
|
T5 |
4 |
|
T8 |
8 |
|
T9 |
4 |
auto[1] |
20543 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12647 |
1 |
|
|
T5 |
4 |
|
T7 |
16 |
|
T8 |
7 |
auto[1] |
15366 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
34 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13220 |
1 |
|
|
T5 |
2 |
|
T7 |
26 |
|
T8 |
6 |
auto[1] |
14793 |
1 |
|
|
T3 |
1 |
|
T5 |
4 |
|
T7 |
24 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1680 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T9 |
1 |
auto[0] |
auto[0] |
auto[1] |
1749 |
1 |
|
|
T5 |
2 |
|
T8 |
4 |
|
T9 |
1 |
auto[0] |
auto[1] |
auto[0] |
4853 |
1 |
|
|
T7 |
7 |
|
T8 |
1 |
|
T9 |
1 |
auto[0] |
auto[1] |
auto[1] |
4365 |
1 |
|
|
T5 |
1 |
|
T7 |
9 |
|
T8 |
1 |
auto[1] |
auto[0] |
auto[0] |
1696 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T10 |
1 |
auto[1] |
auto[0] |
auto[1] |
2345 |
1 |
|
|
T8 |
2 |
|
T9 |
2 |
|
T46 |
2 |
auto[1] |
auto[1] |
auto[0] |
4991 |
1 |
|
|
T7 |
19 |
|
T8 |
3 |
|
T9 |
1 |
auto[1] |
auto[1] |
auto[1] |
6334 |
1 |
|
|
T3 |
1 |
|
T5 |
1 |
|
T7 |
15 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7470 |
1 |
|
|
T5 |
4 |
|
T8 |
8 |
|
T9 |
4 |
auto[1] |
20543 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12693 |
1 |
|
|
T5 |
4 |
|
T7 |
25 |
|
T8 |
7 |
auto[1] |
15320 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
25 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13425 |
1 |
|
|
T5 |
5 |
|
T7 |
29 |
|
T8 |
5 |
auto[1] |
14588 |
1 |
|
|
T3 |
1 |
|
T5 |
1 |
|
T7 |
21 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1733 |
1 |
|
|
T5 |
3 |
|
T8 |
2 |
|
T9 |
1 |
auto[0] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T8 |
1 |
|
T10 |
1 |
|
T53 |
2 |
auto[0] |
auto[1] |
auto[0] |
4849 |
1 |
|
|
T5 |
1 |
|
T7 |
15 |
|
T8 |
1 |
auto[0] |
auto[1] |
auto[1] |
4356 |
1 |
|
|
T7 |
10 |
|
T8 |
3 |
|
T9 |
3 |
auto[1] |
auto[0] |
auto[0] |
1741 |
1 |
|
|
T8 |
2 |
|
T53 |
4 |
|
T54 |
6 |
auto[1] |
auto[0] |
auto[1] |
2241 |
1 |
|
|
T5 |
1 |
|
T8 |
3 |
|
T9 |
3 |
auto[1] |
auto[1] |
auto[0] |
5102 |
1 |
|
|
T5 |
1 |
|
T7 |
14 |
|
T9 |
2 |
auto[1] |
auto[1] |
auto[1] |
6236 |
1 |
|
|
T3 |
1 |
|
T7 |
11 |
|
T8 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7470 |
1 |
|
|
T5 |
4 |
|
T8 |
8 |
|
T9 |
4 |
auto[1] |
20543 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12572 |
1 |
|
|
T5 |
2 |
|
T7 |
26 |
|
T8 |
7 |
auto[1] |
15441 |
1 |
|
|
T3 |
1 |
|
T5 |
4 |
|
T7 |
24 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13359 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
24 |
auto[1] |
14654 |
1 |
|
|
T5 |
4 |
|
T7 |
26 |
|
T8 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1686 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T46 |
1 |
auto[0] |
auto[0] |
auto[1] |
1740 |
1 |
|
|
T5 |
1 |
|
T8 |
3 |
|
T9 |
2 |
auto[0] |
auto[1] |
auto[0] |
4726 |
1 |
|
|
T7 |
14 |
|
T8 |
3 |
|
T9 |
1 |
auto[0] |
auto[1] |
auto[1] |
4420 |
1 |
|
|
T7 |
12 |
|
T9 |
3 |
|
T10 |
1 |
auto[1] |
auto[0] |
auto[0] |
1756 |
1 |
|
|
T8 |
3 |
|
T9 |
1 |
|
T53 |
2 |
auto[1] |
auto[0] |
auto[1] |
2288 |
1 |
|
|
T5 |
2 |
|
T8 |
1 |
|
T9 |
1 |
auto[1] |
auto[1] |
auto[0] |
5191 |
1 |
|
|
T3 |
1 |
|
T5 |
1 |
|
T7 |
10 |
auto[1] |
auto[1] |
auto[1] |
6206 |
1 |
|
|
T5 |
1 |
|
T7 |
14 |
|
T9 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7470 |
1 |
|
|
T5 |
4 |
|
T8 |
8 |
|
T9 |
4 |
auto[1] |
20543 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
50 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12688 |
1 |
|
|
T5 |
1 |
|
T7 |
17 |
|
T8 |
5 |
auto[1] |
15325 |
1 |
|
|
T3 |
1 |
|
T5 |
5 |
|
T7 |
33 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13340 |
1 |
|
|
T5 |
2 |
|
T7 |
30 |
|
T8 |
5 |
auto[1] |
14673 |
1 |
|
|
T3 |
1 |
|
T5 |
4 |
|
T7 |
20 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1712 |
1 |
|
|
T8 |
1 |
|
T9 |
2 |
|
T10 |
1 |
auto[0] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T5 |
1 |
|
T8 |
1 |
|
T9 |
1 |
auto[0] |
auto[1] |
auto[0] |
4859 |
1 |
|
|
T7 |
12 |
|
T8 |
2 |
|
T9 |
1 |
auto[0] |
auto[1] |
auto[1] |
4393 |
1 |
|
|
T7 |
5 |
|
T8 |
1 |
|
T9 |
2 |
auto[1] |
auto[0] |
auto[0] |
1682 |
1 |
|
|
T5 |
2 |
|
T8 |
2 |
|
T9 |
1 |
auto[1] |
auto[0] |
auto[1] |
2352 |
1 |
|
|
T5 |
1 |
|
T8 |
4 |
|
T10 |
1 |
auto[1] |
auto[1] |
auto[0] |
5087 |
1 |
|
|
T7 |
18 |
|
T10 |
1 |
|
T46 |
4 |
auto[1] |
auto[1] |
auto[1] |
6204 |
1 |
|
|
T3 |
1 |
|
T5 |
2 |
|
T7 |
15 |