Group : pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : pwrmgr_env_pkg::pwrmgr_wakeup_ctrl_cg_wrap::wakeup_ctrl_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_pwrmgr_env_0.1/pwrmgr_env_cov.sv

6 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
WakeupAonTimer_ctrl_cg 100.00 1 100 1 64 64
WakeupDbgCable_ctrl_cg 100.00 1 100 1 64 64
WakeupPin_ctrl_cg 100.00 1 100 1 64 64
WakeupSensorCtrl_ctrl_cg 100.00 1 100 1 64 64
WakeupSysrst_ctrl_cg 100.00 1 100 1 64 64
WakeupUsb_ctrl_cg 100.00 1 100 1 64 64




Group Instance : WakeupAonTimer_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupAonTimer_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupAonTimer_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupAonTimer_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupDbgCable_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupDbgCable_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupDbgCable_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupDbgCable_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupPin_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupPin_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupPin_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupPin_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupSensorCtrl_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupSensorCtrl_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupSensorCtrl_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupSensorCtrl_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupSysrst_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupSysrst_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupSysrst_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupSysrst_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0



Group Instance : WakeupUsb_ctrl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance WakeupUsb_ctrl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group Instance WakeupUsb_ctrl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
capture_cp 2 0 2 100.00 100 1 1 2
enable_cp 2 0 2 100.00 100 1 1 2
wakeup_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance WakeupUsb_ctrl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
wakeup_cross 8 0 8 100.00 100 1 1 0


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6755 1 T2 7 T8 6 T9 53
auto[1] 19197 1 T2 6 T5 1 T8 11



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 11739 1 T2 7 T8 8 T9 79
auto[1] 14213 1 T2 6 T5 1 T8 9



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12430 1 T2 4 T8 10 T9 78
auto[1] 13522 1 T2 9 T5 1 T8 7



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1576 1 T2 1 T8 3 T9 10
auto[0] auto[0] auto[1] 1557 1 T2 2 T8 2 T9 12
auto[0] auto[1] auto[0] 4526 1 T2 1 T8 1 T9 26
auto[0] auto[1] auto[1] 4080 1 T2 3 T8 2 T9 31
auto[1] auto[0] auto[0] 1512 1 T2 1 T9 8 T10 1
auto[1] auto[0] auto[1] 2110 1 T2 3 T8 1 T9 23
auto[1] auto[1] auto[0] 4816 1 T2 1 T8 6 T9 34
auto[1] auto[1] auto[1] 5775 1 T2 1 T5 1 T8 2


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6755 1 T2 7 T8 6 T9 53
auto[1] 19197 1 T2 6 T5 1 T8 11



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 11553 1 T2 6 T8 7 T9 70
auto[1] 14399 1 T2 7 T5 1 T8 10



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12218 1 T2 6 T8 5 T9 80
auto[1] 13734 1 T2 7 T5 1 T8 12



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1515 1 T2 2 T9 14 T58 1
auto[0] auto[0] auto[1] 1588 1 T2 2 T8 3 T9 9
auto[0] auto[1] auto[0] 4340 1 T2 1 T8 1 T9 26
auto[0] auto[1] auto[1] 4110 1 T2 1 T8 3 T9 21
auto[1] auto[0] auto[0] 1529 1 T2 2 T8 1 T9 9
auto[1] auto[0] auto[1] 2123 1 T2 1 T8 2 T9 21
auto[1] auto[1] auto[0] 4834 1 T2 1 T8 3 T9 31
auto[1] auto[1] auto[1] 5913 1 T2 3 T5 1 T8 4


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6755 1 T2 7 T8 6 T9 53
auto[1] 19197 1 T2 6 T5 1 T8 11



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 11687 1 T2 7 T8 8 T9 68
auto[1] 14265 1 T2 6 T5 1 T8 9



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12229 1 T2 3 T5 1 T8 7
auto[1] 13723 1 T2 10 T8 10 T9 97



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1524 1 T2 1 T8 1 T9 8
auto[0] auto[0] auto[1] 1558 1 T2 1 T8 2 T9 14
auto[0] auto[1] auto[0] 4443 1 T2 1 T8 2 T9 21
auto[0] auto[1] auto[1] 4162 1 T2 4 T8 3 T9 25
auto[1] auto[0] auto[0] 1551 1 T2 1 T8 3 T9 14
auto[1] auto[0] auto[1] 2122 1 T2 4 T9 17 T58 4
auto[1] auto[1] auto[0] 4711 1 T5 1 T8 1 T9 35
auto[1] auto[1] auto[1] 5881 1 T2 1 T8 5 T9 41


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6755 1 T2 7 T8 6 T9 53
auto[1] 19197 1 T2 6 T5 1 T8 11



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 11710 1 T2 8 T8 8 T9 68
auto[1] 14242 1 T2 5 T5 1 T8 9



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12417 1 T2 2 T8 9 T9 94
auto[1] 13535 1 T2 11 T5 1 T8 8



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1552 1 T2 1 T8 2 T9 16
auto[0] auto[0] auto[1] 1562 1 T2 3 T8 2 T9 8
auto[0] auto[1] auto[0] 4456 1 T8 2 T9 21 T10 1
auto[0] auto[1] auto[1] 4140 1 T2 4 T8 2 T9 23
auto[1] auto[0] auto[0] 1577 1 T2 1 T8 2 T9 16
auto[1] auto[0] auto[1] 2064 1 T2 2 T9 13 T10 1
auto[1] auto[1] auto[0] 4832 1 T8 3 T9 41 T24 7
auto[1] auto[1] auto[1] 5769 1 T2 2 T5 1 T8 4


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6755 1 T2 7 T8 6 T9 53
auto[1] 19197 1 T2 6 T5 1 T8 11



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 11708 1 T2 2 T8 9 T9 78
auto[1] 14244 1 T2 11 T5 1 T8 8



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12369 1 T2 5 T5 1 T8 9
auto[1] 13583 1 T2 8 T8 8 T9 92



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1535 1 T2 1 T8 1 T9 12
auto[0] auto[0] auto[1] 1622 1 T8 1 T9 13 T10 1
auto[0] auto[1] auto[0] 4466 1 T8 2 T9 28 T24 11
auto[0] auto[1] auto[1] 4085 1 T2 1 T8 5 T9 25
auto[1] auto[0] auto[0] 1580 1 T2 4 T8 3 T9 14
auto[1] auto[0] auto[1] 2018 1 T2 2 T8 1 T9 14
auto[1] auto[1] auto[0] 4788 1 T5 1 T8 3 T9 29
auto[1] auto[1] auto[1] 5858 1 T2 5 T8 1 T9 40


Summary for Variable capture_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for capture_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6755 1 T2 7 T8 6 T9 53
auto[1] 19197 1 T2 6 T5 1 T8 11



Summary for Variable enable_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for enable_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 11668 1 T2 7 T8 5 T9 71
auto[1] 14284 1 T2 6 T5 1 T8 12



Summary for Variable wakeup_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for wakeup_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12301 1 T2 6 T5 1 T8 7
auto[1] 13651 1 T2 7 T8 10 T9 103



Summary for Cross wakeup_cross

Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for wakeup_cross

Bins
enable_cpcapture_cpwakeup_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 1541 1 T2 1 T8 2 T9 14
auto[0] auto[0] auto[1] 1566 1 T2 2 T8 1 T9 11
auto[0] auto[1] auto[0] 4455 1 T2 1 T8 1 T9 21
auto[0] auto[1] auto[1] 4106 1 T2 3 T8 1 T9 25
auto[1] auto[0] auto[0] 1554 1 T2 3 T9 11 T58 1
auto[1] auto[0] auto[1] 2094 1 T2 1 T8 3 T9 17
auto[1] auto[1] auto[0] 4751 1 T2 1 T5 1 T8 4
auto[1] auto[1] auto[1] 5885 1 T2 1 T8 5 T9 50

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%