Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7849 |
1 |
|
|
T3 |
11 |
|
T6 |
152 |
|
T7 |
21 |
auto[1] |
21400 |
1 |
|
|
T2 |
50 |
|
T3 |
9 |
|
T5 |
5 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13136 |
1 |
|
|
T2 |
23 |
|
T3 |
10 |
|
T5 |
2 |
auto[1] |
16113 |
1 |
|
|
T2 |
27 |
|
T3 |
10 |
|
T5 |
3 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13869 |
1 |
|
|
T2 |
28 |
|
T3 |
7 |
|
T5 |
3 |
auto[1] |
15380 |
1 |
|
|
T2 |
22 |
|
T3 |
13 |
|
T5 |
2 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1752 |
1 |
|
|
T3 |
3 |
|
T6 |
34 |
|
T7 |
4 |
auto[0] |
auto[0] |
auto[1] |
1796 |
1 |
|
|
T3 |
3 |
|
T6 |
46 |
|
T7 |
2 |
auto[0] |
auto[1] |
auto[0] |
4992 |
1 |
|
|
T2 |
13 |
|
T3 |
2 |
|
T5 |
2 |
auto[0] |
auto[1] |
auto[1] |
4596 |
1 |
|
|
T2 |
10 |
|
T3 |
2 |
|
T6 |
63 |
auto[1] |
auto[0] |
auto[0] |
1831 |
1 |
|
|
T6 |
28 |
|
T7 |
6 |
|
T9 |
1 |
auto[1] |
auto[0] |
auto[1] |
2470 |
1 |
|
|
T3 |
5 |
|
T6 |
44 |
|
T7 |
9 |
auto[1] |
auto[1] |
auto[0] |
5294 |
1 |
|
|
T2 |
15 |
|
T3 |
2 |
|
T5 |
1 |
auto[1] |
auto[1] |
auto[1] |
6518 |
1 |
|
|
T2 |
12 |
|
T3 |
3 |
|
T5 |
2 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7849 |
1 |
|
|
T3 |
11 |
|
T6 |
152 |
|
T7 |
21 |
auto[1] |
21400 |
1 |
|
|
T2 |
50 |
|
T3 |
9 |
|
T5 |
5 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13425 |
1 |
|
|
T2 |
22 |
|
T3 |
12 |
|
T5 |
2 |
auto[1] |
15824 |
1 |
|
|
T2 |
28 |
|
T3 |
8 |
|
T5 |
3 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13810 |
1 |
|
|
T2 |
23 |
|
T3 |
11 |
|
T5 |
3 |
auto[1] |
15439 |
1 |
|
|
T2 |
27 |
|
T3 |
9 |
|
T5 |
2 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1843 |
1 |
|
|
T3 |
5 |
|
T6 |
34 |
|
T7 |
5 |
auto[0] |
auto[0] |
auto[1] |
1883 |
1 |
|
|
T3 |
3 |
|
T6 |
31 |
|
T7 |
6 |
auto[0] |
auto[1] |
auto[0] |
4989 |
1 |
|
|
T2 |
11 |
|
T3 |
2 |
|
T5 |
1 |
auto[0] |
auto[1] |
auto[1] |
4710 |
1 |
|
|
T2 |
11 |
|
T3 |
2 |
|
T5 |
1 |
auto[1] |
auto[0] |
auto[0] |
1728 |
1 |
|
|
T3 |
1 |
|
T6 |
37 |
|
T7 |
5 |
auto[1] |
auto[0] |
auto[1] |
2395 |
1 |
|
|
T3 |
2 |
|
T6 |
50 |
|
T7 |
5 |
auto[1] |
auto[1] |
auto[0] |
5250 |
1 |
|
|
T2 |
12 |
|
T3 |
3 |
|
T5 |
2 |
auto[1] |
auto[1] |
auto[1] |
6451 |
1 |
|
|
T2 |
16 |
|
T3 |
2 |
|
T5 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7849 |
1 |
|
|
T3 |
11 |
|
T6 |
152 |
|
T7 |
21 |
auto[1] |
21400 |
1 |
|
|
T2 |
50 |
|
T3 |
9 |
|
T5 |
5 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13186 |
1 |
|
|
T2 |
29 |
|
T3 |
8 |
|
T5 |
1 |
auto[1] |
16063 |
1 |
|
|
T2 |
21 |
|
T3 |
12 |
|
T5 |
4 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13834 |
1 |
|
|
T2 |
20 |
|
T3 |
7 |
|
T5 |
1 |
auto[1] |
15415 |
1 |
|
|
T2 |
30 |
|
T3 |
13 |
|
T5 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1742 |
1 |
|
|
T3 |
2 |
|
T6 |
27 |
|
T7 |
3 |
auto[0] |
auto[0] |
auto[1] |
1850 |
1 |
|
|
T3 |
3 |
|
T6 |
30 |
|
T7 |
6 |
auto[0] |
auto[1] |
auto[0] |
5027 |
1 |
|
|
T2 |
12 |
|
T3 |
2 |
|
T6 |
65 |
auto[0] |
auto[1] |
auto[1] |
4567 |
1 |
|
|
T2 |
17 |
|
T3 |
1 |
|
T5 |
1 |
auto[1] |
auto[0] |
auto[0] |
1841 |
1 |
|
|
T3 |
2 |
|
T6 |
38 |
|
T7 |
8 |
auto[1] |
auto[0] |
auto[1] |
2416 |
1 |
|
|
T3 |
4 |
|
T6 |
57 |
|
T7 |
4 |
auto[1] |
auto[1] |
auto[0] |
5224 |
1 |
|
|
T2 |
8 |
|
T3 |
1 |
|
T5 |
1 |
auto[1] |
auto[1] |
auto[1] |
6582 |
1 |
|
|
T2 |
13 |
|
T3 |
5 |
|
T5 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7849 |
1 |
|
|
T3 |
11 |
|
T6 |
152 |
|
T7 |
21 |
auto[1] |
21400 |
1 |
|
|
T2 |
50 |
|
T3 |
9 |
|
T5 |
5 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13209 |
1 |
|
|
T2 |
24 |
|
T3 |
10 |
|
T5 |
4 |
auto[1] |
16040 |
1 |
|
|
T2 |
26 |
|
T3 |
10 |
|
T5 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13876 |
1 |
|
|
T2 |
24 |
|
T3 |
6 |
|
T5 |
3 |
auto[1] |
15373 |
1 |
|
|
T2 |
26 |
|
T3 |
14 |
|
T5 |
2 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1824 |
1 |
|
|
T3 |
1 |
|
T6 |
31 |
|
T7 |
6 |
auto[0] |
auto[0] |
auto[1] |
1806 |
1 |
|
|
T3 |
3 |
|
T6 |
46 |
|
T7 |
4 |
auto[0] |
auto[1] |
auto[0] |
4918 |
1 |
|
|
T2 |
13 |
|
T3 |
2 |
|
T5 |
2 |
auto[0] |
auto[1] |
auto[1] |
4661 |
1 |
|
|
T2 |
11 |
|
T3 |
4 |
|
T5 |
2 |
auto[1] |
auto[0] |
auto[0] |
1814 |
1 |
|
|
T3 |
3 |
|
T6 |
35 |
|
T7 |
6 |
auto[1] |
auto[0] |
auto[1] |
2405 |
1 |
|
|
T3 |
4 |
|
T6 |
40 |
|
T7 |
5 |
auto[1] |
auto[1] |
auto[0] |
5320 |
1 |
|
|
T2 |
11 |
|
T5 |
1 |
|
T6 |
66 |
auto[1] |
auto[1] |
auto[1] |
6501 |
1 |
|
|
T2 |
15 |
|
T3 |
3 |
|
T6 |
99 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7849 |
1 |
|
|
T3 |
11 |
|
T6 |
152 |
|
T7 |
21 |
auto[1] |
21400 |
1 |
|
|
T2 |
50 |
|
T3 |
9 |
|
T5 |
5 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13069 |
1 |
|
|
T2 |
25 |
|
T3 |
10 |
|
T5 |
3 |
auto[1] |
16180 |
1 |
|
|
T2 |
25 |
|
T3 |
10 |
|
T5 |
2 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13867 |
1 |
|
|
T2 |
24 |
|
T3 |
9 |
|
T5 |
2 |
auto[1] |
15382 |
1 |
|
|
T2 |
26 |
|
T3 |
11 |
|
T5 |
3 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1773 |
1 |
|
|
T6 |
31 |
|
T7 |
3 |
|
T9 |
2 |
auto[0] |
auto[0] |
auto[1] |
1813 |
1 |
|
|
T3 |
4 |
|
T6 |
36 |
|
T7 |
3 |
auto[0] |
auto[1] |
auto[0] |
4934 |
1 |
|
|
T2 |
15 |
|
T3 |
4 |
|
T5 |
1 |
auto[0] |
auto[1] |
auto[1] |
4549 |
1 |
|
|
T2 |
10 |
|
T3 |
2 |
|
T5 |
2 |
auto[1] |
auto[0] |
auto[0] |
1771 |
1 |
|
|
T3 |
3 |
|
T6 |
38 |
|
T7 |
6 |
auto[1] |
auto[0] |
auto[1] |
2492 |
1 |
|
|
T3 |
4 |
|
T6 |
47 |
|
T7 |
9 |
auto[1] |
auto[1] |
auto[0] |
5389 |
1 |
|
|
T2 |
9 |
|
T3 |
2 |
|
T5 |
1 |
auto[1] |
auto[1] |
auto[1] |
6528 |
1 |
|
|
T2 |
16 |
|
T3 |
1 |
|
T5 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7849 |
1 |
|
|
T3 |
11 |
|
T6 |
152 |
|
T7 |
21 |
auto[1] |
21400 |
1 |
|
|
T2 |
50 |
|
T3 |
9 |
|
T5 |
5 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12904 |
1 |
|
|
T2 |
18 |
|
T3 |
5 |
|
T5 |
2 |
auto[1] |
16345 |
1 |
|
|
T2 |
32 |
|
T3 |
15 |
|
T5 |
3 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13793 |
1 |
|
|
T2 |
24 |
|
T3 |
6 |
|
T5 |
1 |
auto[1] |
15456 |
1 |
|
|
T2 |
26 |
|
T3 |
14 |
|
T5 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1826 |
1 |
|
|
T3 |
1 |
|
T6 |
40 |
|
T7 |
5 |
auto[0] |
auto[0] |
auto[1] |
1784 |
1 |
|
|
T3 |
2 |
|
T6 |
38 |
|
T7 |
3 |
auto[0] |
auto[1] |
auto[0] |
4897 |
1 |
|
|
T2 |
10 |
|
T6 |
60 |
|
T7 |
6 |
auto[0] |
auto[1] |
auto[1] |
4397 |
1 |
|
|
T2 |
8 |
|
T3 |
2 |
|
T5 |
2 |
auto[1] |
auto[0] |
auto[0] |
1801 |
1 |
|
|
T3 |
3 |
|
T6 |
26 |
|
T7 |
6 |
auto[1] |
auto[0] |
auto[1] |
2438 |
1 |
|
|
T3 |
5 |
|
T6 |
48 |
|
T7 |
7 |
auto[1] |
auto[1] |
auto[0] |
5269 |
1 |
|
|
T2 |
14 |
|
T3 |
2 |
|
T5 |
1 |
auto[1] |
auto[1] |
auto[1] |
6837 |
1 |
|
|
T2 |
18 |
|
T3 |
5 |
|
T5 |
2 |