Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi_cov#(4,32'b00000000000000000000000000000101,32'b00000000000000000000000000001010)::mubi_cg

Group : dv_base_reg_pkg::mubi_cov#(4,32'b00000000000000000000000000000101,32'b00000000000000000000000000001010)::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi4_cov_of_tb.dut.u_lc_dft_en_mubi_cov_if	100.00	1	100	1	64	64
mubi4_cov_of_tb.dut.u_lc_hw_debug_en_mubi_cov_if	100.00	1	100	1	64	64

---

Group Instance : mubi4_cov_of_tb.dut.u_lc_dft_en_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_tb.dut.u_lc_dft_en_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_tb.dut.u_lc_dft_en_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

---

Group Instance : mubi4_cov_of_tb.dut.u_lc_hw_debug_en_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_tb.dut.u_lc_hw_debug_en_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_tb.dut.u_lc_hw_debug_en_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	268	1			T2	6		T24	7		T50	1
others[1]	275	1			T2	3		T24	8		T43	1
others[2]	303	1			T2	10		T24	4		T43	3
others[3]	427	1			T2	9		T24	7		T25	1
false	8325	1			T1	1		T2	12		T3	1
true	575	1			T2	6		T24	8		T25	5

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	246	1			T2	5		T24	8		T180	6
others[1]	287	1			T2	5		T24	6		T43	1
others[2]	269	1			T2	6		T24	3		T180	3
others[3]	418	1			T2	5		T24	5		T25	1
false	8362	1			T1	1		T2	13		T3	1
true	597	1			T2	10		T24	12		T25	4