Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7405 |
1 |
|
|
T1 |
2 |
|
T5 |
3 |
|
T27 |
8 |
auto[1] |
20524 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T5 |
2 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12516 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
1 |
auto[1] |
15413 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T5 |
5 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13277 |
1 |
|
|
T1 |
1 |
|
T5 |
1 |
|
T9 |
22 |
auto[1] |
14652 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1695 |
1 |
|
|
T27 |
3 |
|
T46 |
1 |
|
T67 |
5 |
auto[0] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T1 |
1 |
|
T61 |
2 |
|
T67 |
4 |
auto[0] |
auto[1] |
auto[0] |
4768 |
1 |
|
|
T9 |
13 |
|
T20 |
2 |
|
T46 |
1 |
auto[0] |
auto[1] |
auto[1] |
4341 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T9 |
12 |
auto[1] |
auto[0] |
auto[0] |
1660 |
1 |
|
|
T1 |
1 |
|
T27 |
3 |
|
T46 |
1 |
auto[1] |
auto[0] |
auto[1] |
2338 |
1 |
|
|
T5 |
3 |
|
T27 |
2 |
|
T47 |
1 |
auto[1] |
auto[1] |
auto[0] |
5154 |
1 |
|
|
T5 |
1 |
|
T9 |
9 |
|
T27 |
1 |
auto[1] |
auto[1] |
auto[1] |
6261 |
1 |
|
|
T3 |
1 |
|
T5 |
1 |
|
T9 |
16 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7405 |
1 |
|
|
T1 |
2 |
|
T5 |
3 |
|
T27 |
8 |
auto[1] |
20524 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T5 |
2 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12677 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T5 |
3 |
auto[1] |
15252 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T5 |
2 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13238 |
1 |
|
|
T2 |
1 |
|
T5 |
3 |
|
T9 |
16 |
auto[1] |
14691 |
1 |
|
|
T1 |
2 |
|
T3 |
1 |
|
T5 |
2 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1729 |
1 |
|
|
T47 |
1 |
|
T67 |
2 |
|
T62 |
1 |
auto[0] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T1 |
1 |
|
T5 |
1 |
|
T27 |
3 |
auto[0] |
auto[1] |
auto[0] |
4812 |
1 |
|
|
T2 |
1 |
|
T5 |
2 |
|
T9 |
8 |
auto[0] |
auto[1] |
auto[1] |
4423 |
1 |
|
|
T6 |
1 |
|
T9 |
17 |
|
T27 |
3 |
auto[1] |
auto[0] |
auto[0] |
1644 |
1 |
|
|
T5 |
1 |
|
T27 |
2 |
|
T46 |
1 |
auto[1] |
auto[0] |
auto[1] |
2319 |
1 |
|
|
T1 |
1 |
|
T5 |
1 |
|
T27 |
3 |
auto[1] |
auto[1] |
auto[0] |
5053 |
1 |
|
|
T9 |
8 |
|
T27 |
1 |
|
T20 |
2 |
auto[1] |
auto[1] |
auto[1] |
6236 |
1 |
|
|
T3 |
1 |
|
T9 |
17 |
|
T27 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7405 |
1 |
|
|
T1 |
2 |
|
T5 |
3 |
|
T27 |
8 |
auto[1] |
20524 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T5 |
2 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12597 |
1 |
|
|
T2 |
1 |
|
T5 |
4 |
|
T6 |
1 |
auto[1] |
15332 |
1 |
|
|
T1 |
2 |
|
T3 |
1 |
|
T5 |
1 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13280 |
1 |
|
|
T2 |
1 |
|
T5 |
3 |
|
T6 |
1 |
auto[1] |
14649 |
1 |
|
|
T1 |
2 |
|
T3 |
1 |
|
T5 |
2 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1691 |
1 |
|
|
T5 |
1 |
|
T27 |
2 |
|
T46 |
1 |
auto[0] |
auto[0] |
auto[1] |
1724 |
1 |
|
|
T5 |
1 |
|
T46 |
1 |
|
T47 |
1 |
auto[0] |
auto[1] |
auto[0] |
4770 |
1 |
|
|
T2 |
1 |
|
T5 |
2 |
|
T6 |
1 |
auto[0] |
auto[1] |
auto[1] |
4412 |
1 |
|
|
T9 |
13 |
|
T27 |
4 |
|
T20 |
1 |
auto[1] |
auto[0] |
auto[0] |
1678 |
1 |
|
|
T27 |
1 |
|
T61 |
2 |
|
T67 |
2 |
auto[1] |
auto[0] |
auto[1] |
2312 |
1 |
|
|
T1 |
2 |
|
T5 |
1 |
|
T27 |
5 |
auto[1] |
auto[1] |
auto[0] |
5141 |
1 |
|
|
T9 |
10 |
|
T20 |
2 |
|
T47 |
3 |
auto[1] |
auto[1] |
auto[1] |
6201 |
1 |
|
|
T3 |
1 |
|
T9 |
13 |
|
T27 |
1 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7405 |
1 |
|
|
T1 |
2 |
|
T5 |
3 |
|
T27 |
8 |
auto[1] |
20524 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T5 |
2 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12685 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T5 |
1 |
auto[1] |
15244 |
1 |
|
|
T3 |
1 |
|
T5 |
4 |
|
T9 |
32 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13151 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T5 |
1 |
auto[1] |
14778 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T5 |
4 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1690 |
1 |
|
|
T1 |
1 |
|
T27 |
2 |
|
T46 |
1 |
auto[0] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T1 |
1 |
|
T5 |
1 |
|
T61 |
1 |
auto[0] |
auto[1] |
auto[0] |
4760 |
1 |
|
|
T9 |
8 |
|
T20 |
1 |
|
T46 |
1 |
auto[0] |
auto[1] |
auto[1] |
4505 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T9 |
10 |
auto[1] |
auto[0] |
auto[0] |
1666 |
1 |
|
|
T27 |
2 |
|
T47 |
1 |
|
T67 |
2 |
auto[1] |
auto[0] |
auto[1] |
2319 |
1 |
|
|
T5 |
2 |
|
T27 |
4 |
|
T46 |
1 |
auto[1] |
auto[1] |
auto[0] |
5035 |
1 |
|
|
T3 |
1 |
|
T5 |
1 |
|
T9 |
14 |
auto[1] |
auto[1] |
auto[1] |
6224 |
1 |
|
|
T5 |
1 |
|
T9 |
18 |
|
T27 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7405 |
1 |
|
|
T1 |
2 |
|
T5 |
3 |
|
T27 |
8 |
auto[1] |
20524 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T5 |
2 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12638 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T5 |
2 |
auto[1] |
15291 |
1 |
|
|
T3 |
1 |
|
T5 |
3 |
|
T9 |
28 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13194 |
1 |
|
|
T5 |
3 |
|
T9 |
20 |
|
T27 |
7 |
auto[1] |
14735 |
1 |
|
|
T1 |
2 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1667 |
1 |
|
|
T5 |
1 |
|
T27 |
2 |
|
T61 |
2 |
auto[0] |
auto[0] |
auto[1] |
1757 |
1 |
|
|
T1 |
2 |
|
T5 |
1 |
|
T27 |
1 |
auto[0] |
auto[1] |
auto[0] |
4765 |
1 |
|
|
T9 |
9 |
|
T27 |
1 |
|
T20 |
3 |
auto[0] |
auto[1] |
auto[1] |
4449 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T9 |
13 |
auto[1] |
auto[0] |
auto[0] |
1678 |
1 |
|
|
T27 |
4 |
|
T46 |
1 |
|
T47 |
1 |
auto[1] |
auto[0] |
auto[1] |
2303 |
1 |
|
|
T5 |
1 |
|
T27 |
1 |
|
T46 |
1 |
auto[1] |
auto[1] |
auto[0] |
5084 |
1 |
|
|
T5 |
2 |
|
T9 |
11 |
|
T47 |
1 |
auto[1] |
auto[1] |
auto[1] |
6226 |
1 |
|
|
T3 |
1 |
|
T9 |
17 |
|
T27 |
3 |
Summary for Variable capture_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for capture_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
7405 |
1 |
|
|
T1 |
2 |
|
T5 |
3 |
|
T27 |
8 |
auto[1] |
20524 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T5 |
2 |
Summary for Variable enable_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for enable_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12539 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T5 |
2 |
auto[1] |
15390 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T5 |
3 |
Summary for Variable wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for wakeup_cp
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
13302 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T5 |
2 |
auto[1] |
14627 |
1 |
|
|
T1 |
2 |
|
T5 |
3 |
|
T9 |
30 |
Summary for Cross wakeup_cross
Samples crossed: enable_cp capture_cp wakeup_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
8 |
0 |
8 |
100.00 |
|
Automatically Generated Cross Bins for wakeup_cross
Bins
enable_cp | capture_cp | wakeup_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
auto[0] |
1715 |
1 |
|
|
T5 |
1 |
|
T27 |
3 |
|
T46 |
1 |
auto[0] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T1 |
1 |
|
T27 |
3 |
|
T47 |
2 |
auto[0] |
auto[1] |
auto[0] |
4787 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T9 |
10 |
auto[0] |
auto[1] |
auto[1] |
4302 |
1 |
|
|
T5 |
1 |
|
T9 |
13 |
|
T27 |
1 |
auto[1] |
auto[0] |
auto[0] |
1660 |
1 |
|
|
T5 |
1 |
|
T27 |
2 |
|
T61 |
2 |
auto[1] |
auto[0] |
auto[1] |
2295 |
1 |
|
|
T1 |
1 |
|
T5 |
1 |
|
T46 |
1 |
auto[1] |
auto[1] |
auto[0] |
5140 |
1 |
|
|
T3 |
1 |
|
T9 |
10 |
|
T27 |
1 |
auto[1] |
auto[1] |
auto[1] |
6295 |
1 |
|
|
T5 |
1 |
|
T9 |
17 |
|
T27 |
3 |